CC13xx Driver Library
[aon_wuc.h] AON Wake Up Controller

Functions

static void AONWUCMcuPowerDownConfig (uint32_t ui32ClkSrc)
 Configure the power down clock for the MCU domain. More...
 
static void AONWUCMcuPowerOffConfig (uint32_t ui32Mode)
 Configure the power down mode for the MCU domain. More...
 
static void AONWUCMcuWakeUpConfig (uint32_t ui32WakeUp)
 Configure the wake-up procedure for the MCU domain. More...
 
static void AONWUCMcuSRamConfig (uint32_t ui32Retention)
 Configure the retention on the block RAM in the MCU domain. More...
 
static uint32_t AONWUCAuxClockConfigGet (void)
 Return the clock configuration for the AUX domain. More...
 
static void AONWUCAuxPowerDownConfig (uint32_t ui32ClkSrc)
 Configure the power down mode for the AUX domain. More...
 
static void AONWUCAuxSRamConfig (uint32_t ui32Retention)
 Configure the retention on the AUX SRAM. More...
 
static void AONWUCAuxWakeupEvent (uint32_t ui32Mode)
 Control the wake up procedure of the AUX domain. More...
 
void AONWUCAuxReset (void)
 Reset the AUX domain. More...
 
static void AONWUCAuxImageValid (void)
 Tells the Sensor Controller that the image in memory is valid. More...
 
static void AONWUCAuxImageInvalid (void)
 Tells the Sensor Controller that the image in memory is invalid. More...
 
static uint32_t AONWUCPowerStatusGet (void)
 Get the power status of the device. More...
 
static void AONWUCShutDownEnable (void)
 Enable shut-down of the device. More...
 
static void AONWUCDomainPowerDownEnable (void)
 Enable power down mode on AUX and MCU domain. More...
 
static void AONWUCDomainPowerDownDisable (void)
 Use this function to disable power down mode of the MCU and AUX domain. More...
 
static void AONWUCMcuResetClear (uint32_t ui32Status)
 Use this function to clear specific status bits. More...
 
static uint32_t AONWUCMcuResetStatusGet (void)
 Return the reset status. More...
 
void AONWUCRechargeCtrlConfigSet (bool bAdaptEnable, uint32_t ui32AdaptRate, uint32_t ui32Period, uint32_t ui32MaxPeriod)
 Configure the recharge controller. More...
 
static uint32_t AONWUCRechargeCtrlConfigGet (void)
 Get the current configuration of the recharge controller. More...
 
void AONWUCOscConfig (uint32_t ui32Period)
 Configure the interval for oscillator amplitude calibration. More...
 
static void AONWUCJtagPowerOff (void)
 Request power off of the JTAG domain. More...
 

Detailed Description

Function Documentation

static uint32_t AONWUCAuxClockConfigGet ( void  )
inlinestatic

Return the clock configuration for the AUX domain.

The AUX domain does not have a local clock divider, so the AON WUC contains a dedicated clock divider for AUX domain. Use this function to get the setting of the clock divider.

Returns
Return the clock configuration. Enumerated return values are:
364 {
365  // Return the clock divider value.
366  return ((HWREG(AON_WUC_BASE + AON_WUC_O_AUXCLK) &
369 }
static void AONWUCAuxImageInvalid ( void  )
inlinestatic

Tells the Sensor Controller that the image in memory is invalid.

Use this function to tell the sensor controller that the image in memory is invalid. Sensor Controller might wake up, but it will stay idle.

Returns
None
518 {
519  // Tell the Sensor Controller that the image in memory is invalid.
521 }
static void AONWUCAuxImageValid ( void  )
inlinestatic

Tells the Sensor Controller that the image in memory is valid.

Use this function to tell the sensor controller that the image in memory is valid, and it is allowed to start executing the program.

Returns
None
501 {
502  // Tell the Sensor Controller that the image in memory is valid.
504 }
static void AONWUCAuxPowerDownConfig ( uint32_t  ui32ClkSrc)
inlinestatic

Configure the power down mode for the AUX domain.

Use this function to control which one of the clock sources that is fed into the MCU domain when it is in Power Down mode. When the Power is back in active mode the clock source will automatically switch to AONWUC_CLOCK_SRC_HF.

Each clock is fed 'as is' into the AUX domain, since the AUX domain contains internal clock dividers controllable through the PRCM.

Parameters
ui32ClkSrcis the clock source for the AUX domain when in power down.
Returns
None
391 {
392  uint32_t ui32Reg;
393 
394  // Check the arguments.
395  ASSERT((ui32ClkSrc == AONWUC_NO_CLOCK) ||
396  (ui32ClkSrc == AONWUC_CLOCK_SRC_LF));
397 
398  // Set the clock source for the AUX domain when in power down.
399  ui32Reg = HWREG(AON_WUC_BASE + AON_WUC_O_AUXCLK);
400  ui32Reg &= ~AON_WUC_AUXCLK_PWR_DWN_SRC_M;
401  HWREG(AON_WUC_BASE + AON_WUC_O_AUXCLK) = ui32Reg |
402  (ui32ClkSrc <<
404 }
#define AONWUC_CLOCK_SRC_LF
Definition: aon_wuc.h:98
#define ASSERT(expr)
Definition: debug.h:73
#define AONWUC_NO_CLOCK
Definition: aon_wuc.h:100
void AONWUCAuxReset ( void  )

Reset the AUX domain.

Use this function to reset the entire AUX domain. The write to the AON_WUC module must pass an 32 kHz clock boundary. By reading the AON_RTC_O_SYNC register after each write, it is guaranteed that the AON interface will be in sync and that both the assert and the de-assert of the reset signal to AUX will propagate.

Note
This requires two writes and two reads on a 32 kHz clock boundary.
Returns
None
64 {
65  // Reset the AUX domain.
66 // HWREG(AON_WUC_BASE + AON_WUC_O_AUXCTL) |= AON_WUC_AUXCTL_RESET_REQ; // ROM version
68 
69  // Wait for AON interface to be in sync.
71 
72  // De-assert reset on the AUX domain.
73 // HWREG(AON_WUC_BASE + AON_WUC_O_AUXCTL) &= ~AON_WUC_AUXCTL_RESET_REQ; // ROM version
75 
76  // Wait for AON interface to be in sync.
78 }
static void AONWUCAuxSRamConfig ( uint32_t  ui32Retention)
inlinestatic

Configure the retention on the AUX SRAM.

The AUX SRAM contains only one block which supports retention. The retention on the SRAM can be turned on and off. Use this function to enable/disable the retention on the entire RAM.

Parameters
ui32Retentioneither enables or disables AUX SRAM retention.
  • 0 : Disable retention.
  • 1 : Enable retention.
Note
Retention on the SRAM is not enabled by default. If retention is turned off then the SRAM is powered off when it would otherwise be put in retention mode.
Returns
None
428 {
429  // Enable/disable the retention.
430  HWREGBITW(AON_WUC_BASE + AON_WUC_O_AUXCFG, AON_WUC_AUXCFG_RAM_RET_EN_BITN) = ui32Retention;
431 }
static void AONWUCAuxWakeupEvent ( uint32_t  ui32Mode)
inlinestatic

Control the wake up procedure of the AUX domain.

The AUX domain can be woken in two different modes. In both modes power is turned on. In one mode a software event is generated for the Sensor Controller and it is allowed to start processing. The second mode will just force power on the Sensor Controller. If System CPU requires exclusive access to the AUX domain resources, it is advised to ensure that the image in the Sensor Controller memory is declared invalid. This can be achieved by calling AONWUCAuxImageInvalid().

Note
Any writes to the AON interface must pass a 32 kHz clock boundary, and is therefore relatively slow. To ensure that a given write is complete the value of the register can be read back after write.
When accessing the AUX domain from the System CPU, it is advised always to have set the AUX in at least AONWUC_AUX_WAKEUP. This overwrites any instruction from the Sensor Controller and ensures that the AUX domain is on so it won't leave the System CPU hanging.
Parameters
ui32Modeis the wake up mode for the AUX domain.
Returns
None
463 {
464  // Check the arguments.
465  ASSERT((ui32Mode == AONWUC_AUX_WAKEUP) ||
466  (ui32Mode == AONWUC_AUX_ALLOW_SLEEP));
467 
468  // Wake up the AUX domain.
470 }
#define AONWUC_AUX_ALLOW_SLEEP
Definition: aon_wuc.h:153
#define AONWUC_AUX_WAKEUP
Definition: aon_wuc.h:152
#define ASSERT(expr)
Definition: debug.h:73
static void AONWUCDomainPowerDownDisable ( void  )
inlinestatic

Use this function to disable power down mode of the MCU and AUX domain.

Disabling powerdown on the MCU and/or AUX will put the domains in a virtual power down when requesting to be powered down. Logic is the same but power is kept on.

Returns
None.
612 {
613  // Disable power down mode.
615 }
static void AONWUCDomainPowerDownEnable ( void  )
inlinestatic

Enable power down mode on AUX and MCU domain.

Use this function to enable powerdown on the AUX and MCU domain.

Note
The powerdown command is ignored if the JTAG interface has been activated.
Returns
None
590 {
591  // Ensure the JTAG domain is turned off;
592  // otherwise MCU domain can't be turned off.
593  HWREG(AON_WUC_BASE + AON_WUC_O_JTAGCFG) = 0;
594 
595  // Enable power down mode.
597 }
static void AONWUCJtagPowerOff ( void  )
inlinestatic

Request power off of the JTAG domain.

The JTAG domain is automatically powered up on if a debugger is connected. If a debugger is not connected this function can be used to power off the JTAG domain.

Note
Achieving the lowest power modes (shutdown/powerdown) requires the JTAG domain to be turned off. In general the JTAG domain should never be powered in production code.
Returns
None

Referenced by TrimAfterColdResetWakeupFromShutDown().

793 {
794  // Request the power off of the Jtag domain
795  HWREG(AON_WUC_BASE + AON_WUC_O_JTAGCFG) = 0;
796 }
static void AONWUCMcuPowerDownConfig ( uint32_t  ui32ClkSrc)
inlinestatic

Configure the power down clock for the MCU domain.

Use this function to control which one of the clock sources that is fed into the MCU domain when the system is in standby mode. When the power is back in Active mode the clock source will automatically switch to AONWUC_CLOCK_SRC_HF.

Each clock is fed 'as is' into the MCU domain, since the MCU domain contains internal clock dividers controllable through the PRCM.

Parameters
ui32ClkSrcis the clock source for the MCU domain when in power down. Values available as clock source:
Returns
None
227 {
228  uint32_t ui32Reg;
229 
230  // Check the arguments.
231  ASSERT((ui32ClkSrc == AONWUC_NO_CLOCK) ||
232  (ui32ClkSrc == AONWUC_CLOCK_SRC_LF));
233 
234  // Set the clock source for the MCU domain when in power down.
235  ui32Reg = HWREG(AON_WUC_BASE + AON_WUC_O_MCUCLK);
236  ui32Reg &= ~AON_WUC_MCUCLK_PWR_DWN_SRC_M;
237  HWREG(AON_WUC_BASE + AON_WUC_O_MCUCLK) = ui32Reg |
238  (ui32ClkSrc <<
240 }
#define AONWUC_CLOCK_SRC_LF
Definition: aon_wuc.h:98
#define ASSERT(expr)
Definition: debug.h:73
#define AONWUC_NO_CLOCK
Definition: aon_wuc.h:100
static void AONWUCMcuPowerOffConfig ( uint32_t  ui32Mode)
inlinestatic

Configure the power down mode for the MCU domain.

The parameter ui32Mode determines the power down mode of the MCU Voltage Domain. When the AON WUC receives a request to power off the MCU domain it can choose to power off completely or use a virtual power-off. In a virtual power-off, reset is asserted and the clock is stopped but the power to the domain is kept on.

Parameters
ui32Modedefines the power down mode of the MCU domain. Allowed values for setting the virtual power-off are:
Returns
None
262 {
263  // Check the arguments.
264  ASSERT((ui32Mode == MCU_VIRT_PWOFF_ENABLE) ||
265  (ui32Mode == MCU_VIRT_PWOFF_DISABLE));
266 
267  // Set the powerdown mode.
268  HWREGBITW(AON_WUC_BASE + AON_WUC_O_MCUCFG, AON_WUC_MCUCFG_VIRT_OFF_BITN) = (ui32Mode != 0);
269 }
#define MCU_VIRT_PWOFF_ENABLE
Definition: aon_wuc.h:125
#define ASSERT(expr)
Definition: debug.h:73
#define MCU_VIRT_PWOFF_DISABLE
Definition: aon_wuc.h:124
static void AONWUCMcuResetClear ( uint32_t  ui32Status)
inlinestatic

Use this function to clear specific status bits.

Use this function to clear the bits that are set in the AON WUC status register. This register requires a write 1 to clear.

AON Wake Up Controller TAP can request a total/full Flash erase. If so, the corresponding status bits will be set in the status register and can be read using AONWUCMcuResetStatusGet() or cleared using this function. The reset source and type give information about what and how the latest reset was performed. Access to these bits are identical to the flash erase bits.

Parameters
ui32Statusdefines in a one-hot encoding which bits to clear in the status register. Use OR'ed combinations of the following:
Returns
None
641 {
642  // Check the arguments.
643  ASSERT((ui32Status & AONWUC_MCU_RESET_SRC) ||
644  (ui32Status & AONWUC_MCU_WARM_RESET));
645 
646  // Clear the status bits.
647  HWREG(AON_WUC_BASE + AON_WUC_O_CTL1) = ui32Status;
648 }
#define AONWUC_MCU_WARM_RESET
Definition: aon_wuc.h:196
#define AONWUC_MCU_RESET_SRC
Definition: aon_wuc.h:194
#define ASSERT(expr)
Definition: debug.h:73
static uint32_t AONWUCMcuResetStatusGet ( void  )
inlinestatic

Return the reset status.

This function returns the value of the AON_WUC_O_CTL1 register.

Returns
Returns the status from the AON WUC.
661 {
662  // Return the current status.
663  return (HWREG(AON_WUC_BASE + AON_WUC_O_CTL1));
664 }
static void AONWUCMcuSRamConfig ( uint32_t  ui32Retention)
inlinestatic

Configure the retention on the block RAM in the MCU domain.

MCU SRAM is partitioned into 4 banks of 1k x 32 each. The SRAM supports retention on all 4 blocks. The retention on the SRAM can be turned on and off. Use this function to enable the retention on the individual blocks.

If a block is not represented in the parameter ui32Retention then the the retention will be disabled for that block.

Note
Retention on the SRAM is not enabled by default. If retention is turned off on all RAM blocks then the SRAM is powered off when it would otherwise be put in retention mode.
Parameters
ui32Retentiondefines which RAM blocks to enable/disable retention on. To enable retention on individual parts of the RAM use a bitwise OR'ed combination of:
Returns
None
328 {
329  uint32_t ui32Reg;
330 
331  // Check the arguments.
332  ASSERT(ui32Retention & MCU_RAM_BLOCK_RETENTION);
333  ASSERT(!(ui32Retention & ~MCU_RAM_BLOCK_RETENTION));
334 
335  // Configure the retention.
337  ui32Reg |= ui32Retention;
338  HWREG(AON_WUC_BASE + AON_WUC_O_MCUCFG) = ui32Reg;
339 }
#define ASSERT(expr)
Definition: debug.h:73
#define MCU_RAM_BLOCK_RETENTION
Definition: aon_wuc.h:143
static void AONWUCMcuWakeUpConfig ( uint32_t  ui32WakeUp)
inlinestatic

Configure the wake-up procedure for the MCU domain.

The MCU domain can wake up using two different procedures. Either it wakes up immediately following the triggering event or wake-up is forced to happen a fixed number of 32 KHz clocks following the triggering event. The last can be used to compensate for any variable delays caused by other activities going on at the time of wakeup (such as a recharge event, etc.).

Parameters
ui32WakeUpdetermines the timing of the MCU wake up procedure.
Returns
None
291 {
292  // Check the arguments.
293  ASSERT((ui32WakeUp == MCU_IMM_WAKE_UP) ||
294  (ui32WakeUp == MCU_FIXED_WAKE_UP));
295 
296  // Configure the wake up procedure.
297  HWREGBITW(AON_WUC_BASE + AON_WUC_O_MCUCFG, AON_WUC_MCUCFG_FIXED_WU_EN_BITN) = (ui32WakeUp != 0);
298 }
#define MCU_IMM_WAKE_UP
Definition: aon_wuc.h:126
#define MCU_FIXED_WAKE_UP
Definition: aon_wuc.h:127
#define ASSERT(expr)
Definition: debug.h:73
void AONWUCOscConfig ( uint32_t  ui32Period)

Configure the interval for oscillator amplitude calibration.

Use this function to set the number of 32 kHz clocks between oscillator amplitude calibrations.

The value of the interval is defined by the formula:

  Period = ({ulMantissa,5'b1111} << ui32Exponent)
Note
When this counter expires an oscillator amplitude calibration is triggered immediately in Active mode. When this counter expires in Powerdown mode an internal flag is set that causes GBIAS to turn on together with BGAP when the next recharge occurs, at the same time triggering the oscillator amplitude calibration as well as a recharge of the uLDO reference voltage.
The oscillator amplitude calibration is performed at the same time as the recharge for the uLDO reference voltage. So the maximum period between each recharge operation should not exceed the number of clock cycles for the amplitude calibration.
Parameters
ui32Periodis the number of 32 kHz clock cycles in each interval.
Returns
None
195 {
196  uint32_t ui32Mantissa;
197  uint32_t ui32Exponent;
198  uint32_t ui32Reg;
199 
200  // Resolve the period into a exponent and mantissa.
201  ui32Period = (ui32Period >> 4);
202  ui32Exponent = 0;
203  while(ui32Period > (AON_WUC_OSCCFG_PER_M_M >> AON_WUC_OSCCFG_PER_M_S))
204  {
205  ui32Period >>= 1;
206  ui32Exponent++;
207  }
208  ui32Mantissa = ui32Period;
209 
210  // Update the period for the oscillator amplitude calibration.
211  HWREG(AON_WUC_BASE + AON_WUC_O_OSCCFG) =
212  (ui32Mantissa << AON_WUC_OSCCFG_PER_M_S) |
213  (ui32Exponent << AON_WUC_OSCCFG_PER_E_S);
214 
215  // Set the maximum recharge period equal to the oscillator amplitude
216  // calibration period.
217  ui32Reg = HWREG(AON_WUC_BASE + AON_WUC_O_RECHARGECFG);
219  ui32Reg |= ((ui32Mantissa << AON_WUC_RECHARGECFG_MAX_PER_M_S) |
220  (ui32Exponent << AON_WUC_RECHARGECFG_MAX_PER_E_S));
221 
222  // Write the configuration.
223  HWREG(AON_WUC_BASE + AON_WUC_O_RECHARGECFG) = ui32Reg;
224 }
static uint32_t AONWUCPowerStatusGet ( void  )
inlinestatic

Get the power status of the device.

The Always On (AON) domain is the only part of the device which is truly "ALWAYS ON". The power status for the other device can always be read from this status register.

Possible power modes for the different parts of the device are:

Returns
Returns the current power status of the device as a bitwise OR'ed combination of these values:
543 {
544  // Return the power status.
545  return (HWREG(AON_WUC_BASE + AON_WUC_O_PWRSTAT));
546 }
static uint32_t AONWUCRechargeCtrlConfigGet ( void  )
inlinestatic

Get the current configuration of the recharge controller.

This function returns the value of the register AON_WUC_O_RECHARGECFG.

Returns
Returns the current configuration of the recharge controller.
735 {
736  // Return the current configuration.
737  return(HWREG(AON_WUC_BASE + AON_WUC_O_RECHARGECFG));
738 }
void AONWUCRechargeCtrlConfigSet ( bool  bAdaptEnable,
uint32_t  ui32AdaptRate,
uint32_t  ui32Period,
uint32_t  ui32MaxPeriod 
)

Configure the recharge controller.

The parameter bAdaptEnable is used to enable or disable the adaptive algorithm for the recharge controller. The adaptive algorithm for the recharge controller is defined as

  New_Period = Period * (1 + (AdaptRate / 1024) )

      AdaptRate
     ----------- = ( 2^(-C1) + 2^(-C2)  )
        1024

Where C1 is between 1 and 10 and C2 is between 2 and 10. The ui32AdaptRate must be a number between 2 and 768 (RC_RATE_MIN and RC_RATE_MAX) resulting in an adaptive rate between 0.2% and 75%.

The ui32Period is the number of 32 KHz clocks between two recharges. The length of the interval is defined by the formula:

  Period = ({ulMantissa,5'b1111} << ui32Exponent)
Note
The maximum number of recharge cycles is required when enabling the adaptive recharge algorithm.
The maximum period between two recharges should never exceed the period between two oscillator amplitude calibrations which is configured using AONWUCOscConfig().
Parameters
bAdaptEnableenables the adaptation algorithm for the controller.
ui32AdaptRatedetermines the adjustment value for the adoption algorithm.
ui32Perioddetermines the number of clock cycles between each activation of the recharge controller.
ui32MaxPerioddetermines the maximum number of clock cycles between each activation of the recharge controller.
Returns
None
88 {
89  uint32_t ui32Shift;
90  uint32_t ui32C1;
91  uint32_t ui32C2;
92  uint32_t ui32Reg;
93  uint32_t ui32Exponent;
94  uint32_t ui32MaxExponent;
95  uint32_t ui32Mantissa;
96  uint32_t ui32MaxMantissa;
97 
98  // Check the arguments.
99  ASSERT((ui32AdaptRate >= RC_RATE_MIN) ||
100  (ui32AdaptRate <= RC_RATE_MAX));
101 
102  ui32C1 = 0;
103  ui32C2 = 0;
104  ui32Shift = 9;
105 
106  // Clear the previous values.
107  ui32Reg = HWREG(AON_WUC_BASE + AON_WUC_O_RECHARGECFG);
112 
113  // Check if the recharge controller adaptation algorithm should be active.
114  if(bAdaptEnable)
115  {
116  // Calculate adaptation parameters.
117  while(ui32AdaptRate)
118  {
119  if(ui32AdaptRate & (1 << ui32Shift))
120  {
121  if(!ui32C1)
122  {
123  ui32C1 = ui32Shift;
124  }
125  else if(!ui32C2)
126  {
127  if((2 * ui32AdaptRate) > ((uint32_t)(3 << ui32Shift)))
128  {
129  ui32C2 = ui32Shift + 1;
130  }
131  else
132  {
133  ui32C2 = ui32Shift;
134  }
135  }
136  else
137  {
138  break;
139  }
140  ui32AdaptRate &= ~(1 << ui32Shift);
141  }
142  ui32Shift--;
143  }
144  if(!ui32C2)
145  {
146  ui32C2 = ui32C1 = ui32C1 - 1;
147  }
148 
149  ui32C1 = 10 - ui32C1;
150  ui32C2 = 10 - ui32C2;
151 
152  // Update the recharge rate parameters.
154  ui32Reg |= (ui32C1 << AON_WUC_RECHARGECFG_C1_S) |
155  (ui32C2 << AON_WUC_RECHARGECFG_C2_S) |
157  }
158 
159  // Resolve the period into an exponent and mantissa.
160  ui32Period = (ui32Period >> 4);
161  ui32Exponent = 0;
163  {
164  ui32Period >>= 1;
165  ui32Exponent++;
166  }
167  ui32Mantissa = ui32Period;
168 
169  // Resolve the max period into an exponent and mantissa.
170  ui32MaxPeriod = (ui32MaxPeriod >> 4);
171  ui32MaxExponent = 0;
173  {
174  ui32MaxPeriod >>= 1;
175  ui32MaxExponent++;
176  }
177  ui32MaxMantissa = ui32MaxPeriod;
178 
179  // Configure the controller.
180  ui32Reg |= ((ui32MaxMantissa << AON_WUC_RECHARGECFG_MAX_PER_M_S) |
181  (ui32MaxExponent << AON_WUC_RECHARGECFG_MAX_PER_E_S) |
182  (ui32Mantissa << AON_WUC_RECHARGECFG_PER_M_S) |
183  (ui32Exponent << AON_WUC_RECHARGECFG_PER_E_S));
184  HWREG(AON_WUC_BASE + AON_WUC_O_RECHARGECFG) = ui32Reg;
185 
186 }
#define RC_RATE_MIN
Definition: aon_wuc.h:190
#define ASSERT(expr)
Definition: debug.h:73
#define RC_RATE_MAX
Definition: aon_wuc.h:188
static void AONWUCShutDownEnable ( void  )
inlinestatic

Enable shut-down of the device.

Use this function to enable shut-down of the device. This will force all I/O values to be latched - possibly enabling I/O wakeup - then all internal power supplies are turned off, effectively putting the device into shut-down mode.

Note
No action will take place before the System CPU is put to deep sleep.
The shut-down command is ignored if the JTAG interface has been activated.
Returns
None
566 {
567  // Ensure the JTAG domain is turned off;
568  // otherwise MCU domain can't be turned off.
569  HWREG(AON_WUC_BASE + AON_WUC_O_JTAGCFG) = 0;
570 
571  // Enable shutdown of the device.
574 }

Macro Definition Documentation

#define AONWUC_AUX_ALLOW_SLEEP   0x00000000

Referenced by AONWUCAuxWakeupEvent().

#define AONWUC_AUX_BGAP_REQ   0x00020000
#define AONWUC_AUX_GBIAS_REQ   0x00200000
#define AONWUC_AUX_POWER_DOWN   0x00000200
#define AONWUC_AUX_POWER_ON   0x00000020
#define AONWUC_AUX_WAKEUP   0x00000001

Referenced by AONWUCAuxWakeupEvent().

#define AONWUC_BGAP_ON   0x00001000
#define AONWUC_CLOCK_SRC_HF   0x00000003
#define AONWUC_CLOCK_SRC_LF   0x00000001
#define AONWUC_GBIAS_ON   0x00002000
#define AONWUC_JTAG_POWER_ON   0x00000040
#define AONWUC_MCU_BGAP_REQ   0x00010000
#define AONWUC_MCU_GBIAS_REQ   0x00100000
#define AONWUC_MCU_POWER_DOWN   0x00000100
#define AONWUC_MCU_POWER_ON   0x00000010
#define AONWUC_MCU_RESET_SRC   0x00000002

Referenced by AONWUCMcuResetClear().

#define AONWUC_MCU_WARM_RESET   0x00000001

Referenced by AONWUCMcuResetClear().

#define AONWUC_NO_CLOCK   0x00000000
#define AONWUC_OSC_BGAP_REQ   0x00040000
#define AONWUC_OSC_GBIAS_REQ   0x00400000
#define AONWUC_SPLY_POWER_DOWN   0x00000001
#define AUX_CLOCK_DIV_128   ( AON_WUC_AUXCLK_SCLK_HF_DIV_DIV128 )
#define AUX_CLOCK_DIV_16   ( AON_WUC_AUXCLK_SCLK_HF_DIV_DIV16 )
#define AUX_CLOCK_DIV_2   ( AON_WUC_AUXCLK_SCLK_HF_DIV_DIV2 )
#define AUX_CLOCK_DIV_256   ( AON_WUC_AUXCLK_SCLK_HF_DIV_DIV256 )
#define AUX_CLOCK_DIV_32   ( AON_WUC_AUXCLK_SCLK_HF_DIV_DIV32 )
#define AUX_CLOCK_DIV_4   ( AON_WUC_AUXCLK_SCLK_HF_DIV_DIV4 )
#define AUX_CLOCK_DIV_64   ( AON_WUC_AUXCLK_SCLK_HF_DIV_DIV64 )
#define AUX_CLOCK_DIV_8   ( AON_WUC_AUXCLK_SCLK_HF_DIV_DIV8 )
#define AUX_CLOCK_DIV_M   ( AON_WUC_AUXCLK_SCLK_HF_DIV_M )
#define AUX_CLOCK_DIV_UNUSED   ( AON_WUC_AUXCLK_SCLK_HF_DIV_M + ( 1 << AON_WUC_AUXCLK_SCLK_HF_DIV_S ))
#define AUX_FIXED_WAKE_UP   0x00010000
#define AUX_IMM_WAKE_UP   0x00000000
#define AUX_RAMREPAIR_DONE   0x00000002
#define AUX_VIRT_PWOFF_DISABLE   0x00000000
#define AUX_VIRT_PWOFF_ENABLE   0x00020000
#define MCU_AUX_RET_ENABLE   0x00000001
#define MCU_FIXED_WAKE_UP   0x00010000

Referenced by AONWUCMcuWakeUpConfig().

#define MCU_IMM_WAKE_UP   0x00000000

Referenced by AONWUCMcuWakeUpConfig().

#define MCU_RAM0_RETENTION   0x00000001
#define MCU_RAM1_RETENTION   0x00000002
#define MCU_RAM2_RETENTION   0x00000004
#define MCU_RAM3_RETENTION   0x00000008
#define MCU_RAM_BLOCK_RETENTION   0x0000000F

Referenced by AONWUCMcuSRamConfig().

#define MCU_RAMREPAIR_DONE   0x00000001
#define MCU_VIRT_PWOFF_DISABLE   0x00000000

Referenced by AONWUCMcuPowerOffConfig().

#define MCU_VIRT_PWOFF_ENABLE   0x00020000

Referenced by AONWUCMcuPowerOffConfig().

#define RC_RATE_MAX   768
#define RC_RATE_MIN   2