3.2. Linux Boot Flow

On K3 architecture based devices, the ROM only supports boot via R5. This means that the bootloader has to run on the R5 core. The Linux boot architecture is shown in the below figure. This boot architecture keeps safety in mind, while also allowing for a faster boot time.

+------------------------------------------------------------------------+
|      SMS(M4)           |        R5             |        A53            |
+------------------------------------------------------------------------+
|    +--------+          |                       |                       |
|    |  Reset |          |                       |                       |
|    +--------+          |                       |                       |
|         :              |                       |                       |
|    +--------+          |   +-----------+       |                       |
|    | *ROM*  |----------|-->| Reset rls |       |                       |
|    +--------+          |   +-----------+       |                       |
|    |        |          |         :             |                       |
|    |  ROM   |          |         :             |                       |
|    |services|          |         :             |                       |
|    |        |          |   +-------------+     |                       |
|    |        |          |   |  *R5 ROM*   |     |                       |
|    |        |          |   +-------------+     |                       |
|    |        |<---------|---|Load and auth|     |                       |
|    |        |          |   | tiboot3.bin |     |                       |
|    +--------+          |   +-------------+     |                       |
|    |        |<---------|---| Load sysfw  |     |                       |
|    |        |          |   | part to SMS |     |                       |
|    |        |          |   | core        |     |                       |
|    |        |          |   +-------------+     |                       |
|    |        |          |         :             |                       |
|    |        |          |         :             |                       |
|    |        |          |         :             |                       |
|    |        |          |   +-------------+     |                       |
|    |        |          |   |  *R5 SPL*   |     |                       |
|    |        |          |   +-------------+     |                       |
|    |        |          |   |    DDR      |     |                       |
|    |        |          |   |   config    |     |                       |
|    |        |          |   +-------------+     |                       |
|    |        |          |   |    Load     |     |                       |
|    |        |          |   |  tispl.bin  |     |                       |
|    |        |          |   +-------------+     |                       |
|    |        |          |   |   Load R5   |     |                       |
|    |        |          |   |   firmware  |     |                       |
|    |        |          |   +-------------+     |                       |
|    |        |<---------|---| Start A53   |     |                       |
|    |        |          |   | and jump to |     |                       |
|    |        |          |   | DM fw image |     |                       |
|    |        |          |   +-------------+     |                       |
|    |        |          |                       |     +-----------+     |
|    |        |----------|-----------------------|---->| Reset rls |     |
|    |        |          |                       |     +-----------+     |
|    |  TIFS  |          |                       |          :            |
|    |Services|          |                       |     +-----------+     |
|    |        |<---------|-----------------------|---->|*ATF/OPTEE*|     |
|    |        |          |                       |     +-----------+     |
|    |        |          |                       |          :            |
|    |        |          |                       |     +-----------+     |
|    |        |<---------|-----------------------|---->| *A53 SPL* |     |
|    |        |          |                       |     +-----------+     |
|    |        |          |                       |     |   Load    |     |
|    |        |          |                       |     | u-boot.img|     |
|    |        |          |                       |     +-----------+     |
|    |        |          |                       |          :            |
|    |        |          |                       |     +-----------+     |
|    |        |<---------|-----------------------|---->| *U-Boot*  |     |
|    |        |          |                       |     +-----------+     |
|    |        |          |                       |     |  prompt   |     |
|    |        |          |                       |     +-----------+     |
|    |        |          |                       |     |   Load    |     |
|    |        |          |                       |     |Kernel/DTB |     |
|    |        |          |                       |     +-----------+     |
|    |        |          |                       |          :            |
|    |        |          |                       |     +-----------+     |
|    |        |<---------|-----------------------|---->| *Linux*   |     |
|    |        |          |                       |     +-----------+     |
|    +--------+          |                       |                       |
|                        |                       |                       |
+------------------------------------------------------------------------+

The SMS acts as master and provides all the critical services. R5 & A53 requests SMS to get these services as shown in the above diagram.