Instance: AON_IOC
Component: AON_IOC
Base address: 0x40094000
Always On (AON) IO Controller - controls IO operation when the MCU IO Controller (IOC) is powered off and resides in the AON domain. Note: This module only supports 32 bit Read/Write access from MCU.
|
Register Name |
Type |
Register Width (Bits) |
Register Reset |
Address Offset |
Physical Address |
|
RW |
32 |
0x0000 0003 |
0x0000 0000 |
0x4009 4000 |
|
|
RW |
32 |
0x0000 0006 |
0x0000 0004 |
0x4009 4004 |
|
|
RW |
32 |
0x0000 0005 |
0x0000 0008 |
0x4009 4008 |
|
|
RW |
32 |
0x0000 0001 |
0x0000 0010 |
0x4009 4010 |
|
|
RW |
32 |
0x0000 0001 |
0x0000 0014 |
0x4009 4014 |
| Address Offset | 0x0000 0000 | ||
| Physical Address | 0x4009 4000 | Instance | 0x4009 4000 |
| Description | Internal. Only to be used through TI provided API. | ||
| Type | RW | ||
| Bits | Field Name | Description | Type | Reset | ||
| 31:3 | RESERVED3 | Internal. Only to be used through TI provided API. | RO | 0b0 0000 0000 0000 0000 0000 0000 0000 | ||
| 2:0 | GRAY_CODE | Internal. Only to be used through TI provided API. | RW | 0b011 | ||
| Address Offset | 0x0000 0004 | ||
| Physical Address | 0x4009 4004 | Instance | 0x4009 4004 |
| Description | Internal. Only to be used through TI provided API. | ||
| Type | RW | ||
| Bits | Field Name | Description | Type | Reset | ||
| 31:3 | RESERVED3 | Internal. Only to be used through TI provided API. | RO | 0b0 0000 0000 0000 0000 0000 0000 0000 | ||
| 2:0 | GRAY_CODE | Internal. Only to be used through TI provided API. | RW | 0b110 | ||
| Address Offset | 0x0000 0008 | ||
| Physical Address | 0x4009 4008 | Instance | 0x4009 4008 |
| Description | Internal. Only to be used through TI provided API. | ||
| Type | RW | ||
| Bits | Field Name | Description | Type | Reset | ||
| 31:3 | RESERVED3 | Internal. Only to be used through TI provided API. | RO | 0b0 0000 0000 0000 0000 0000 0000 0000 | ||
| 2:0 | GRAY_CODE | Internal. Only to be used through TI provided API. | RW | 0b101 | ||
| Address Offset | 0x0000 0010 | ||
| Physical Address | 0x4009 4010 | Instance | 0x4009 4010 |
| Description | SCLK_LF External Output Control | ||
| Type | RW | ||
| Bits | Field Name | Description | Type | Reset | ||
| 31:1 | RESERVED1 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RO | 0b000 0000 0000 0000 0000 0000 0000 0000 | ||
| 0 | OE_N | 0: Output enable active. SCLK_LF output on IO pin that has PORT_ID (for example IOC:IOCFG0.PORT_ID) set to AON_CLK32K. 1: Output enable not active |
RW | 1 | ||
| Address Offset | 0x0000 0014 | ||
| Physical Address | 0x4009 4014 | Instance | 0x4009 4014 |
| Description | TCK IO Pin Control | ||
| Type | RW | ||
| Bits | Field Name | Description | Type | Reset | ||
| 31:1 | RESERVED1 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RO | 0b000 0000 0000 0000 0000 0000 0000 0000 | ||
| 0 | EN | 0: Input driver for TCK disabled. 1: Input driver for TCK enabled. |
RW | 1 | ||
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