Instance: ADI_4_AUX
Component: ADI_4_AUX
Base address: 0x400CB000
Configuration registers controlling analog peripherals of AUX. Registers Fields should be considered static unless otherwise noted (as dynamic)
Register Name |
Type |
Register Width (Bits) |
Register Reset |
Address Offset |
Physical Address |
RW |
8 |
0x00 |
0x0000 0000 |
0x400C B000 |
|
RW |
8 |
0x00 |
0x0000 0001 |
0x400C B001 |
|
RW |
8 |
0x00 |
0x0000 0002 |
0x400C B002 |
|
RW |
8 |
0x00 |
0x0000 0003 |
0x400C B003 |
|
RW |
8 |
0x00 |
0x0000 0004 |
0x400C B004 |
|
RW |
8 |
0x00 |
0x0000 0005 |
0x400C B005 |
|
RW |
8 |
0x00 |
0x0000 0007 |
0x400C B007 |
|
RW |
8 |
0x00 |
0x0000 0008 |
0x400C B008 |
|
RW |
8 |
0x00 |
0x0000 0009 |
0x400C B009 |
|
RW |
8 |
0x00 |
0x0000 000A |
0x400C B00A |
|
RW |
8 |
0x00 |
0x0000 000B |
0x400C B00B |
|
RW |
8 |
0x00 |
0x0000 000E |
0x400C B00E |
Address Offset | 0x0000 0000 | ||
Physical Address | 0x400C B000 | Instance | 0x400C B000 |
Description | Internal. Only to be used through TI provided API. | ||
Type | RW |
Bits | Field Name | Description | Type | Reset | ||||||||||||||||||||
7 | RESERVED7 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RW | 0 | ||||||||||||||||||||
6 | ADCCOMPB_IN | Internal. Only to be used through TI provided API.
|
RW | 0 | ||||||||||||||||||||
5:4 | RESERVED4 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RW | 0b00 | ||||||||||||||||||||
3:0 | COMPA_REF | Internal. Only to be used through TI provided API.
|
RW | 0x0 |
Address Offset | 0x0000 0001 | ||
Physical Address | 0x400C B001 | Instance | 0x400C B001 |
Description | Internal. Only to be used through TI provided API. | ||
Type | RW |
Bits | Field Name | Description | Type | Reset | ||||||||||||||||||||||||||||||||
7:0 | COMPA_IN | Internal. Only to be used through TI provided API.
|
RW | 0x00 |
Address Offset | 0x0000 0002 | ||
Physical Address | 0x400C B002 | Instance | 0x400C B002 |
Description | Internal. Only to be used through TI provided API. | ||
Type | RW |
Bits | Field Name | Description | Type | Reset | |||||||||||||||||||||||
7:3 | ADCCOMPB_IN | Internal. Only to be used through TI provided API.
|
RW | 0b0 0000 | |||||||||||||||||||||||
2:0 | DAC_VREF_SEL | Internal. Only to be used through TI provided API.
|
RW | 0b000 |
Address Offset | 0x0000 0003 | ||
Physical Address | 0x400C B003 | Instance | 0x400C B003 |
Description | Internal. Only to be used through TI provided API. | ||
Type | RW |
Bits | Field Name | Description | Type | Reset | ||||||||||||||||||||||||||||||||
7:0 | ADCCOMPB_IN | Internal. Only to be used through TI provided API.
|
RW | 0x00 |
Address Offset | 0x0000 0004 | ||
Physical Address | 0x400C B004 | Instance | 0x400C B004 |
Description | Current Source Strength and trim control for current source. Only to be used through TI provided API. |
||
Type | RW |
Bits | Field Name | Description | Type | Reset | ||||||||||||||||||||||||||
7:2 | TRIM | Adjust current from current source. Output currents may be combined to get desired total current.
|
RW | 0b00 0000 | ||||||||||||||||||||||||||
1 | RESERVED1 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RW | 0 | ||||||||||||||||||||||||||
0 | EN | Current source enable | RW | 0 |
Address Offset | 0x0000 0005 | ||
Physical Address | 0x400C B005 | Instance | 0x400C B005 |
Description | Comparator Control COMPA and COMPB comparators. Only to be used through TI provided API. |
||
Type | RW |
Bits | Field Name | Description | Type | Reset | ||
7 | COMPA_REF_RES_EN | Enables 400kohm resistance from COMPA reference node to ground. Used with COMPA_REF_CURR_EN to generate voltage reference for cap-sense. | RW | 0 | ||
6 | COMPA_REF_CURR_EN | Enables 2uA IPTAT current from ISRC to COMPA reference node. Requires ISRC.EN = 1. Used with COMPA_REF_RES_EN to generate voltage reference for cap-sense. | RW | 0 | ||
5:3 | LPM_BIAS_WIDTH_TRIM | Internal. Only to be used through TI provided API. | RW | 0b000 | ||
2 | COMPB_EN | COMPB enable | RW | 0 | ||
1 | RESERVED1 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RW | 0 | ||
0 | COMPA_EN | COMPA enable | RW | 0 |
Address Offset | 0x0000 0007 | ||
Physical Address | 0x400C B007 | Instance | 0x400C B007 |
Description | Internal. Only to be used through TI provided API. | ||
Type | RW |
Bits | Field Name | Description | Type | Reset | ||||||||||||||||||||||||||||||||
7:0 | COMPA_REF | Internal. Only to be used through TI provided API.
|
RW | 0x00 |
Address Offset | 0x0000 0008 | ||
Physical Address | 0x400C B008 | Instance | 0x400C B008 |
Description | ADC Control 0 ADC Sample Control. Only to be used through TI provided API. |
||
Type | RW |
Bits | Field Name | Description | Type | Reset | ||||||||||||||||||||||||||||||||||||||||||||
7 | SMPL_MODE | ADC Sampling mode: 0: Synchronous mode 1: Asynchronous mode The ADC does a sample-and-hold before conversion. In synchronous mode the sampling starts when the ADC clock detects a rising edge on the trigger signal. Jitter/uncertainty will be inferred in the detection if the trigger signal originates from a domain that is asynchronous to the ADC clock. SMPL_CYCLE_EXP determines the the duration of sampling. Conversion starts immediately after sampling ends. In asynchronous mode the sampling is continuous when enabled. Sampling ends and conversion starts immediately with the rising edge of the trigger signal. Sampling restarts when the conversion has finished. Asynchronous mode is useful when it is important to avoid jitter in the sampling instant of an externally driven signal |
RW | 0 | ||||||||||||||||||||||||||||||||||||||||||||
6:3 | SMPL_CYCLE_EXP | Controls the sampling duration before conversion when the ADC is operated in synchronous mode (SMPL_MODE = 0). The setting has no effect in asynchronous mode. The sampling duration is given as 2^(SMPL_CYCLE_EXP + 1) / 6 us.
|
RW | 0x0 | ||||||||||||||||||||||||||||||||||||||||||||
2 | RESERVED2 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RW | 0 | ||||||||||||||||||||||||||||||||||||||||||||
1 | RESET_N | Reset ADC digital subchip, active low. ADC must be reset every time it is reconfigured. 0: Reset 1: Normal operation |
RW | 0 | ||||||||||||||||||||||||||||||||||||||||||||
0 | EN | ADC Enable 0: Disable 1: Enable |
RW | 0 |
Address Offset | 0x0000 0009 | ||
Physical Address | 0x400C B009 | Instance | 0x400C B009 |
Description | ADC Control 1 ADC Comparator Control. Only to be used through TI provided API. |
||
Type | RW |
Bits | Field Name | Description | Type | Reset | ||
7:1 | RESERVED1 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RW | 0b000 0000 | ||
0 | SCALE_DIS | Internal. Only to be used through TI provided API. | RW | 0 |
Address Offset | 0x0000 000A | ||
Physical Address | 0x400C B00A | Instance | 0x400C B00A |
Description | ADC Reference 0 Control reference used by the ADC. Only to be used through TI provided API. |
||
Type | RW |
Bits | Field Name | Description | Type | Reset | ||
7 | SPARE7 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RW | 0 | ||
6 | REF_ON_IDLE | Enable ADCREF in IDLE state. 0: Disabled in IDLE state 1: Enabled in IDLE state Keep ADCREF enabled when ADC0.SMPL_MODE = 0. Recommendation: Enable ADCREF always when ADC0.SMPL_CYCLE_EXP is less than 0x6 (21.3us sampling time). |
RW | 0 | ||
5 | IOMUX | Internal. Only to be used through TI provided API. | RW | 0 | ||
4 | EXT | Internal. Only to be used through TI provided API. | RW | 0 | ||
3 | SRC | ADC reference source: 0: Fixed reference = 4.3V 1: Relative reference = VDDS |
RW | 0 | ||
2:1 | RESERVED1 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RW | 0b00 | ||
0 | EN | ADC reference module enable: 0: ADC reference module powered down 1: ADC reference module enabled |
RW | 0 |
Address Offset | 0x0000 000B | ||
Physical Address | 0x400C B00B | Instance | 0x400C B00B |
Description | ADC Reference 1 Control reference used by the ADC. Only to be used through TI provided API. |
||
Type | RW |
Bits | Field Name | Description | Type | Reset | ||
7:6 | RESERVED6 | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. | RW | 0b00 | ||
5:0 | VTRIM | Trim output voltage of ADC fixed reference (64 steps, 2's complement). Applies only for ADCREF0.SRC = 0. Examples: 0x00 - nominal voltage 1.43V 0x01 - nominal + 0.4% 1.435V 0x3F - nominal - 0.4% 1.425V 0x1F - maximum voltage 1.6V 0x20 - minimum voltage 1.3V |
RW | 0b00 0000 |
Address Offset | 0x0000 000E | ||
Physical Address | 0x400C B00E | Instance | 0x400C B00E |
Description | Internal. Only to be used through TI provided API. | ||
Type | RW |
Bits | Field Name | Description | Type | Reset | ||
7:6 | SPARE6 | Internal. Only to be used through TI provided API. | RW | 0b00 | ||
5:0 | LPM_TRIM_IOUT | Internal. Only to be used through TI provided API. | RW | 0b00 0000 |
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