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UARTCC26XX Hardware attributes. More...
#include <UARTCC26XX.h>
Data Fields | |
| uint32_t | baseAddr |
| uint32_t | powerMngrId |
| int | intNum |
| uint8_t | intPriority |
| UART Peripheral's interrupt priority. More... | |
| uint32_t | swiPriority |
| SPI SWI priority. The higher the number, the higher the priority. The minimum is 0 and the maximum is 15 by default. The maximum can be reduced to save RAM by adding or modifying Swi.numPriorities in the kernel configuration file. More... | |
| uint8_t | txPin |
| uint8_t | rxPin |
| uint8_t | ctsPin |
| uint8_t | rtsPin |
| unsigned char * | ringBufPtr |
| size_t | ringBufSize |
| UARTCC26XX_FifoThreshold | txIntFifoThr |
| UARTCC26XX_FifoThreshold | rxIntFifoThr |
| UARTCC26XX_ErrorCallback | errorFxn |
UARTCC26XX Hardware attributes.
These fields, with the exception of intPriority, txIntFifoThr and rxIntFifoThr, are used by driverlib APIs and therefore must be populated by driverlib macro definitions. For CC26xxWare these definitions are found in:
intPriority is the UART peripheral's interrupt priority, as defined by the underlying OS. It is passed unmodified to the underlying OS's interrupt handler creation code, so you need to refer to the OS documentation for usage. For example, for SYS/BIOS applications, refer to the ti.sysbios.family.arm.m3.Hwi documentation for SYS/BIOS usage of interrupt priorities. If the driver uses the ti.dpl interface instead of making OS calls directly, then the HwiP port handles the interrupt priority in an OS specific way. In the case of the SYS/BIOS port, intPriority is passed unmodified to Hwi_create().
A sample structure is shown below:
The .ctsPin and .rtsPin must be assigned to enable flow control.
| uint32_t UARTCC26XX_HWAttrsV2::baseAddr |
UART Peripheral's base address
| uint32_t UARTCC26XX_HWAttrsV2::powerMngrId |
UART Peripheral's power manager ID
| int UARTCC26XX_HWAttrsV2::intNum |
UART Peripheral's interrupt vector
| uint8_t UARTCC26XX_HWAttrsV2::intPriority |
UART Peripheral's interrupt priority.
The CC26xx uses three of the priority bits, meaning ~0 has the same effect as (7 << 5).
(7 << 5) will apply the lowest priority.
(1 << 5) will apply the highest priority.
Setting the priority to 0 is not supported by this driver.
HWI's with priority 0 ignore the HWI dispatcher to support zero-latency interrupts, thus invalidating the critical sections in this driver.
| uint32_t UARTCC26XX_HWAttrsV2::swiPriority |
SPI SWI priority. The higher the number, the higher the priority. The minimum is 0 and the maximum is 15 by default. The maximum can be reduced to save RAM by adding or modifying Swi.numPriorities in the kernel configuration file.
| uint8_t UARTCC26XX_HWAttrsV2::txPin |
UART TX pin
| uint8_t UARTCC26XX_HWAttrsV2::rxPin |
UART RX pin
| uint8_t UARTCC26XX_HWAttrsV2::ctsPin |
UART CTS pin
| uint8_t UARTCC26XX_HWAttrsV2::rtsPin |
UART RTS pin
| unsigned char* UARTCC26XX_HWAttrsV2::ringBufPtr |
Pointer to an application ring buffer
| size_t UARTCC26XX_HWAttrsV2::ringBufSize |
Size of ringBufPtr
| UARTCC26XX_FifoThreshold UARTCC26XX_HWAttrsV2::txIntFifoThr |
UART TX interrupt FIFO threshold select
| UARTCC26XX_FifoThreshold UARTCC26XX_HWAttrsV2::rxIntFifoThr |
UART RX interrupt FIFO threshold select
| UARTCC26XX_ErrorCallback UARTCC26XX_HWAttrsV2::errorFxn |
Application error function to be called on receive errors