Functions | |
void | IntRegister (uint32_t ui32Interrupt, void(*pfnHandler)(void)) |
Registers a function as an interrupt handler in the dynamic vector table. More... | |
void | IntUnregister (uint32_t ui32Interrupt) |
Unregisters an interrupt handler in the dynamic vector table. More... | |
void | IntPriorityGroupingSet (uint32_t ui32Bits) |
Sets the priority grouping of the interrupt controller. More... | |
uint32_t | IntPriorityGroupingGet (void) |
Gets the priority grouping of the interrupt controller. More... | |
void | IntPrioritySet (uint32_t ui32Interrupt, uint8_t ui8Priority) |
Sets the priority of an interrupt. More... | |
int32_t | IntPriorityGet (uint32_t ui32Interrupt) |
Gets the priority of an interrupt. More... | |
void | IntEnable (uint32_t ui32Interrupt) |
Enables an interrupt or system exception. More... | |
void | IntDisable (uint32_t ui32Interrupt) |
Disables an interrupt or system exception. More... | |
void | IntPendSet (uint32_t ui32Interrupt) |
Pends an interrupt. More... | |
bool | IntPendGet (uint32_t ui32Interrupt) |
Checks if an interrupt is pending. More... | |
void | IntPendClear (uint32_t ui32Interrupt) |
Unpends an interrupt. More... | |
static bool | IntMasterEnable (void) |
Enables the CPU interrupt. More... | |
static bool | IntMasterDisable (void) |
Disables the CPU interrupts with configurable priority. More... | |
static void | IntPriorityMaskSet (uint32_t ui32PriorityMask) |
Sets the priority masking level. More... | |
static uint32_t | IntPriorityMaskGet (void) |
Gets the priority masking level. More... | |
The interrupt controller API provides a set of functions for dealing with the Nested Vectored Interrupt Controller (NVIC). Functions are provided to enable and disable interrupts, register interrupt handlers, and set the priority of interrupts.
The event sources that trigger the interrupt lines in the NVIC are controlled by the MCU event fabric. All event sources are statically connected to the NVIC interrupt lines except one which is programmable. For more information about the MCU event fabric, see the MCU event fabric API.
Interrupts and system exceptions must be individually enabled and disabled through:
The global CPU interrupt can be enabled and disabled with the following functions:
This does not affect the individual interrupt enable states. Masking of the CPU interrupt can be used as a simple critical section (only an NMI can interrupt the CPU while the CPU interrupt is disabled), although masking the CPU interrupt can increase the interrupt response time.
It is possible to access the NVIC to see if any interrupts are pending and manually clear pending interrupts which have not yet been serviced or set a specific interrupt as pending to be handled based on its priority. Pending interrupts are cleared automatically when the interrupt is accepted and executed. However, the event source which caused the interrupt might need to be cleared manually to avoid re-triggering the corresponding interrupt. The functions to read, clear, and set pending interrupts are:
The interrupt prioritization in the NVIC allows handling of higher priority interrupts before lower priority interrupts, as well as allowing preemption of lower priority interrupt handlers by higher priority interrupts. The device supports eight priority levels from 0 to 7 with 0 being the highest priority. The priority of each interrupt source can be set and examined using:
Interrupts can be masked based on their priority such that interrupts with the same or lower priority than the mask are effectively disabled. This can be configured with:
Subprioritization is also possible. Instead of having three bits of preemptable prioritization (eight levels), the NVIC can be configured for 3 - M bits of preemptable prioritization and M bits of subpriority. In this scheme, two interrupts with the same preemptable prioritization but different subpriorities do not cause a preemption. Instead, tail chaining is used to process the two interrupts back-to-back. If two interrupts with the same priority (and subpriority if so configured) are asserted at the same time, the one with the lower interrupt number is processed first. Subprioritization is handled by:
The interrupt vector table can be configured in one of two ways:
When configured, the interrupts must be explicitly enabled in the NVIC through IntEnable() before the CPU can respond to the interrupt (in addition to any interrupt enabling required within the peripheral).
Static registration of interrupt handlers is accomplished by editing the interrupt handler table in the startup code of the application. Texas Instruments provides startup files for each supported compiler ( startup_<compiler>.c
) and these startup files include a default static interrupt vector table. All entries, except ResetISR, are declared as extern
with weak assignment to a default interrupt handler. This allows the user to declare and define a function (in the user's code) with the same name as an entry in the vector table. At compile time, the linker then replaces the pointer to the default interrupt handler in the vector table with the pointer to the interrupt handler defined by the user.
Statically configuring the interrupt table provides the fastest interrupt response time because the stacking operation (a write to SRAM on the data bus) is performed in parallel with the interrupt handler table fetch (a read from Flash on the instruction bus), as well as the prefetch of the interrupt handler (assuming it is also in Flash).
Alternatively, interrupts can be registered in the vector table at runtime, thus dynamically. The dynamic vector table is placed in SRAM and the code can then modify the pointers to interrupt handlers throughout the application.
DriverLib uses these two functions to modify the dynamic vector table:
Runtime configuration of interrupts adds a small latency to the interrupt response time because the stacking operation (a write to SRAM on the data bus) and the interrupt handler fetch from the vector table (a read from SRAM on the instruction bus) must be performed sequentially.
The dynamic vector table, g_pfnRAMVectors, is placed in SRAM in the section called vtable_ram
which is a section defined in the linker file. By default the linker file places this section at the start of the SRAM but this is configurable by the user.
void IntDisable | ( | uint32_t | ui32Interrupt | ) |
Disables an interrupt or system exception.
This function disables the specified interrupt in the interrupt controller.
ui32Interrupt | specifies the index in the vector table to disable.
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Referenced by AESIntUnregister(), AESWriteToKeyStore(), CRYPTOAesEcbStatus(), CRYPTOAesLoadKey(), CRYPTOCcmAuthEncrypt(), CRYPTOCcmAuthEncryptStatus(), CRYPTOCcmInvAuthDecrypt(), CRYPTOCcmInvAuthDecryptStatus(), CRYPTOIntUnregister(), FlashIntUnregister(), I2CIntUnregister(), I2SIntUnregister(), IOCIntUnregister(), SSIIntUnregister(), TimerIntUnregister(), TRNGIntUnregister(), UARTIntUnregister(), uDMAIntUnregister(), and WatchdogIntUnregister().
void IntEnable | ( | uint32_t | ui32Interrupt | ) |
Enables an interrupt or system exception.
This function enables the specified interrupt in the interrupt controller.
ui32Interrupt | specifies the index in the vector table to enable.
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Referenced by AESIntRegister(), AESWriteToKeyStore(), CRYPTOAesCbc(), CRYPTOAesEcb(), CRYPTOCcmAuthEncrypt(), CRYPTOCcmInvAuthDecrypt(), CRYPTOIntRegister(), FlashIntRegister(), I2CIntRegister(), I2SIntRegister(), IOCIntRegister(), SSIIntRegister(), TimerIntRegister(), TRNGIntRegister(), UARTIntRegister(), uDMAIntRegister(), and WatchdogIntRegister().
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inlinestatic |
Disables the CPU interrupts with configurable priority.
Prevents the CPU from receiving interrupts except NMI and hard fault. This does not affect the set of interrupts enabled in the interrupt controller; it just gates the interrupt from the interrupt controller to the CPU.
true
: Interrupts were already disabled when the function was called.false
: Interrupts were enabled and are now disabled.
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inlinestatic |
Enables the CPU interrupt.
Allows the CPU to respond to interrupts.
true
: Interrupts were disabled and are now enabled.false
: Interrupts were already enabled when the function was called. void IntPendClear | ( | uint32_t | ui32Interrupt | ) |
Unpends an interrupt.
This function unpends the specified interrupt in the interrupt controller. This causes any previously generated interrupts that have not been handled yet (due to higher priority interrupts or the interrupt no having been enabled yet) to be discarded.
ui32Interrupt | specifies the index in the vector table to unpend.
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Referenced by AESWriteToKeyStore(), CRYPTOAesCbc(), CRYPTOAesEcb(), CRYPTOCcmAuthEncrypt(), and CRYPTOCcmInvAuthDecrypt().
bool IntPendGet | ( | uint32_t | ui32Interrupt | ) |
Checks if an interrupt is pending.
This function checks the interrupt controller to see if an interrupt is pending.
The interrupt must be enabled in order for the corresponding interrupt handler to be executed, so an interrupt can be pending waiting to be enabled or waiting for an interrupt of higher priority to be done executing.
ui32Interrupt | specifies the index in the vector table to check pending status for.
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true
: Specified interrupt is pending.false
: Specified interrupt is not pending. void IntPendSet | ( | uint32_t | ui32Interrupt | ) |
Pends an interrupt.
This function pends the specified interrupt in the interrupt controller. This causes the interrupt controller to execute the corresponding interrupt handler at the next available time, based on the current interrupt state priorities.
This interrupt controller automatically clears the pending interrupt once the interrupt handler is executed.
ui32Interrupt | specifies the index in the vector table to pend.
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int32_t IntPriorityGet | ( | uint32_t | ui32Interrupt | ) |
Gets the priority of an interrupt.
This function gets the priority of an interrupt.
ui32Interrupt | specifies the index in the vector table to read priority of.
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uint32_t IntPriorityGroupingGet | ( | void | ) |
Gets the priority grouping of the interrupt controller.
This function returns the split between preemptable priority levels and subpriority levels in the interrupt priority specification.
void IntPriorityGroupingSet | ( | uint32_t | ui32Bits | ) |
Sets the priority grouping of the interrupt controller.
This function specifies the split between preemptable priority levels and subpriority levels in the interrupt priority specification.
Three bits are available for hardware interrupt prioritization thus priority grouping values of three through seven have the same effect.
ui32Bits | specifies the number of bits of preemptable priority.
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inlinestatic |
Gets the priority masking level.
This function gets the current setting of the interrupt priority masking level. The value returned is the priority level such that all interrupts of that and lesser priority are masked. A value of 0 means that priority masking is disabled.
Smaller numbers correspond to higher interrupt priorities. So for example a priority level mask of 4 will allow interrupts of priority level 0-3, and interrupts with a numerical priority of 4 and greater will be blocked.
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inlinestatic |
Sets the priority masking level.
This function sets the interrupt priority masking level so that all interrupts at the specified or lesser priority level are masked. This can be used to globally disable a set of interrupts with priority below a predetermined threshold. A value of 0 disables priority masking.
Smaller numbers correspond to higher interrupt priorities. So for example a priority level mask of 4 will allow interrupts of priority level 0-3, and interrupts with a numerical priority of 4 and greater will be blocked. The device supports priority levels 0 through 7.
ui32PriorityMask | is the priority level that will be masked.
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void IntPrioritySet | ( | uint32_t | ui32Interrupt, |
uint8_t | ui8Priority | ||
) |
Sets the priority of an interrupt.
This function sets the priority of an interrupt, including system exceptions. When multiple interrupts are asserted simultaneously, the ones with the highest priority are processed before the lower priority interrupts. Smaller numbers correspond to higher interrupt priorities thus priority 0 is the highest interrupt priority.
ui32Interrupt | specifies the index in the vector table to change priority for.
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ui8Priority | specifies the priority of the interrupt.
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void IntRegister | ( | uint32_t | ui32Interrupt, |
void(*)(void) | pfnHandler | ||
) |
Registers a function as an interrupt handler in the dynamic vector table.
This function writes a function pointer to the dynamic interrupt vector table in SRAM to register the function as an interrupt handler (ISR). When the corresponding interrupt occurs, and it has been enabled (see IntEnable()), the function pointer is fetched from the dynamic vector table, and the System CPU will execute the interrupt handler.
ui32Interrupt | specifies the index in the vector table to modify.
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pfnHandler | is a pointer to the function to register as interrupt handler. |
Referenced by AESIntRegister(), CRYPTOIntRegister(), FlashIntRegister(), I2CIntRegister(), I2SIntRegister(), IOCIntRegister(), SSIIntRegister(), SysTickIntRegister(), TimerIntRegister(), TRNGIntRegister(), UARTIntRegister(), uDMAIntRegister(), and WatchdogIntRegister().
void IntUnregister | ( | uint32_t | ui32Interrupt | ) |
Unregisters an interrupt handler in the dynamic vector table.
This function removes an interrupt handler from the dynamic vector table and replaces it with the default interrupt handler IntDefaultHandler().
ui32Interrupt | specifies the index in the vector table to modify.
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Referenced by AESIntUnregister(), CRYPTOIntUnregister(), FlashIntUnregister(), I2CIntUnregister(), I2SIntUnregister(), IOCIntUnregister(), SSIIntUnregister(), SysTickIntUnregister(), TimerIntUnregister(), TRNGIntUnregister(), UARTIntUnregister(), uDMAIntUnregister(), and WatchdogIntUnregister().
#define INT_PRI_LEVEL0 0x00000000 |
#define INT_PRI_LEVEL1 0x00000020 |
#define INT_PRI_LEVEL2 0x00000040 |
#define INT_PRI_LEVEL3 0x00000060 |
#define INT_PRI_LEVEL4 0x00000080 |
#define INT_PRI_LEVEL5 0x000000A0 |
#define INT_PRI_LEVEL6 0x000000C0 |
#define INT_PRI_LEVEL7 0x000000E0 |
Referenced by IntPrioritySet().
#define INT_PRIORITY_MASK 0x000000E0 |