SPICC32XXDMA Hardware attributes. More...

#include <SPICC32XXDMA.h>

Data Fields
uint32_t	baseAddr

uint32_t	intNum

uint32_t	intPriority

uint32_t	spiPRCM

uint32_t	csControl

uint32_t	csPolarity

uint32_t	pinMode

uint32_t	turboMode

uint32_t *	scratchBufPtr

uint32_t	defaultTxBufValue

uint32_t	rxChannelIndex

uint32_t	txChannelIndex

uint32_t	minDmaTransferSize

uint16_t	mosiPin

uint16_t	misoPin

uint16_t	clkPin

uint16_t	csPin

Detailed Description

SPICC32XXDMA Hardware attributes.

These fields, with the exception of intPriority, are used by driverlib APIs and therefore must be populated by driverlib macro definitions. For CCWare these definitions are found in:

driverlib/prcm.h
driverlib/spi.h
driverlib/udma.h
inc/hw_memmap.h
inc/hw_ints.h

intPriority is the SPI peripheral's interrupt priority, as defined by the underlying OS. It is passed unmodified to the underlying OS's interrupt handler creation code, so you need to refer to the OS documentation for usage. For example, for SYS/BIOS applications, refer to the ti.sysbios.family.arm.m3.Hwi documentation for SYS/BIOS usage of interrupt priorities. If the driver uses the ti.dpl interface instead of making OS calls directly, then the HwiP port handles the interrupt priority in an OS specific way. In the case of the SYS/BIOS port, intPriority is passed unmodified to Hwi_create().

A sample structure is shown below:

#if defined(__TI_COMPILER_VERSION__)
#pragma DATA_ALIGN(scratchBuf, 32)
#elif defined(__IAR_SYSTEMS_ICC__)
#pragma data_alignment=32
#elif defined(__GNUC__)
__attribute__ ((aligned (32)))
#endif
uint32_t scratchBuf;
const SPICC32XXDMA_HWAttrsV1 SPICC32XXDMAHWAttrs[] = {
    {
        .baseAddr = GSPI_BASE,
        .intNum = INT_GSPI,
        .intPriority = (~0),
        .spiPRCM = PRCM_GSPI,
        .csControl = SPI_HW_CTRL_CS,
        .csPolarity = SPI_CS_ACTIVELOW,
        .pinMode = SPI_4PIN_MODE,
        .turboMode = SPI_TURBO_OFF,
        .scratchBufPtr = &scratchBuf,
        .defaultTxBufValue = 0,
        .rxChannelIndex = UDMA_CH6_GSPI_RX,
        .txChannelIndex = UDMA_CH7_GSPI_TX,
        .minDmaTransferSize = 100,
        .mosiPin = SPICC32XXDMA_PIN_07_MOSI,
        .misoPin = SPICC32XXDMA_PIN_06_MISO,
        .clkPin = SPICC32XXDMA_PIN_05_CLK,
        .csPin = SPICC32XXDMA_PIN_08_CS,
    },
    ...
};

Field Documentation

§ baseAddr

uint32_t SPICC32XXDMA_HWAttrsV1::baseAddr

SPICC32XXDMA Peripheral's base address

§ intNum

uint32_t SPICC32XXDMA_HWAttrsV1::intNum

SPICC32XXDMA Peripheral's interrupt vector

§ intPriority

uint32_t SPICC32XXDMA_HWAttrsV1::intPriority

SPICC32XXDMA Peripheral's interrupt priority

§ spiPRCM

uint32_t SPICC32XXDMA_HWAttrsV1::spiPRCM

SPI PRCM peripheral number

§ csControl

uint32_t SPICC32XXDMA_HWAttrsV1::csControl

Specify if chip select line will be controlled by SW or HW

§ csPolarity

uint32_t SPICC32XXDMA_HWAttrsV1::csPolarity

§ pinMode

uint32_t SPICC32XXDMA_HWAttrsV1::pinMode

Set peripheral to work in 3-pin or 4-pin mode

§ turboMode

uint32_t SPICC32XXDMA_HWAttrsV1::turboMode

Enable or disable SPI TURBO mode

§ scratchBufPtr

uint32_t* SPICC32XXDMA_HWAttrsV1::scratchBufPtr

Address of a scratch buffer of size uint32_t

§ defaultTxBufValue

uint32_t SPICC32XXDMA_HWAttrsV1::defaultTxBufValue

Default TX value if txBuf == NULL

§ rxChannelIndex

uint32_t SPICC32XXDMA_HWAttrsV1::rxChannelIndex

uDMA RX channel index

§ txChannelIndex

uint32_t SPICC32XXDMA_HWAttrsV1::txChannelIndex

uDMA TX channel index

§ minDmaTransferSize

uint32_t SPICC32XXDMA_HWAttrsV1::minDmaTransferSize

Minimum amout of data to start a uDMA transfer

§ mosiPin

uint16_t SPICC32XXDMA_HWAttrsV1::mosiPin

GSPI MOSI pin assignment

§ misoPin

uint16_t SPICC32XXDMA_HWAttrsV1::misoPin

GSPI MISO pin assignment

§ clkPin

uint16_t SPICC32XXDMA_HWAttrsV1::clkPin

GSPI CLK pin assignment

§ csPin

uint16_t SPICC32XXDMA_HWAttrsV1::csPin

GSPI CS pin assignment

The documentation for this struct was generated from the following file:

SPICC32XXDMA.h

Data Fields