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GPIO driver implementation for Low Power F3 devices.
============================================================================
The GPIO header file should be included in an application as follows:
Refer to GPIO.h for a complete description of the GPIO driver APIs provided and examples of their use.
The definitions in this file should not be used directly. All GPIO_CFG macros should be used as-is from GPIO.h.
There are no additional configuration values or platform-specific functions for GPIOLPF3.
#include <ti/drivers/GPIO.h>#include <ti/devices/DeviceFamily.h>#include <DeviceFamily_constructPath(inc/hw_ioc.h)>
Go to the source code of this file.
| #define GPIO_MUX_PORTCFG_PFUNC7 IOC_IOC3_PORTCFG_DTB |
| #define GPIO_MUX_PORTCFG_PFUNC6 IOC_IOC3_PORTCFG_ANA |
| #define GPIO_MUX_PORTCFG_PFUNC5 IOC_IOC3_PORTCFG_PFUNC5 |
| #define GPIO_MUX_PORTCFG_PFUNC4 IOC_IOC3_PORTCFG_PFUNC4 |
| #define GPIO_MUX_PORTCFG_PFUNC3 IOC_IOC3_PORTCFG_PFUNC3 |
| #define GPIO_MUX_PORTCFG_PFUNC2 IOC_IOC3_PORTCFG_PFUNC2 |
| #define GPIO_MUX_PORTCFG_PFUNC1 IOC_IOC3_PORTCFG_PFUNC1 |
| #define GPIO_MUX_GPIO_INTERNAL IOC_IOC3_PORTCFG_BASE |
| #define GPIO_CFG_INT_LOW_INTERNAL GPIOLPF3_CFG_OPTION_NOT_SUPPORTED |
| #define GPIO_CFG_INT_HIGH_INTERNAL GPIOLPF3_CFG_OPTION_NOT_SUPPORTED |
| #define GPIO_CFG_NO_DIR_INTERNAL (IOC_IOC3_IOMODE_NORMAL | GPIOLPF3_CFG_PIN_IS_INPUT_INTERNAL) |
| #define GPIO_CFG_INPUT_INTERNAL (IOC_IOC3_IOMODE_NORMAL | IOC_IOC3_INPEN | IOC_IOC3_WUENSB | IOC_IOC3_HYSTEN | GPIOLPF3_CFG_PIN_IS_INPUT_INTERNAL) |
| #define GPIO_CFG_OUTPUT_INTERNAL (IOC_IOC3_IOMODE_NORMAL | IOC_IOC3_INPEN | GPIOLPF3_CFG_PIN_IS_OUTPUT_INTERNAL) |
| #define GPIO_CFG_OUTPUT_OPEN_DRAIN_INTERNAL (IOC_IOC3_IOMODE_OPEND | IOC_IOC3_INPEN | GPIOLPF3_CFG_PIN_IS_OUTPUT_INTERNAL) |
| #define GPIO_CFG_OUT_OPEN_SOURCE_INTERNAL (IOC_IOC3_IOMODE_OPENS | IOC_IOC3_INPEN | GPIOLPF3_CFG_PIN_IS_OUTPUT_INTERNAL) |
| #define GPIO_CFG_PULL_NONE_INTERNAL IOC_IOC3_PULLCTL_PULL_DIS |
| #define GPIO_CFG_PULL_UP_INTERNAL IOC_IOC3_PULLCTL_PULL_UP |
| #define GPIO_CFG_PULL_DOWN_INTERNAL IOC_IOC3_PULLCTL_PULL_DOWN |
| #define GPIO_CFG_INT_NONE_INTERNAL IOC_IOC3_EDGEDET_EDGE_DIS |
| #define GPIO_CFG_INT_FALLING_INTERNAL IOC_IOC3_EDGEDET_EDGE_NEG |
| #define GPIO_CFG_INT_RISING_INTERNAL IOC_IOC3_EDGEDET_EDGE_POS |
| #define GPIO_CFG_INT_BOTH_EDGES_INTERNAL IOC_IOC3_EDGEDET_EDGE_BOTH |
| #define GPIO_CFG_INVERT_OFF_INTERNAL 0 |
| #define GPIO_CFG_INVERT_ON_INTERNAL IOC_IOC3_IOMODE_INVERTED |
| #define GPIO_CFG_HYSTERESIS_OFF_INTERNAL 0 |
| #define GPIO_CFG_HYSTERESIS_ON_INTERNAL IOC_IOC3_HYSTEN |
| #define GPIO_CFG_SHUTDOWN_WAKE_OFF_INTERNAL 0 |
| #define GPIO_CFG_SHUTDOWN_WAKE_HIGH_INTERNAL IOC_IOC3_WUCFGSD_WAKE_HIGH |
| #define GPIO_CFG_SHUTDOWN_WAKE_LOW_INTERNAL IOC_IOC3_WUCFGSD_WAKE_LOW |
| #define GPIO_CFG_SLEW_NORMAL_INTERNAL IOC_IOC17_SLEWRED_NORMAL |
| #define GPIO_CFG_SLEW_REDUCED_INTERNAL IOC_IOC17_SLEWRED_REDUCED |
| #define GPIO_CFG_DRVSTR_LOW_INTERNAL IOC_IOC17_IOCURR_CUR_2MA |
| #define GPIO_CFG_DRVSTR_MED_INTERNAL IOC_IOC17_IOCURR_CUR_4MA |
| #define GPIO_CFG_DRVSTR_HIGH_INTERNAL IOC_IOC17_IOCURR_CUR_8MA |
| #define GPIO_CFG_OUTPUT_DEFAULT_HIGH_INTERNAL 0x1 |
| #define GPIO_CFG_OUTPUT_DEFAULT_LOW_INTERNAL 0 |
| #define GPIOLPF3_CFG_PIN_IS_INPUT_INTERNAL 0x2 |
| #define GPIOLPF3_CFG_PIN_IS_OUTPUT_INTERNAL 0 |
| #define GPIO_CFG_INT_ENABLE_INTERNAL 0x4 |
| #define GPIO_CFG_INT_DISABLE_INTERNAL 0 |