Collaboration diagram for Advanced Encryption Standard Advanced (AESADV):

Modules
	DL_AESADV_INTERRUPT

	DL_AESADV_EVENT

Data Structures
struct	DL_AESADV_Config
	Configuration structure for the AESADV module. It contains the superset of configurable information for the control module. More...

Macros
#define	DL_AESADV_MODE_MASK
	AESADV Mode mask for all modes. More...

Enumerations
enum	DL_AESADV_IIDX { DL_AESADV_IIDX_INPUT_CONTEXT_READY = AESADV_CPU_INT_IIDX_STAT_CNTXTRDY, DL_AESADV_IIDX_SAVED_OUTPUT_CONTEXT_READY, DL_AESADV_IIDX_INPUT_READY = AESADV_CPU_INT_IIDX_STAT_INPUTRDY, DL_AESADV_IIDX_OUTPUT_READY = AESADV_CPU_INT_IIDX_STAT_OUTPUTRDY, DL_AESADV_IIDX_DMA_INPUT_TRIGGER = AESADV_DMA_TRIG_DATAIN_IIDX_STAT_TRIG0, DL_AESADV_IIDX_DMA_OUTPUT_TRIGGER }

enum	DL_AESADV_MODE { DL_AESADV_MODE_ECB = 0x00, DL_AESADV_MODE_CBC = (AESADV_CTRL_CBC_ENABLE), DL_AESADV_MODE_CTR = (AESADV_CTRL_CTR_ENABLE), DL_AESADV_MODE_ICM = (AESADV_CTRL_ICM_ENABLE), DL_AESADV_MODE_CFB = (AESADV_CTRL_CFB_ENABLE), DL_AESADV_MODE_OFB = (AESADV_CTRL_OFB_GCM_CCM_CONT_OFB), DL_AESADV_MODE_CMAC, DL_AESADV_MODE_CBCMAC = (AESADV_CTRL_CBCMAC_ENABLE), DL_AESADV_MODE_GCM_FORCE_ZERO, DL_AESADV_MODE_GCM_LOAD_HASH_KEY, DL_AESADV_MODE_GCM_AUTONOMOUS, DL_AESADV_MODE_GCM_GHASH_ONLY = (AESADV_CTRL_GCM_FORCE_ZERO), DL_AESADV_MODE_CCM = (AESADV_CTRL_CCM_ENABLE) \| (AESADV_CTRL_CTR_ENABLE) }

enum	DL_AESADV_KEY_SIZE { DL_AESADV_KEY_SIZE_128_BIT = AESADV_CTRL_KEYSIZE_K128, DL_AESADV_KEY_SIZE_256_BIT = AESADV_CTRL_KEYSIZE_K256 }

enum	DL_AESADV_DIR { DL_AESADV_DIR_ENCRYPT = AESADV_CTRL_DIR_ENCRYPT, DL_AESADV_DIR_DECRYPT = AESADV_CTRL_DIR_DECRYPT }

enum	DL_AESADV_CTR_WIDTH { DL_AESADV_CTR_WIDTH_32_BIT = AESADV_CTRL_CTR_WIDTH_CTR32, DL_AESADV_CTR_WIDTH_64_BIT = AESADV_CTRL_CTR_WIDTH_CTR64, DL_AESADV_CTR_WIDTH_96_BIT = AESADV_CTRL_CTR_WIDTH_CTR96, DL_AESADV_CTR_WIDTH_128_BIT = AESADV_CTRL_CTR_WIDTH_CTR128 }

enum	DL_AESADV_FB_WIDTH { DL_AESADV_FB_WIDTH_128 = AESADV_CTRL_CTR_WIDTH_CFB128 }

enum	DL_AESADV_CCM_CTR_WIDTH { DL_AESADV_CCM_CTR_WIDTH_2_BYTES = ((uint32_t) 1U << AESADV_CTRL_CCML_OFS), DL_AESADV_CCM_CTR_WIDTH_3_BYTES = ((uint32_t) 2 << AESADV_CTRL_CCML_OFS), DL_AESADV_CCM_CTR_WIDTH_4_BYTES = ((uint32_t) 3 << AESADV_CTRL_CCML_OFS), DL_AESADV_CCM_CTR_WIDTH_5_BYTES = ((uint32_t) 4 << AESADV_CTRL_CCML_OFS), DL_AESADV_CCM_CTR_WIDTH_6_BYTES = ((uint32_t) 5 << AESADV_CTRL_CCML_OFS), DL_AESADV_CCM_CTR_WIDTH_7_BYTES = ((uint32_t) 6 << AESADV_CTRL_CCML_OFS), DL_AESADV_CCM_CTR_WIDTH_8_BYTES = ((uint32_t) 7 << AESADV_CTRL_CCML_OFS) }

enum	DL_AESADV_CCM_TAG_WIDTH { DL_AESADV_CCM_TAG_WIDTH_1_BYTE = ((uint32_t) 0 << AESADV_CTRL_CCMM_OFS), DL_AESADV_CCM_TAG_WIDTH_2_BYTES = ((uint32_t) 1 << AESADV_CTRL_CCMM_OFS), DL_AESADV_CCM_TAG_WIDTH_3_BYTES = ((uint32_t) 2 << AESADV_CTRL_CCMM_OFS), DL_AESADV_CCM_TAG_WIDTH_4_BYTES = ((uint32_t) 3 << AESADV_CTRL_CCMM_OFS), DL_AESADV_CCM_TAG_WIDTH_5_BYTES = ((uint32_t) 4 << AESADV_CTRL_CCMM_OFS), DL_AESADV_CCM_TAG_WIDTH_6_BYTES = ((uint32_t) 5 << AESADV_CTRL_CCMM_OFS), DL_AESADV_CCM_TAG_WIDTH_7_BYTES = ((uint32_t) 6 << AESADV_CTRL_CCMM_OFS), DL_AESADV_CCM_TAG_WIDTH_8_BYTES = ((uint32_t) 7 << AESADV_CTRL_CCMM_OFS) }

enum	DL_AESADV_STATUS { DL_AESADV_STATUS_SUCCESS, DL_AESADV_STATUS_UNALIGNED_ACCESS }

Functions
__STATIC_INLINE void	DL_AESADV_enablePower (AESADV_Regs *aesadv)
	Enables the Peripheral Write Enable (PWREN) register for the AESADV. More...

__STATIC_INLINE void	DL_AESADV_disablePower (AESADV_Regs *aesadv)
	Disables the Peripheral Write Enable (PWREN) register for the AESADV. More...

__STATIC_INLINE bool	DL_AESADV_isPowerEnabled (const AESADV_Regs *aesadv)
	Returns if the Peripheral Write Enable (PWREN) register for the AESADV is enabled. More...

__STATIC_INLINE void	DL_AESADV_reset (AESADV_Regs *aesadv)
	Resets AESADV module. More...

__STATIC_INLINE bool	DL_AESADV_isReset (const AESADV_Regs *aesadv)
	Returns if AESADV module was reset. More...

__STATIC_INLINE bool	DL_AESADV_isOutputReady (const AESADV_Regs *aesadv)
	Returns if an AES output block is available to be read. More...

__STATIC_INLINE bool	DL_AESADV_isInputReady (const AESADV_Regs *aesadv)
	Returns if the input buffer is empty, and more data can be written. More...

__STATIC_INLINE void	DL_AESADV_setDirection (AESADV_Regs *aesadv, DL_AESADV_DIR direction)
	Sets the direction of the engine (encrypt/decrypt) More...

__STATIC_INLINE DL_AESADV_DIR	DL_AESADV_getDirection (const AESADV_Regs *aesadv)
	Returns the direction of the AESADV peripheral (encrypt/decrypt) More...

__STATIC_INLINE void	DL_AESADV_setKeySize (AESADV_Regs *aesadv, DL_AESADV_KEY_SIZE size)
	Sets the key size of the AESADV peripheral. More...

__STATIC_INLINE DL_AESADV_KEY_SIZE	DL_AESADV_getKeySize (const AESADV_Regs *aesadv)
	Returns the current key size of the AESADV peripheral. More...

__STATIC_INLINE void	DL_AESADV_setMode (AESADV_Regs *aesadv, DL_AESADV_MODE mode)
	Sets the AES algorithm mode. More...

__STATIC_INLINE DL_AESADV_MODE	DL_AESADV_getMode (const AESADV_Regs *aesadv)
	Returns the current selected mode. More...

__STATIC_INLINE void	DL_AESADV_setFeedbackWidth (AESADV_Regs *aesadv, DL_AESADV_FB_WIDTH fbWidth)
	Sets the feedback width of the AESADV peripheral. More...

__STATIC_INLINE DL_AESADV_FB_WIDTH	DL_AESADV_getFeedbackWidth (const AESADV_Regs *aesadv)
	Returns the current feedback width. More...

__STATIC_INLINE void	DL_AESADV_setCounterWidth (AESADV_Regs *aesadv, DL_AESADV_CTR_WIDTH ctrWidth)
	Sets the counter width of the AESADV peripheral. More...

__STATIC_INLINE DL_AESADV_CTR_WIDTH	DL_AESADV_getCounterWidth (const AESADV_Regs *aesadv)
	Returns the current counter width. More...

__STATIC_INLINE void	DL_AESADV_setCCMCounterWidth (AESADV_Regs *aesadv, DL_AESADV_CCM_CTR_WIDTH ccm_ctrWidth)
	Sets the CCM counter width of the AESADV peripheral. More...

__STATIC_INLINE DL_AESADV_CCM_CTR_WIDTH	DL_AESADV_getCCMCounterWidth (const AESADV_Regs *aesadv)
	Returns the current CCM-specific counter width. More...

__STATIC_INLINE void	DL_AESADV_setCCMTagWidth (AESADV_Regs *aesadv, DL_AESADV_CCM_TAG_WIDTH ccm_tagWidth)
	Sets the CCM authentication tag width of the AESADV peripheral. More...

__STATIC_INLINE DL_AESADV_CCM_TAG_WIDTH	DL_AESADV_getCCMTagWidth (const AESADV_Regs *aesadv)
	Returns the current CCM-specific authentication tag width. More...

__STATIC_INLINE void	DL_AESADV_haltOperationAndGenerateDigest (AESADV_Regs *aesadv)
	Halt operation and generate intermediate Digest for CCM/GCM. More...

__STATIC_INLINE void	DL_AESADV_resumeAADPhase (AESADV_Regs *aesadv, DL_AESADV_MODE mode)
	Resume GCM or CCM operation in the AAD phase. More...

__STATIC_INLINE void	DL_AESADV_resumeDataPhase (AESADV_Regs *aesadv, DL_AESADV_MODE mode)
	Resume GCM or CCM operation in the Data phase. More...

__STATIC_INLINE void	DL_AESADV_enableSavedOutputContext (AESADV_Regs *aesadv)
	Enables the storage and return of a tag or result IV. More...

__STATIC_INLINE void	DL_AESADV_disableSavedOutputContext (AESADV_Regs *aesadv)
	Disables the storage and return of a tag or result IV. More...

__STATIC_INLINE bool	DL_AESADV_isSavedOutputContextEnabled (const AESADV_Regs *aesadv)
	Returns whether the storage of additional context is enabled. More...

__STATIC_INLINE bool	DL_AESADV_isSavedOutputContextReady (const AESADV_Regs *aesadv)
	Returns whether additional output context is available to be read. More...

__STATIC_INLINE bool	DL_AESADV_isInputContextWriteable (const AESADV_Regs *aesadv)
	Returns whether the input context can be written by the application. More...

__STATIC_INLINE void	DL_AESADV_setLowerCryptoLength (AESADV_Regs *aesadv, uint32_t lowerLength)
	Sets the lower 32 bits of the crypto input data length in bytes. More...

__STATIC_INLINE void	DL_AESADV_setUpperCryptoLength (AESADV_Regs *aesadv, uint32_t upperLength)
	Sets the upper 29 bits of the crypto input data length in bytes. More...

__STATIC_INLINE void	DL_AESADV_setAADLength (AESADV_Regs *aesadv, uint32_t aadLength)
	Sets the length of additional authentication data (AAD) More...

__STATIC_INLINE void	DL_AESADV_enableDMAOperation (AESADV_Regs *aesadv)
	Enables DMA Operation for the AESADV module. More...

__STATIC_INLINE void	DL_AESADV_disableDMAOperation (AESADV_Regs *aesadv)
	Disables DMA Operation for the AESADV module. More...

__STATIC_INLINE bool	DL_AESADV_isDMAOperationEnabled (const AESADV_Regs *aesadv)
	Returns if DMA Operation is enabled. More...

__STATIC_INLINE bool	DL_AESADV_isUserKeyWriteEnabled (const AESADV_Regs *aesadv)
	Returns if User Writes to the Key Registers on the AESADV are allowed. More...

DL_AESADV_STATUS	DL_AESADV_setKey (AESADV_Regs aesadv, const uint8_t key, DL_AESADV_KEY_SIZE keySize)
	Loads a 128 or 256 bit regular key to the AESADV module. More...

void	DL_AESADV_setKeyAligned (AESADV_Regs aesadv, const uint32_t keyAligned, DL_AESADV_KEY_SIZE keySize)
	Loads a 128 or 256 bit regular key to the AESADV module. More...

DL_AESADV_STATUS	DL_AESADV_setGCMHashKey (AESADV_Regs aesadv, const uint8_t hashKey)
	set the hash key More...

void	DL_AESADV_setGCMHashKeyAligned (AESADV_Regs aesadv, const uint32_t hashKeyAligned)
	set the hash key More...

DL_AESADV_STATUS	DL_AESADV_setSecondKey (AESADV_Regs aesadv, const uint8_t secondKey)
	Loads the CBC-MAC second key. More...

void	DL_AESADV_setSecondKeyAligned (AESADV_Regs aesadv, const uint32_t secondKeyAligned)
	Loads the CBC-MAC second key. More...

DL_AESADV_STATUS	DL_AESADV_setThirdKey (AESADV_Regs aesadv, const uint8_t thirdKey)
	Loads the CBC-MAC third key. More...

void	DL_AESADV_setThirdKeyAligned (AESADV_Regs aesadv, const uint32_t thirdKeyAligned)
	Loads the CBC-MAC third key. More...

DL_AESADV_STATUS	DL_AESADV_loadIntermediateTAG (AESADV_Regs aesadv, const uint8_t tag)
	Loads either zero or an intermediate 128-bit TAG to resume GCM/CCM. More...

void	DL_AESADV_loadIntermediateTAGAligned (AESADV_Regs aesadv, const uint32_t tagAligned)
	Loads either zero or an intermediate 128-bit TAG to resume GCM/CCM. More...

DL_AESADV_STATUS	DL_AESADV_loadInitializationVector (AESADV_Regs aesadv, const uint8_t iv)
	Loads the 128-bit initialization vector to the AESADV module. More...

void	DL_AESADV_loadInitializationVectorAligned (AESADV_Regs aesadv, const uint32_t ivAligned)
	Loads the 128-bit initialization vector to the AESADV module. More...

DL_AESADV_STATUS	DL_AESADV_readInitializationVector (AESADV_Regs aesadv, const uint8_t iv)
	Reads the 128-bit initialization vector from the AES Module. More...

void	DL_AESADV_readInitializationVectorAligned (AESADV_Regs aesadv, uint32_t ivAligned)
	Reads the 128-bit initialization vector from the AES Module. More...

void	DL_AESADV_loadCCMNonceAndCounter (AESADV_Regs aesadv, uint8_t nonce, DL_AESADV_CCM_CTR_WIDTH ctrWidth)
	Loads the CCM Nonce And Counter IV, also called A0. More...

DL_AESADV_STATUS	DL_AESADV_loadInputData (AESADV_Regs aesadv, const uint8_t data)
	loads 128 bits (4 words) of input data More...

void	DL_AESADV_loadInputDataAligned (AESADV_Regs aesadv, const uint32_t dataAligned)
	loads 128 bits (4 words) of input data More...

DL_AESADV_STATUS	DL_AESADV_readOutputData (const AESADV_Regs aesadv, const uint8_t data)
	reads 128-bits of output data that has been encrypted/decrypted. More...

void	DL_AESADV_readOutputDataAligned (const AESADV_Regs aesadv, uint32_t dataAligned)
	reads 128-bits of output data that has been encrypted/decrypted. More...

DL_AESADV_STATUS	DL_AESADV_readTAG (const AESADV_Regs aesadv, const uint8_t tag)
	reads 128-bit output tag at the conclusion of operation/halt More...

void	DL_AESADV_readTAGAligned (const AESADV_Regs aesadv, uint32_t tagAligned)
	reads 128-bit output tag at the conclusion of operation/halt More...

__STATIC_INLINE void	DL_AESADV_forceInputDataAvailable (AESADV_Regs *aesadv)
	Forces AESADV to begin processing input data. More...

__STATIC_INLINE void	DL_AESADV_setCCMAlignWord (AESADV_Regs *aesadv, uint32_t alignWord)
	Set the CCM AAD align data word. More...

__STATIC_INLINE uint32_t	DL_AESADV_getCCMAlignWord (const AESADV_Regs *aesadv)
	Get the CCM AAD align data word. More...

__STATIC_INLINE void	DL_AESADV_setLowerBlockCount (AESADV_Regs *aesadv, uint32_t lowerBlockCount)
	Sets the lower 32-bits of the data blocks remaining in an operation. More...

__STATIC_INLINE uint32_t	DL_AESADV_getLowerBlockCount (const AESADV_Regs *aesadv)
	Gets the lower 32-bits of the data blocks remaining in an operation. More...

__STATIC_INLINE void	DL_AESADV_setUpperBlockCount (AESADV_Regs *aesadv, uint32_t upperBlockCount)
	Sets the upper 25-bits of the data blocks remaining in an operation. More...

__STATIC_INLINE uint32_t	DL_AESADV_getUpperBlockCount (const AESADV_Regs *aesadv)
	Gets the upper 25-bits of the data blocks remaining in an operation. More...

__STATIC_INLINE void	DL_AESADV_enableInterrupt (AESADV_Regs *aesadv, uint32_t interruptMask)
	Enable AESADV interrupts. More...

__STATIC_INLINE void	DL_AESADV_disableInterrupt (AESADV_Regs *aesadv, uint32_t interruptMask)
	Disable AESADV interrupts. More...

__STATIC_INLINE uint32_t	DL_AESADV_getEnabledInterrupts (const AESADV_Regs *aesadv, uint32_t interruptMask)
	Check if AES Ready interrupt is enabled. More...

__STATIC_INLINE uint32_t	DL_AESADV_getEnabledInterruptStatus (const AESADV_Regs *aesadv, uint32_t interruptMask)
	Check interrupt flag of enabled AESADV interrupts. More...

__STATIC_INLINE uint32_t	DL_AESADV_getRawInterruptStatus (const AESADV_Regs *aesadv, uint32_t interruptMask)
	Check interrupt flag of any AESADV interrupts. More...

__STATIC_INLINE DL_AESADV_IIDX	DL_AESADV_getPendingInterrupt (const AESADV_Regs *aesadv)
	Get highest priority pending AESADV interrupt. More...

__STATIC_INLINE void	DL_AESADV_clearInterruptStatus (AESADV_Regs *aesadv, uint32_t interruptMask)
	Clear pending AESADV Interrupts. More...

__STATIC_INLINE void	DL_AESADV_enableDMAInputTriggerEvent (AESADV_Regs *aesadv)
	Enables DMA input trigger to publish AESADV write requests to the DMA. More...

__STATIC_INLINE void	DL_AESADV_enableDMAOutputTriggerEvent (AESADV_Regs *aesadv)
	Enables DMA output trigger to publish AESADV read requests to the DMA. More...

__STATIC_INLINE void	DL_AESADV_disableDMAInputTriggerEvent (AESADV_Regs *aesadv)
	Disable DMA input trigger event. More...

__STATIC_INLINE void	DL_AESADV_disableDMAOutputTriggerEvent (AESADV_Regs *aesadv)
	Disable DMA output trigger event. More...

__STATIC_INLINE uint32_t	DL_AESADV_getEnabledDMAInputTriggerEvent (const AESADV_Regs *aesadv)
	Check if the DMA input trigger event is enabled. More...

__STATIC_INLINE uint32_t	DL_AESADV_getEnabledDMAOutputTriggerEvent (const AESADV_Regs *aesadv)
	Check if the DMA output trigger event is enabled. More...

__STATIC_INLINE uint32_t	DL_AESADV_getEnabledDMAInputTriggerEventStatus (const AESADV_Regs *aesadv)
	Check interrupt flag of DMA input trigger event. More...

__STATIC_INLINE uint32_t	DL_AESADV_getEnabledDMAOutputTriggerEventStatus (const AESADV_Regs *aesadv)
	Check interrupt flag of DMA output trigger event. More...

__STATIC_INLINE uint32_t	DL_AESADV_getRawDMAInputTriggerEventStatus (const AESADV_Regs *aesadv)
	Check interrupt flag of DMA input trigger event. More...

__STATIC_INLINE uint32_t	DL_AESADV_getRawDMAOutputTriggerEventStatus (const AESADV_Regs *aesadv)
	Check interrupt flag of DMA output trigger event. More...

__STATIC_INLINE DL_AESADV_IIDX	DL_AESADV_getPendingDMAInputTriggerEvent (const AESADV_Regs *aesadv)
	Get highest priority pending DMA input trigger event. More...

__STATIC_INLINE DL_AESADV_IIDX	DL_AESADV_getPendingDMAOutputTriggerEvent (const AESADV_Regs *aesadv)
	Get highest priority pending DMA output trigger event. More...

__STATIC_INLINE void	DL_AESADV_clearDMAInputTriggerEventStatus (AESADV_Regs *aesadv)
	Clear pending DMA input trigger event. More...

__STATIC_INLINE void	DL_AESADV_clearDMAOutputTriggerEventStatus (AESADV_Regs *aesadv)
	Clear pending DMA output trigger event. More...

__STATIC_INLINE uintptr_t	DL_AESADV_getDATAINAddr (const AESADV_Regs *aesadv)
	Returns the address of the AESADV input data register. More...

__STATIC_INLINE uintptr_t	DL_AESADV_getDATAOUTAddr (const AESADV_Regs *aesadv)
	Returns the address of the AESADV output data register. More...

void	DL_AESADV_initECB (AESADV_Regs aesadv, const DL_AESADV_Config config)
	Initializes the engine in the Electronic Codebook (ECB) mode. More...

void	DL_AESADV_initCBC (AESADV_Regs aesadv, const DL_AESADV_Config config)
	Initializes the engine in the Cipher-Block Chaining (CBC) mode. More...

void	DL_AESADV_initCFB (AESADV_Regs aesadv, const DL_AESADV_Config config)
	Initializes the engine in the Cipher Feedback (CFB) mode. More...

void	DL_AESADV_initOFB (AESADV_Regs aesadv, const DL_AESADV_Config config)
	Initializes the engine in the Output Feedback (OFB) mode. More...

void	DL_AESADV_initCTR (AESADV_Regs aesadv, const DL_AESADV_Config config)
	Initializes the engine in the Counter (CTR) mode. More...

void	DL_AESADV_initICM (AESADV_Regs aesadv, const DL_AESADV_Config config)
	Initializes the engine in the Integer Counter Mode (ICM) More...

void	DL_AESADV_initCMAC (AESADV_Regs aesadv, const DL_AESADV_Config config)
	Initializes the engine in the block cipher-based Message Authentication Code (CMAC) More...

void	DL_AESADV_initCBCMAC (AESADV_Regs aesadv, const DL_AESADV_Config config)
	Initializes the engine in the Cipher Block Chaining Message Authenication Code (CBC-MAC) More...

void	DL_AESADV_initGCM (AESADV_Regs aesadv, const DL_AESADV_Config config)
	Initializes the engine in the Galois/Counter Mode (GCM) More...

void	DL_AESADV_initCCM (AESADV_Regs aesadv, DL_AESADV_Config config)
	Initializes the engine in the Counter & CBC-MAC (CCM)mode. More...

Detailed Description

Overview

The AESADV DriverLib allows full configuration of the MSPM0 AESADV module. The AESADV accelerator module accelerates encryption and decryption operations in hardware based on the FIPS PUB 197 advanced encryption standard (AES).

Macro Definition Documentation

§ DL_AESADV_MODE_MASK

#define DL_AESADV_MODE_MASK

Value:

((AESADV_CTRL_CBC_MASK) | \
                (AESADV_CTRL_CTR_MASK)     |      (AESADV_CTRL_ICM_MASK) | \
                (AESADV_CTRL_CFB_MASK)     |   (AESADV_CTRL_CBCMAC_MASK) | \
                (AESADV_CTRL_GCM_MASK)     |      (AESADV_CTRL_CCM_MASK) | \
                (AESADV_CTRL_OFB_GCM_CCM_CONT_MASK) | 0x02000000)

AESADV Mode mask for all modes.

Referenced by DL_AESADV_getMode(), DL_AESADV_resumeAADPhase(), DL_AESADV_resumeDataPhase(), and DL_AESADV_setMode().

Enumeration Type Documentation

§ DL_AESADV_IIDX

enum DL_AESADV_IIDX

Enumerator
DL_AESADV_IIDX_INPUT_CONTEXT_READY	AESADV interrupt index for input context ready to be written
DL_AESADV_IIDX_SAVED_OUTPUT_CONTEXT_READY	AESADV interrupt index for saved output context (tag/IV) available
DL_AESADV_IIDX_INPUT_READY	AESADV interrupt index indicating the engine can take more input. Not compatible with DL_AESADV_enableDMAOperation
DL_AESADV_IIDX_OUTPUT_READY	AESADV interrupt index indicating the engine has available output data. Not compatible with DL_AESADV_enableDMAOperation
DL_AESADV_IIDX_DMA_INPUT_TRIGGER	AES interrupt index for enabling DMA input request trigger event
DL_AESADV_IIDX_DMA_OUTPUT_TRIGGER	AES interrupt index for enabling DMA output request trigger event

§ DL_AESADV_MODE

enum DL_AESADV_MODE

Enumerator
DL_AESADV_MODE_ECB	Electronic Codebook (ECB) mode
DL_AESADV_MODE_CBC	Cipher Block Chaining (CBC) mode
DL_AESADV_MODE_CTR	Counter (CTR) mode
DL_AESADV_MODE_ICM	Integer Counter Mode (ICM). ICM is a variant of CTR with a 16-bit wide counter
DL_AESADV_MODE_CFB	Cipher Feedback (CFB) mode
DL_AESADV_MODE_OFB	Output Feedback (OFB) mode
DL_AESADV_MODE_CMAC	Cipher-based message authentication code (CMAC).
DL_AESADV_MODE_CBCMAC	Cipher block chaining message authentication code (CBC-MAC) mode
DL_AESADV_MODE_GCM_FORCE_ZERO	Galois/Counter Mode (GCM) with GHASH (GHASH_H loaded and Y0-encrypted forced to 0)
DL_AESADV_MODE_GCM_LOAD_HASH_KEY	Galois/Counter Mode (GCM) with GHASH (H loaded Y0-encrypted calculated internally)
DL_AESADV_MODE_GCM_AUTONOMOUS	Galois/Counter Mode (GCM) with Autonomous GHASH (Both H and Y0-encrypted calculated internally)
DL_AESADV_MODE_GCM_GHASH_ONLY	Galois/Counter Mode GHASH only. Direction must be Decrypt
DL_AESADV_MODE_CCM	Cipher block chaining, message authentication code (CCM) mode

§ DL_AESADV_KEY_SIZE

enum DL_AESADV_KEY_SIZE

Enumerator
DL_AESADV_KEY_SIZE_128_BIT	128-bit Key Size
DL_AESADV_KEY_SIZE_256_BIT	256-bit Key Size

§ DL_AESADV_DIR

enum DL_AESADV_DIR

Enumerator
DL_AESADV_DIR_ENCRYPT	Encryption
DL_AESADV_DIR_DECRYPT	Decryption

§ DL_AESADV_CTR_WIDTH

enum DL_AESADV_CTR_WIDTH

Enumerator
DL_AESADV_CTR_WIDTH_32_BIT	Counter (CTR) mode 32-bit counter
DL_AESADV_CTR_WIDTH_64_BIT	Counter (CTR) mode 64-bit counter
DL_AESADV_CTR_WIDTH_96_BIT	Counter (CTR) mode 96-bit counter
DL_AESADV_CTR_WIDTH_128_BIT	Counter (CTR) mode 128-bit counter

§ DL_AESADV_FB_WIDTH

enum DL_AESADV_FB_WIDTH

§ DL_AESADV_CCM_CTR_WIDTH

enum DL_AESADV_CCM_CTR_WIDTH

Enumerator
DL_AESADV_CCM_CTR_WIDTH_2_BYTES	Counter field width of 2 bytes (value of 1 stored in CCM-L)
DL_AESADV_CCM_CTR_WIDTH_3_BYTES	Counter field width of 3 bytes (value of 2 stored in CCM-L)
DL_AESADV_CCM_CTR_WIDTH_4_BYTES	Counter field width of 4 bytes (value of 3 stored in CCM-L)
DL_AESADV_CCM_CTR_WIDTH_5_BYTES	Counter field width of 5 bytes (value of 4 stored in CCM-L)
DL_AESADV_CCM_CTR_WIDTH_6_BYTES	Counter field width of 6 bytes (value of 5 stored in CCM-L)
DL_AESADV_CCM_CTR_WIDTH_7_BYTES	Counter field width of 7 bytes (value of 6 stored in CCM-L)
DL_AESADV_CCM_CTR_WIDTH_8_BYTES	Counter field width of 8 bytes (value of 7 stored in CCM-L)

§ DL_AESADV_CCM_TAG_WIDTH

enum DL_AESADV_CCM_TAG_WIDTH

Enumerator
DL_AESADV_CCM_TAG_WIDTH_1_BYTE	Authentication field width of 1 byte (value of 0 stored in CCM-M)
DL_AESADV_CCM_TAG_WIDTH_2_BYTES	Authentication field width of 2 bytes (value of 1 stored in CCM-M)
DL_AESADV_CCM_TAG_WIDTH_3_BYTES	Authentication field width of 3 bytes (value of 2 stored in CCM-M)
DL_AESADV_CCM_TAG_WIDTH_4_BYTES	Authentication field width of 4 bytes (value of 3 stored in CCM-M)
DL_AESADV_CCM_TAG_WIDTH_5_BYTES	Authentication field width of 5 bytes (value of 4 stored in CCM-M)
DL_AESADV_CCM_TAG_WIDTH_6_BYTES	Authentication field width of 6 bytes (value of 5 stored in CCM-M)
DL_AESADV_CCM_TAG_WIDTH_7_BYTES	Authentication field width of 7 bytes (value of 6 stored in CCM-M)
DL_AESADV_CCM_TAG_WIDTH_8_BYTES	Authentication field width of 8 bytes (value of 7 stored in CCM-M)

§ DL_AESADV_STATUS

enum DL_AESADV_STATUS

Enumerator
DL_AESADV_STATUS_SUCCESS	Operation was successful
DL_AESADV_STATUS_UNALIGNED_ACCESS	Operation was not performed because address was unaligned

Function Documentation

§ DL_AESADV_enablePower()

__STATIC_INLINE void DL_AESADV_enablePower ( AESADV_Regs * aesadv )

Enables the Peripheral Write Enable (PWREN) register for the AESADV.

Before any peripheral registers can be configured by software, the peripheral itself must be enabled by writing the ENABLE bit together with the appropriate KEY value to the peripheral's PWREN register.

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

§ DL_AESADV_disablePower()

__STATIC_INLINE void DL_AESADV_disablePower ( AESADV_Regs * aesadv )

Disables the Peripheral Write Enable (PWREN) register for the AESADV.

When the PWREN.ENABLE bit is cleared, the peripheral's registers are not accessible for read/write operations.

Note: This API does not provide large power savings

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

§ DL_AESADV_isPowerEnabled()

__STATIC_INLINE bool DL_AESADV_isPowerEnabled ( const AESADV_Regs * aesadv )

Returns if the Peripheral Write Enable (PWREN) register for the AESADV is enabled.

Before any peripheral registers can be configured by software, the peripheral itself must be enabled by writing the ENABLE bit together with the appropriate KEY value to the peripheral's PWREN register.

When the PWREN.ENABLE bit is cleared, the peripheral's registers are not accessible for read/write operations.

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

Returns: true if peripheral register access is enabled; false if peripheral register access is disabled

§ DL_AESADV_reset()

__STATIC_INLINE void DL_AESADV_reset ( AESADV_Regs * aesadv )

Resets AESADV module.

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

§ DL_AESADV_isReset()

__STATIC_INLINE bool DL_AESADV_isReset ( const AESADV_Regs * aesadv )

Returns if AESADV module was reset.

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

Return values

true	Peripheral was reset
false	Peripheral wasn't reset

§ DL_AESADV_isOutputReady()

__STATIC_INLINE bool DL_AESADV_isOutputReady ( const AESADV_Regs * aesadv )

Returns if an AES output block is available to be read.

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

Return values

true	AES output block is available
false	No AES output block is available

§ DL_AESADV_isInputReady()

__STATIC_INLINE bool DL_AESADV_isInputReady ( const AESADV_Regs * aesadv )

Returns if the input buffer is empty, and more data can be written.

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

Return values

true	Input buffer is empty
false	Input buffer is not empty

§ DL_AESADV_setDirection()

__STATIC_INLINE void DL_AESADV_setDirection	(	AESADV_Regs *	aesadv,
		DL_AESADV_DIR	direction
	)

Sets the direction of the engine (encrypt/decrypt)

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	direction	Direction. One of DL_AESADV_DIR.

Note: CBC-MAC must be configured as encrypt (DL_AESADV_DIR_ENCRYPT).

References DL_Common_updateReg().

§ DL_AESADV_getDirection()

__STATIC_INLINE DL_AESADV_DIR DL_AESADV_getDirection ( const AESADV_Regs * aesadv )

Returns the direction of the AESADV peripheral (encrypt/decrypt)

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

Returns: one of DL_AESADV_DIR

§ DL_AESADV_setKeySize()

__STATIC_INLINE void DL_AESADV_setKeySize	(	AESADV_Regs *	aesadv,
		DL_AESADV_KEY_SIZE	size
	)

Sets the key size of the AESADV peripheral.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	size	Key Size. One of DL_AESADV_KEY_SIZE.

References DL_Common_updateReg().

§ DL_AESADV_getKeySize()

__STATIC_INLINE DL_AESADV_KEY_SIZE DL_AESADV_getKeySize ( const AESADV_Regs * aesadv )

Returns the current key size of the AESADV peripheral.

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

Returns: one of DL_AESADV_KEY_SIZE.

§ DL_AESADV_setMode()

__STATIC_INLINE void DL_AESADV_setMode	(	AESADV_Regs *	aesadv,
		DL_AESADV_MODE	mode
	)

Sets the AES algorithm mode.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	mode	Algorithm Mode. One of DL_AESADV_MODE.

Note: Selecting GCM as a mode requires an additional selection of the GHASH parameters expected. Please refer to the TRM for more information.; Due to the dual use of the OFB/gcm_ccm_continue_aad bit field, if the resumption of the AAD phase of a GCM/CCM operation is desired, it must be set with the mode using DL_AESADV_resumeAADPhase, for the bit will be cleared in this function

See also: DL_AESADV_resumeAADPhase

References DL_AESADV_MODE_MASK, and DL_Common_updateReg().

§ DL_AESADV_getMode()

__STATIC_INLINE DL_AESADV_MODE DL_AESADV_getMode ( const AESADV_Regs * aesadv )

Returns the current selected mode.

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

Returns: one of DL_AESADV_MODE.

Note: upon resumption of a AAD phase of operation, the dual-purpose bit of continue AAD/OFB will be read as one. In this case, the mode must be set again for a valid value to be read.

See also: DL_AESADV_setMode

References DL_AESADV_MODE_MASK.

§ DL_AESADV_setFeedbackWidth()

__STATIC_INLINE void DL_AESADV_setFeedbackWidth	(	AESADV_Regs *	aesadv,
		DL_AESADV_FB_WIDTH	fbWidth
	)

Sets the feedback width of the AESADV peripheral.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	fbWidth	Feedback Width. One of DL_AESADV_FB_WIDTH.

Note: this is only applicable in cipher feeback mode (CFB). OFB always has width 128.

References DL_Common_updateReg().

§ DL_AESADV_getFeedbackWidth()

__STATIC_INLINE DL_AESADV_FB_WIDTH DL_AESADV_getFeedbackWidth ( const AESADV_Regs * aesadv )

Returns the current feedback width.

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

Returns: one of DL_AESADV_FB_WIDTH.

See also: DL_AESADV_setFeedbackWidth

§ DL_AESADV_setCounterWidth()

__STATIC_INLINE void DL_AESADV_setCounterWidth	(	AESADV_Regs *	aesadv,
		DL_AESADV_CTR_WIDTH	ctrWidth
	)

Sets the counter width of the AESADV peripheral.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	ctrWidth	Counter Width. One of DL_AESADV_CTR_WIDTH.

Note: this is only applicable in modes CTR, CCM; GCM restricts counter width to 32-bits, which is not required to be set.; if using CCM, the counter width must be wide enough to accommodate the chosen CCM length, one of DL_AESADV_CCM_CTR_WIDTH (in bytes)

See also: DL_AESADV_setCCMCounterWidth

References DL_Common_updateReg().

§ DL_AESADV_getCounterWidth()

__STATIC_INLINE DL_AESADV_CTR_WIDTH DL_AESADV_getCounterWidth ( const AESADV_Regs * aesadv )

Returns the current counter width.

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

Returns: one of DL_AESADV_CTR_WIDTH.

See also: DL_AESADV_setCounterWidth

§ DL_AESADV_setCCMCounterWidth()

__STATIC_INLINE void DL_AESADV_setCCMCounterWidth	(	AESADV_Regs *	aesadv,
		DL_AESADV_CCM_CTR_WIDTH	ccm_ctrWidth
	)

Sets the CCM counter width of the AESADV peripheral.

Counter with CBC-MAC (CCM) Specific. Sets the width of the counter field that is loaded into the initialization vector along with the nonce. This signal is sometimes referred to as CCM-L. The nonce can be calculated via the following table:

DL_AESADV_CCM_CTR_WIDTH (bytes)	Nonce Array Length Required (bytes)
2	13
3	12
4	11
5	10
6	9
7	8
8	7

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	ccm_ctrWidth	Counter Width. One of DL_AESADV_CCM_CTR_WIDTH

Note: this is only applicable in modes CCM; The general counter width must be wide enough to accommodate the chosen CCM counter width, one of DL_AESADV_CTR_WIDTH (in bits). A counter width of 64-bits is sufficient to cover all cases.

See also: DL_AESADV_setCounterWidth; DL_AESADV_loadCCMNonceAndCounter

References DL_Common_updateReg().

§ DL_AESADV_getCCMCounterWidth()

__STATIC_INLINE DL_AESADV_CCM_CTR_WIDTH DL_AESADV_getCCMCounterWidth ( const AESADV_Regs * aesadv )

Returns the current CCM-specific counter width.

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

Returns: one of DL_AESADV_CCM_CTR_WIDTH.

See also: DL_AESADV_setCCMCounterWidth

§ DL_AESADV_setCCMTagWidth()

__STATIC_INLINE void DL_AESADV_setCCMTagWidth	(	AESADV_Regs *	aesadv,
		DL_AESADV_CCM_TAG_WIDTH	ccm_tagWidth
	)

Sets the CCM authentication tag width of the AESADV peripheral.

Counter with CBC-MAC (CCM) Specific. Sets the width of the authentication field that is retrieved upon completion of the operation. The first bytes of the calculated tag will be returned, and the rest of the tag ignored. This signal is sometimes referred to as CCM-M. The full-width tag will still be calculated, just the least-significant bits will be used as according to this setting.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	ccm_tagWidth	Tag Width. One of DL_AESADV_CCM_TAG_WIDTH.

References DL_Common_updateReg().

§ DL_AESADV_getCCMTagWidth()

__STATIC_INLINE DL_AESADV_CCM_TAG_WIDTH DL_AESADV_getCCMTagWidth ( const AESADV_Regs * aesadv )

Returns the current CCM-specific authentication tag width.

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

Returns: one of DL_AESADV_CCM_TAG_WIDTH.

See also: DL_AESADV_setCCMTagWidth

§ DL_AESADV_haltOperationAndGenerateDigest()

__STATIC_INLINE void DL_AESADV_haltOperationAndGenerateDigest ( AESADV_Regs * aesadv )

Halt operation and generate intermediate Digest for CCM/GCM.

Specific to a multi-block CCM/GCM mode. This will interrupt processing at the boundary of a full AES block (128-bits or 16 bytes) and prepare an intermediate digest that can be used to resume operations. If the user is still inputting additional authentication data (AAD), the operation shall be resumed in the AAD phase. If the user is inputting payload data (ciphertext/plaintext), the operation shall be resumed in the data phase. The user is responsible for reading and saving the intermediate digest to preserve the state for a future resumption of the Operation. The user must have at least 1 or more bytes of additional information that needs to be inputted in order for a halt to occur.

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

§ DL_AESADV_resumeAADPhase()

__STATIC_INLINE void DL_AESADV_resumeAADPhase	(	AESADV_Regs *	aesadv,
		DL_AESADV_MODE	mode
	)

Resume GCM or CCM operation in the AAD phase.

Specific to a multi-block CCM/GCM mode that contains Additional Authentication Data to be written after an operation has been halted. This operation should be performed last, after the entire digest for the example has been added. The mode is written in conjunction with the resumption signal, so it must be provided.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	mode	A supported GCM or CCM mode from DL_AESADV_MODE

See also: DL_AESADV_haltOperationAndReturnDigest; DL_AESADV_resumeDataPhase

References DL_AESADV_MODE_MASK, and DL_Common_updateReg().

§ DL_AESADV_resumeDataPhase()

__STATIC_INLINE void DL_AESADV_resumeDataPhase	(	AESADV_Regs *	aesadv,
		DL_AESADV_MODE	mode
	)

Resume GCM or CCM operation in the Data phase.

Specific to a multi-block CCM/GCM mode that contains additional Payload Data (ciphertext/plaintext) to be written after an operation has been halted, and any and all AAD has already been written before the time of halting. This operation should be performed last, after the entire digest for the example has been added. The mode is written in conjunction with the resumption signal, so it must be provided.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	mode	A supported GCM or CCM mode from DL_AESADV_MODE

See also: DL_AESADV_haltOperationAndReturnDigest; DL_AESADV_resumeAADPhase

References DL_AESADV_MODE_MASK, and DL_Common_updateReg().

§ DL_AESADV_enableSavedOutputContext()

__STATIC_INLINE void DL_AESADV_enableSavedOutputContext ( AESADV_Regs * aesadv )

Enables the storage and return of a tag or result IV.

Set if a given configuration must require an authentication TAG or result IV to be stored as part of the result context. This will trigger the context output DMA or interrupt assertion after operation completion. Additionally, the saved context ready will now be set high. Th engine will retain the registers until they have been read. Only after an associated TAG/IV has been read will a new DMA request for an input context be sent. Typically, this is set when methods return a TAG (GCM, CCM, CBCMAC) or in case an IV is to be returned for a future continued operation (CBC, CTR, etc.). If not set, the engine will assert a DMA request with the current context.

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

§ DL_AESADV_disableSavedOutputContext()

__STATIC_INLINE void DL_AESADV_disableSavedOutputContext ( AESADV_Regs * aesadv )

Disables the storage and return of a tag or result IV.

Set if a given configuration must require an authentication TAG or result IV to be stored as part of the result context. This will trigger the context output DMA or interrupt assertion after operation completion. Additionally, the saved context ready will now be set high. Th engine will retain the registers until they have been read. Typically, this is set when methods return a TAG (GCM, CCM, CBCMAC) or in case an IV is to be returned for a future continued operation (CBC, CTR, etc.). If not set, the engine will assert a DMA request with the current context.

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

§ DL_AESADV_isSavedOutputContextEnabled()

__STATIC_INLINE bool DL_AESADV_isSavedOutputContextEnabled ( const AESADV_Regs * aesadv )

Returns whether the storage of additional context is enabled.

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

Return values

true	Saved Output Context is enabled.
false	Saved Output Context is disabled.

See also: DL_AESADV_enableSavedOutputContext

§ DL_AESADV_isSavedOutputContextReady()

__STATIC_INLINE bool DL_AESADV_isSavedOutputContextReady ( const AESADV_Regs * aesadv )

Returns whether additional output context is available to be read.

At the end of an operation, if additional result information to the ciphertext/plaintext is available such as TAG/IV(s), this will return true. If this value is high, then the context cannot be written.

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

Return values

true	Saved Output Context is ready to be retrieved.
false	Saved Output Context is unavailable.

See also: DL_AESADV_enableSavedOutputContext

§ DL_AESADV_isInputContextWriteable()

__STATIC_INLINE bool DL_AESADV_isInputContextWriteable ( const AESADV_Regs * aesadv )

Returns whether the input context can be written by the application.

Determines if the context (mode, IV, key, etc.) can be modified from its current state in the application by reading the CNTXT_RDY bit. This does not mean that a previous operation has necessarily finished, just that a new context may be written. Writing a new context before completion of the current context will cancel the current operation.

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

Return values

true	Context can be safely written to by the application
false	Context cannot be written, AES Authentication TAGs or IV's are available and must be read before context can be interrupted

§ DL_AESADV_setLowerCryptoLength()

__STATIC_INLINE void DL_AESADV_setLowerCryptoLength	(	AESADV_Regs *	aesadv,
		uint32_t	lowerLength
	)

Sets the lower 32 bits of the crypto input data length in bytes.

The entire length of crypto input data that can be provided is 61-bits long, and is thus set in two separate functions. The lower 32-bits will be set and decremented as the operation continues. Setting the crypto length to 0 for basic modes (CBC, CTR, ICM, CFB, OFB) will configure the AESADV module to expect an infinite input stream for the device. For GCM and CCM, this mode does not include Additional Authentication Data, this is set separately. If there is a positive AAD length, it is not required for this register to have a nonzero value. Reads from this register return all zeros, so reads are not necessary. For modes that do not allow partial blocks such as CBC, this number must be a multiple of 16.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	lowerLength	Lower 32-bits of crypto data length that will be inputted

Note: This sets the context for the register, and thus should be called last in the configuration for non-combined modes

See also: DL_AESADV_setUpperCryptoLength; DL_AESADV_setAADLength

§ DL_AESADV_setUpperCryptoLength()

__STATIC_INLINE void DL_AESADV_setUpperCryptoLength	(	AESADV_Regs *	aesadv,
		uint32_t	upperLength
	)

Sets the upper 29 bits of the crypto input data length in bytes.

The entire length of crypto input data that can be provided is 61-bits long, and is thus set in two separate functions. The upper 29-bits will be set in this function should a length larger than or equal to 2^32 be necessary. Bits 29-31 are to be zeroed out upon a write.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	upperLength	Upper 29 bits of the crypto data length in bytes that will be inputted

Note: This sets the context for the register in combined modes (GCM/CCM), and thus should be called last in the configuration

See also: DL_AESADV_setLowerCryptoLength

§ DL_AESADV_setAADLength()

__STATIC_INLINE void DL_AESADV_setAADLength	(	AESADV_Regs *	aesadv,
		uint32_t	aadLength
	)

Sets the length of additional authentication data (AAD)

Specific to CCM/GCM modes. Sets length of AAD for these modes and 0 otherwise. Can be zero if no AAD, or can be nonzero with a zero crypto length for authentication-only operation. A write to this register triggers the engine to start the context, and should be written after Crypto Length. For GCM this can be any value < 2^32, for CCM this value must be less than 2^16 - 2^8.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	aadLength	length of AAD in bytes.

See also: DL_AESADV_setLowerLength

§ DL_AESADV_enableDMAOperation()

__STATIC_INLINE void DL_AESADV_enableDMAOperation ( AESADV_Regs * aesadv )

Enables DMA Operation for the AESADV module.

Sets the AESADV module to run with Data Inputs using the DMA to read/write data rather than using register input/output

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

See also: DL_AESADV_disableDMAOperation

§ DL_AESADV_disableDMAOperation()

__STATIC_INLINE void DL_AESADV_disableDMAOperation ( AESADV_Regs * aesadv )

Disables DMA Operation for the AESADV module.

Default behavior. Sets the AESADV module to run using register input output with data provided by the CPU rather than using the DMA

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

§ DL_AESADV_isDMAOperationEnabled()

__STATIC_INLINE bool DL_AESADV_isDMAOperationEnabled ( const AESADV_Regs * aesadv )

Returns if DMA Operation is enabled.

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

Return values

true	Configured to read/write data using the DMA
false	Configured to read/write data using the CPU (Default)

§ DL_AESADV_isUserKeyWriteEnabled()

__STATIC_INLINE bool DL_AESADV_isUserKeyWriteEnabled ( const AESADV_Regs * aesadv )

Returns if User Writes to the Key Registers on the AESADV are allowed.

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

Return values

true	User Writes to the Key Registers are allowed
false	The user cannot write to the Key Registers

Note: If user key writes are disabled but desired, a module reset is required

§ DL_AESADV_setKey()

DL_AESADV_STATUS DL_AESADV_setKey	(	AESADV_Regs *	aesadv,
		const uint8_t *	key,
		DL_AESADV_KEY_SIZE	keySize
	)

Loads a 128 or 256 bit regular key to the AESADV module.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	key	Pointer to an uint8_t array with a length that contains the cipher key
[in]	keySize	Key Size. One of DL_AESADV_KEY_SIZE

Returns: Status of operation. Operation will fail if not 32-bit aligned. One of DL_AESADV_STATUS.

Note: This function adds additional cycles in order to verify no unaligned access, if this is not necessary, consider using uint32_t pointers and DL_AESADV_setKeyAligned

Referenced by DL_AESADV_isUserKeyWriteEnabled().

§ DL_AESADV_setKeyAligned()

void DL_AESADV_setKeyAligned	(	AESADV_Regs *	aesadv,
		const uint32_t *	keyAligned,
		DL_AESADV_KEY_SIZE	keySize
	)

Loads a 128 or 256 bit regular key to the AESADV module.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	keyAligned	Pointer to an uint32_t array with a length that contains the cipher key
[in]	keySize	Key Size. One of DL_AESADV_KEY_SIZE

See also: DL_AESADV_setKey

Referenced by DL_AESADV_isUserKeyWriteEnabled().

§ DL_AESADV_setGCMHashKey()

DL_AESADV_STATUS DL_AESADV_setGCMHashKey	(	AESADV_Regs *	aesadv,
		const uint8_t *	hashKey
	)

set the hash key

GCM-Specific. Sets the GHASH Hash key (sometimes referred to as H) if in a GCM mode other than DL_AESADV_MODE_GCM_AUTONOMOUS.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	hashKey	Pointer to an uint8_t array of length 16 that contains the hash key

Returns: Status of operation. Operation will fail if not 32-bit aligned. One of DL_AESADV_STATUS.

Note: This function adds additional cycles in order to verify no unaligned access, if this is not necessary, consider using uint32_t pointers and DL_AESADV_setGCMHashKeyAligned

Referenced by DL_AESADV_isUserKeyWriteEnabled().

§ DL_AESADV_setGCMHashKeyAligned()

void DL_AESADV_setGCMHashKeyAligned	(	AESADV_Regs *	aesadv,
		const uint32_t *	hashKeyAligned
	)

set the hash key

GCM-Specific. Sets the GHASH Hash key (sometimes referred to as H) if in a GCM mode other than DL_AESADV_MODE_GCM_AUTONOMOUS.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	hashKeyAligned	Pointer to an uint32_t array of length 4 that contains the hash key

See also: DL_AESADV_setGCMHashKey

Referenced by DL_AESADV_isUserKeyWriteEnabled().

§ DL_AESADV_setSecondKey()

DL_AESADV_STATUS DL_AESADV_setSecondKey	(	AESADV_Regs *	aesadv,
		const uint8_t *	secondKey
	)

Loads the CBC-MAC second key.

Specific to CBC-MAC operation. Pre-calculated second key to perform a final XOR operation on the last input data block.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	secondKey	Pointer to an uint8_t array of length 16 containing the second key

Returns: Status of operation. Operation will fail if not 32-bit aligned. One of DL_AESADV_STATUS.

Note: This function adds additional cycles in order to verify no unaligned access, if this is not necessary, consider using uint32_t pointers and DL_AESADV_setSecondKeyAligned

Referenced by DL_AESADV_isUserKeyWriteEnabled().

§ DL_AESADV_setSecondKeyAligned()

void DL_AESADV_setSecondKeyAligned	(	AESADV_Regs *	aesadv,
		const uint32_t *	secondKeyAligned
	)

Loads the CBC-MAC second key.

Specific to CBC-MAC operation. Pre-calculated second key to perform a final XOR operation on the last input data block.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	secondKeyAligned	Pointer to an uint32_t array of length 4 containing the second key

See also: DL_AESADV_setSecondKey

Referenced by DL_AESADV_isUserKeyWriteEnabled().

§ DL_AESADV_setThirdKey()

DL_AESADV_STATUS DL_AESADV_setThirdKey	(	AESADV_Regs *	aesadv,
		const uint8_t *	thirdKey
	)

Loads the CBC-MAC third key.

Specific to CBC-MAC operation. Pre-calculated third key to perform a final XOR operation on the last input data block.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	thirdKey	Pointer to an uint8_t array of length 16 containing the third key

Returns: Status of operation. Operation will fail if not 32-bit aligned. One of DL_AESADV_STATUS.

Note: This function adds additional cycles in order to verify no unaligned access, if this is not necessary, consider using uint32_t pointers and DL_AESADV_setThirdKeyAligned

Referenced by DL_AESADV_isUserKeyWriteEnabled().

§ DL_AESADV_setThirdKeyAligned()

void DL_AESADV_setThirdKeyAligned	(	AESADV_Regs *	aesadv,
		const uint32_t *	thirdKeyAligned
	)

Loads the CBC-MAC third key.

Specific to CBC-MAC operation. Pre-calculated third key to perform a final XOR operation on the last input data block.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	thirdKeyAligned	Pointer to an uint32_t array of length 4 containing the third key

See also: DL_AESADV_setThirdKey

Referenced by DL_AESADV_isUserKeyWriteEnabled().

§ DL_AESADV_loadIntermediateTAG()

DL_AESADV_STATUS DL_AESADV_loadIntermediateTAG	(	AESADV_Regs *	aesadv,
		const uint8_t *	tag
	)

Loads either zero or an intermediate 128-bit TAG to resume GCM/CCM.

Specific to the GCM/CCM modes. During initialization and beginning of a new combined operation mode (GCM or CCM only), this must be set to 0. However, during continuation this tag is part of the saved intermediate digest that must be restored.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	tag	Pointer to an uint8_t array of length 16 containing zeroes or the intermediate digest

Returns: Status of operation. Operation will fail if not 32-bit aligned. One of DL_AESADV_STATUS.

Note: This function adds additional cycles in order to verify no unaligned access, if this is not necessary, consider using uint32_t pointers and DL_AESADV_loadIntermediateTAGAligned

Referenced by DL_AESADV_isUserKeyWriteEnabled().

§ DL_AESADV_loadIntermediateTAGAligned()

void DL_AESADV_loadIntermediateTAGAligned	(	AESADV_Regs *	aesadv,
		const uint32_t *	tagAligned
	)

Loads either zero or an intermediate 128-bit TAG to resume GCM/CCM.

Specific to the GCM/CCM modes. During initialization and beginning of a new combined operation mode (GCM or CCM only), this must be set to 0. However, during continuation this tag is part of the saved intermediate digest that must be restored.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	tagAligned	Pointer to an uint32_t array of length 4 containing zeroes or the intermediate digest

See also: DL_AESADV_loadIntermediateTAG

Referenced by DL_AESADV_isUserKeyWriteEnabled().

§ DL_AESADV_loadInitializationVector()

DL_AESADV_STATUS DL_AESADV_loadInitializationVector	(	AESADV_Regs *	aesadv,
		const uint8_t *	iv
	)

Loads the 128-bit initialization vector to the AESADV module.

When used with GCM, the upper word iv[127:96] needs to be written with 0x01000000 in order to appropriately mark the initial counter value of 1.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	iv	Pointer to an uint8_t array of length 16 containing the initialization vector

Returns: Status of operation. Operation will fail if not 32-bit aligned. One of DL_AESADV_STATUS.

Note: For CCM, this iv must be written with the CCM-specific value A0. This value consists of the concatenation of A0 flags, the nonce, and the counter. There is a specialized function that can load this type of IV found at DL_AESADV_loadCCMNonceAndCounter.; This function adds additional cycles in order to verify no unaligned access, if this is not necessary, consider using uint32_t pointers and DL_AESADV_loadInitializationVectorAligned

See also: DL_AESADV_loadCCMNonceAndCounter

Referenced by DL_AESADV_isUserKeyWriteEnabled().

§ DL_AESADV_loadInitializationVectorAligned()

void DL_AESADV_loadInitializationVectorAligned	(	AESADV_Regs *	aesadv,
		const uint32_t *	ivAligned
	)

Loads the 128-bit initialization vector to the AESADV module.

When used with GCM, the upper word iv[127:96] needs to be written with 0x01000000 in order to appropriately mark the initial counter value of 1.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	ivAligned	Pointer to an uint32_t array of length 4 containing the initialization vector

Note: For CCM, this iv must be written with the CCM-specific value A0. This value consists of the concatenation of A0 flags, the nonce, and the counter. There is a specialized function that can load this type of IV found at DL_AESADV_loadCCMNonceAndCounter.

See also: DL_AESADV_loadCCMNonceAndCounter; DL_AESADV_loadInitializationVector

Referenced by DL_AESADV_isUserKeyWriteEnabled().

§ DL_AESADV_readInitializationVector()

DL_AESADV_STATUS DL_AESADV_readInitializationVector	(	AESADV_Regs *	aesadv,
		const uint8_t *	iv
	)

Reads the 128-bit initialization vector from the AES Module.

Contains the latest 128-bit initialization vector output from the engine.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[out]	iv	Pointer to an uint8_t array of length 16 where the iv will be written

Returns: Status of operation. Operation will fail if not 32-bit aligned. One of DL_AESADV_STATUS.

Note: This function adds additional cycles in order to verify no unaligned access, if this is not necessary, consider using uint32_t pointers and DL_AESADV_readInitializationVectorAligned

Referenced by DL_AESADV_isUserKeyWriteEnabled().

§ DL_AESADV_readInitializationVectorAligned()

void DL_AESADV_readInitializationVectorAligned	(	AESADV_Regs *	aesadv,
		uint32_t *	ivAligned
	)

Reads the 128-bit initialization vector from the AES Module.

Contains the latest 128-bit initialization vector output from the engine.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[out]	ivAligned	Pointer to an uint32_t array of length 4 where the iv will be written

See also: DL_AESADV_readInitializationVector

Referenced by DL_AESADV_isUserKeyWriteEnabled().

§ DL_AESADV_loadCCMNonceAndCounter()

void DL_AESADV_loadCCMNonceAndCounter	(	AESADV_Regs *	aesadv,
		uint8_t *	nonce,
		DL_AESADV_CCM_CTR_WIDTH	ctrWidth
	)

Loads the CCM Nonce And Counter IV, also called A0.

CCM-Specific use of the IV field called A0. The A0 field is formatted as follows:

LSB MSB (5'b00000 concat 3'b counterWidth - 1) | Nonce | Counter IV (always 0's)

the counter width is set as one of DL_AESADV_CCM_CTR_WIDTH (equal to counterWidth -1). For example, a 5-byte width for the counter (and thus the data payload width) will correspond to a Counter IV of 40-bits. The counter width taking 8 bits, and the Nonce taking the remaining 80-bits (10 bytes). An 8-byte counter width would yield a counter IV width of 64-bits with a Nonce taking the remaining 54-bits (7 bytes). The LSB of the IV will then be 8'b00000111 or 0x07 (one less than the byte width) Thus, the Nonce should be sufficiently wide to fit the bits that are remaining for the nonce, and this will vary with the counter field width provided. The LSB of the IV will be 0x04 (one less than the byte width)

The following table describes the Nonce array lengths that should be used:

DL_AESADV_CCM_CTR_WIDTH (bytes)	Nonce Array Length Required (bytes)
2	13
3	12
4	11
5	10
6	9
7	8
8	7

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	nonce	Pointer to the uint8_t nonce Value for CCM, should be unique and length calculated as above.
[in]	ctrWidth	Counter Width. One of DL_AESADV_CCM_CTR_WIDTH. Should match width provided in control register.

Note: During halting and resumption of CCM operations, it is required to use the DL_AESADV_loadInitializationVector and DL_AESADV_readInitializationVector functions as this preserves the current counter state. This function is designed for initialization of the operation only.

See also: DL_AESADV_loadInitializationVector; DL_AESADV_readInitializationVector

Referenced by DL_AESADV_isUserKeyWriteEnabled().

§ DL_AESADV_loadInputData()

DL_AESADV_STATUS DL_AESADV_loadInputData	(	AESADV_Regs *	aesadv,
		const uint8_t *	data
	)

loads 128 bits (4 words) of input data

Loads the next 128 bits of input data. Either AAD (GCM/CCM) or Crypto Data. If less than 128 bits are left (or if the width of data is less than 128 bits ex. CCM), it is still necessary to pad 0's to the remaining bits in order for the engine to start the operation. For GCM/CCM, the last AAD block can have less than 128 bits, and should be padded with 0's rather than appended to the crypto data. For authentication modes (GCM, CCM, CBC-MAC), refer to the TRM for additional information about necessary padding.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	data	Pointer to uint8_t bit data array of length 16 to be inputted.

Returns: Status of operation. Operation will fail if not 32-bit aligned. One of DL_AESADV_STATUS.

Note: This function adds additional cycles in order to verify no unaligned access, if this is not necessary, consider using uint32_t pointers and DL_AESADV_loadInputDataAligned

See also: DL_AESADV_readOutputData

Referenced by DL_AESADV_isUserKeyWriteEnabled().

§ DL_AESADV_loadInputDataAligned()

void DL_AESADV_loadInputDataAligned	(	AESADV_Regs *	aesadv,
		const uint32_t *	dataAligned
	)

loads 128 bits (4 words) of input data

Loads the next 128 bits of input data. Either AAD (GCM/CCM) or Crypto Data. If less than 128 bits are left (or if the width of data is less than 128 bits ex. CCM), it is still necessary to pad 0's to the remaining bits in order for the engine to start the operation. For GCM/CCM, the last AAD block can have less than 128 bits, and should be padded with 0's rather than appended to the crypto data. For authentication modes (GCM, CCM, CBC-MAC), refer to the TRM for additional information about necessary padding.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	dataAligned	Pointer to uint32_t bit data array of length 4 to be inputted.

See also: DL_AESADV_loadInputData; DL_AESADV_readOutputDataAligned

Referenced by DL_AESADV_isUserKeyWriteEnabled().

§ DL_AESADV_readOutputData()

DL_AESADV_STATUS DL_AESADV_readOutputData	(	const AESADV_Regs *	aesadv,
		const uint8_t *	data
	)

reads 128-bits of output data that has been encrypted/decrypted.

Reads the ciphertext/plaintext outputted by the AESADV module. If less than 128 bits is expected, there still must be 128-bits read, which must mean the data pointer has at least 128 bits to spare.

Inputting Additional Authentication Data (AAD) will not place any information into the output buffer, thus a read is not required.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[out]	data	Pointer to the data that will be read, uint8_t requiring length of at least 16 to not overwrite other variables.

Returns: Status of operation. Operation will fail if not 32-bit aligned. One of DL_AESADV_STATUS.

Note: This function adds additional cycles in order to verify no unaligned access, if this is not necessary, consider using uint32_t pointers and DL_AESADV_readOutputDataAligned

Referenced by DL_AESADV_isUserKeyWriteEnabled().

§ DL_AESADV_readOutputDataAligned()

void DL_AESADV_readOutputDataAligned	(	const AESADV_Regs *	aesadv,
		uint32_t *	dataAligned
	)

reads 128-bits of output data that has been encrypted/decrypted.

Reads the ciphertext/plaintext outputted by the AESADV module. If less than 128 bits is expected, there still must be 128-bits read, which must mean the data pointer has at least 128 bits to spare.

Inputting Additional Authentication Data (AAD) will not place any information into the output buffer, thus a read is not required.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[out]	dataAligned	Pointer to the data that will be read, uint32_t requiring length of at least 4 to not overwrite other variables.

See also: DL_AESADV_readOutputData

Referenced by DL_AESADV_isUserKeyWriteEnabled().

§ DL_AESADV_readTAG()

DL_AESADV_STATUS DL_AESADV_readTAG	(	const AESADV_Regs *	aesadv,
		const uint8_t *	tag
	)

reads 128-bit output tag at the conclusion of operation/halt

Specific to authentication-enabled modes. Reads the tag. Only valid at the conclusion of an operation, or because an operation has been halted and requires a digest. In the case of a halted operation, the output will be an intermediate tag for CCM or GCM.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[out]	tag	Pointer to the tag to be read, a uint8_t array of length 16

Returns: Status of operation. Operation will fail if not 32-bit aligned. One of DL_AESADV_STATUS.

Note: This function adds additional cycles in order to verify no unaligned access, if this is not necessary, consider using uint32_t pointers and DL_AESADV_readTAGAligned

See also: DL_AESADV_isSavedOutputContextReady

Referenced by DL_AESADV_isUserKeyWriteEnabled().

§ DL_AESADV_readTAGAligned()

void DL_AESADV_readTAGAligned	(	const AESADV_Regs *	aesadv,
		uint32_t *	tagAligned
	)

reads 128-bit output tag at the conclusion of operation/halt

Specific to authentication-enabled modes. Reads the tag. Only valid at the conclusion of an operation, or because an operation has been halted and requires a digest. In the case of a halted operation, the output will be an intermediate tag for CCM or GCM.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[out]	tagAligned	Pointer to the tag to be read, a uint32_t array of length 4

See also: DL_AESADV_isSavedOutputContextReady

Referenced by DL_AESADV_isUserKeyWriteEnabled().

§ DL_AESADV_forceInputDataAvailable()

__STATIC_INLINE void DL_AESADV_forceInputDataAvailable ( AESADV_Regs * aesadv )

Forces AESADV to begin processing input data.

This function will validate the input data buffer and force AESADV to begin processing data. Any value can be used in order to force processing data.

Note: To use, DL_AESADV_enableDMAOperation must not be in use

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

§ DL_AESADV_setCCMAlignWord()

__STATIC_INLINE void DL_AESADV_setCCMAlignWord	(	AESADV_Regs *	aesadv,
		uint32_t	alignWord
	)

Set the CCM AAD align data word.

Specific to CCM mode. Writes the alignment data word used to concatenate to the next block of additional authentication data (AAD). Will need to be set during initialization or during the resumption of a halted CCM operation.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	alignWord	AAD alignment word of type uint32_t

§ DL_AESADV_getCCMAlignWord()

__STATIC_INLINE uint32_t DL_AESADV_getCCMAlignWord ( const AESADV_Regs * aesadv )

Get the CCM AAD align data word.

Specific to CCM mode. Reads the alignment data word used to concatenate to the next block of additional authentication data (AAD).

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

Returns: Current AAD alignment word of type uint32_t

§ DL_AESADV_setLowerBlockCount()

__STATIC_INLINE void DL_AESADV_setLowerBlockCount	(	AESADV_Regs *	aesadv,
		uint32_t	lowerBlockCount
	)

Sets the lower 32-bits of the data blocks remaining in an operation.

Specific to GCM/CCM mode. The block count is 57-bits and represents the number of remaining AES cryptographic payload blocks (non-AAD) in an operation. During an interruption of a GCM/CCM operation, this number needs to be saved and restored before resumption.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	lowerBlockCount	Lower 32-bits of the overall data blocks remaining

See also: DL_AESADV_getLowerBlockCount; DL_AESADV_setUpperBlockCount

§ DL_AESADV_getLowerBlockCount()

__STATIC_INLINE uint32_t DL_AESADV_getLowerBlockCount ( const AESADV_Regs * aesadv )

Gets the lower 32-bits of the data blocks remaining in an operation.

Specific to GCM/CCM mode. The block count is 57-bits and represents the number of remaining AES cryptographic payload blocks (non-AAD) in an operation. During an interruption of a GCM/CCM operation, this number needs to be saved and restored before resumption.

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

Returns: Lower 32-bits of overall data blocks remaining

See also: DL_AESADV_setLowerBlockCount

§ DL_AESADV_setUpperBlockCount()

__STATIC_INLINE void DL_AESADV_setUpperBlockCount	(	AESADV_Regs *	aesadv,
		uint32_t	upperBlockCount
	)

Sets the upper 25-bits of the data blocks remaining in an operation.

Specific to GCM/CCM mode. The block count is 57-bits and represents the number of remaining AES cryptographic payload blocks (non-AAD) in an operation. During an interruption of a GCM/CCM operation, this number needs to be saved and restored before resumption.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	upperBlockCount	Upper 25-bits of the overall data blocks remaining (bits [25:31] are ignored)

See also: DL_AESADV_getUpperBlockCount; DL_AESADV_setLowerBlockCount

§ DL_AESADV_getUpperBlockCount()

__STATIC_INLINE uint32_t DL_AESADV_getUpperBlockCount ( const AESADV_Regs * aesadv )

Gets the upper 25-bits of the data blocks remaining in an operation.

Specific to GCM/CCM mode. The block count is 57-bits and represents the number of remaining AES cryptographic payload blocks (non-AAD) in an operation. During an interruption of a GCM/CCM operation, this number needs to be saved and restored before resumption.

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

Returns: Upper 25-bits of overall data blocks remaining (bits [25:31] are 0)

See also: DL_AESADV_setUpperBlockCount

§ DL_AESADV_enableInterrupt()

__STATIC_INLINE void DL_AESADV_enableInterrupt	(	AESADV_Regs *	aesadv,
		uint32_t	interruptMask
	)

Enable AESADV interrupts.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	interruptMask	Bit mask of interrupts to enable. Bitwise OR of DL_AESADV_INTERRUPT

§ DL_AESADV_disableInterrupt()

__STATIC_INLINE void DL_AESADV_disableInterrupt	(	AESADV_Regs *	aesadv,
		uint32_t	interruptMask
	)

Disable AESADV interrupts.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	interruptMask	Bit mask of interrupts to enable. Bitwise OR of DL_AESADV_INTERRUPT

§ DL_AESADV_getEnabledInterrupts()

__STATIC_INLINE uint32_t DL_AESADV_getEnabledInterrupts	(	const AESADV_Regs *	aesadv,
		uint32_t	interruptMask
	)

Check if AES Ready interrupt is enabled.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	interruptMask	Bit mask of interrupts to check. Bitwise OR of DL_AESADV_INTERRUPT

Returns: Which of the requested AESADV interrupts are enabled

Return values

Bitwise OR of DL_AESADV_INTERRUPT values

§ DL_AESADV_getEnabledInterruptStatus()

__STATIC_INLINE uint32_t DL_AESADV_getEnabledInterruptStatus	(	const AESADV_Regs *	aesadv,
		uint32_t	interruptMask
	)

Check interrupt flag of enabled AESADV interrupts.

Checks if any of the AESADV interrupts that was previously enabled are pending.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	interruptMask	Bit mask of interrupts to check. Bitwise OR of DL_AESADV_INTERRUPT

Returns: Which of the requested and enabled AESADV interrupts are pending

Return values

Bitwise OR of DL_AESADV_INTERRUPT

See also: DL_AESADV_enableInterrupt

§ DL_AESADV_getRawInterruptStatus()

__STATIC_INLINE uint32_t DL_AESADV_getRawInterruptStatus	(	const AESADV_Regs *	aesadv,
		uint32_t	interruptMask
	)

Check interrupt flag of any AESADV interrupts.

Checks if any of the AESADV interrupts are pending. Interrupts do not have to be previously enabled.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	interruptMask	Bit mask of interrupts to check. Bitwise OR of DL_AESADV_INTERRUPT

Returns: Which of the requested AESADV interrupts are pending

Return values

Bitwise OR of DL_AESADV_INTERRUPT

§ DL_AESADV_getPendingInterrupt()

__STATIC_INLINE DL_AESADV_IIDX DL_AESADV_getPendingInterrupt ( const AESADV_Regs * aesadv )

Get highest priority pending AESADV interrupt.

Checks if any AESADV interrupts are pending. Interrupt does not have to be previously enabled.

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

Returns: The highest priority pending AESADV interrupt

Return values

One	of DL_AESADV_IIDX

§ DL_AESADV_clearInterruptStatus()

__STATIC_INLINE void DL_AESADV_clearInterruptStatus	(	AESADV_Regs *	aesadv,
		uint32_t	interruptMask
	)

Clear pending AESADV Interrupts.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	interruptMask	Bit mask of interrupts to clear. Bitwise OR of DL_AESADV_INTERRUPT

§ DL_AESADV_enableDMAInputTriggerEvent()

__STATIC_INLINE void DL_AESADV_enableDMAInputTriggerEvent ( AESADV_Regs * aesadv )

Enables DMA input trigger to publish AESADV write requests to the DMA.

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

References DL_AESADV_EVENT_DMA_DATA_INPUT_TRIGGER.

§ DL_AESADV_enableDMAOutputTriggerEvent()

__STATIC_INLINE void DL_AESADV_enableDMAOutputTriggerEvent ( AESADV_Regs * aesadv )

Enables DMA output trigger to publish AESADV read requests to the DMA.

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

References DL_AESADV_EVENT_DMA_DATA_OUTPUT_TRIGGER.

§ DL_AESADV_disableDMAInputTriggerEvent()

__STATIC_INLINE void DL_AESADV_disableDMAInputTriggerEvent ( AESADV_Regs * aesadv )

Disable DMA input trigger event.

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

References DL_AESADV_EVENT_DMA_DATA_INPUT_TRIGGER.

§ DL_AESADV_disableDMAOutputTriggerEvent()

__STATIC_INLINE void DL_AESADV_disableDMAOutputTriggerEvent ( AESADV_Regs * aesadv )

Disable DMA output trigger event.

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

References DL_AESADV_EVENT_DMA_DATA_OUTPUT_TRIGGER.

§ DL_AESADV_getEnabledDMAInputTriggerEvent()

__STATIC_INLINE uint32_t DL_AESADV_getEnabledDMAInputTriggerEvent ( const AESADV_Regs * aesadv )

Check if the DMA input trigger event is enabled.

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

Returns: If DMA input trigger event is enabled

Return values

DL_AESADV_EVENT_DMA_DATA_INPUT_TRIGGER	if DMA input trigger event is enabled
0	if DMA input trigger event is not enabled

References DL_AESADV_EVENT_DMA_DATA_INPUT_TRIGGER.

§ DL_AESADV_getEnabledDMAOutputTriggerEvent()

__STATIC_INLINE uint32_t DL_AESADV_getEnabledDMAOutputTriggerEvent ( const AESADV_Regs * aesadv )

Check if the DMA output trigger event is enabled.

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

Returns: If DMA output trigger event is enabled

Return values

DL_AESADV_EVENT_DMA_DATA_OUTPUT_TRIGGER	if DMA output trigger event is enabled
0	if DMA output trigger event is not enabled

References DL_AESADV_EVENT_DMA_DATA_OUTPUT_TRIGGER.

§ DL_AESADV_getEnabledDMAInputTriggerEventStatus()

__STATIC_INLINE uint32_t DL_AESADV_getEnabledDMAInputTriggerEventStatus ( const AESADV_Regs * aesadv )

Check interrupt flag of DMA input trigger event.

Checks if DMA input trigger event that was previously enabled is pending.

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

Returns: If DMA input trigger event is pending

Return values

DL_AESADV_EVENT_DMA_DATA_INPUT_TRIGGER	if DMA input trigger event is pending
0	if DMA input trigger event is not pending

See also: DL_AESADV_enableDMAInputTriggerEvent

References DL_AESADV_EVENT_DMA_DATA_INPUT_TRIGGER.

§ DL_AESADV_getEnabledDMAOutputTriggerEventStatus()

__STATIC_INLINE uint32_t DL_AESADV_getEnabledDMAOutputTriggerEventStatus ( const AESADV_Regs * aesadv )

Check interrupt flag of DMA output trigger event.

Checks if DMA output trigger event that was previously enabled is pending.

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

Returns: If DMA output trigger event is pending

Return values

DL_AESADV_EVENT_DMA_DATA_OUTPUT_TRIGGER	if DMA output trigger event is pending
0	if DMA output trigger event is not pending

See also: DL_AESADV_enableDMAOutputTriggerEvent

References DL_AESADV_EVENT_DMA_DATA_OUTPUT_TRIGGER.

§ DL_AESADV_getRawDMAInputTriggerEventStatus()

__STATIC_INLINE uint32_t DL_AESADV_getRawDMAInputTriggerEventStatus ( const AESADV_Regs * aesadv )

Check interrupt flag of DMA input trigger event.

Checks if DMA input trigger event is pending. Event does not have to be previously enabled.

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

Returns: If DMA input trigger event is pending

Return values

DL_AESADV_EVENT_DMA_DATA_INPUT_TRIGGER	if DMA input trigger event is pending
0	if DMA input trigger event is not pending

References DL_AESADV_EVENT_DMA_DATA_INPUT_TRIGGER.

§ DL_AESADV_getRawDMAOutputTriggerEventStatus()

__STATIC_INLINE uint32_t DL_AESADV_getRawDMAOutputTriggerEventStatus ( const AESADV_Regs * aesadv )

Check interrupt flag of DMA output trigger event.

Checks if DMA output trigger event is pending. Event does not have to be previously enabled.

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

Returns: If DMA output trigger event is pending

Return values

DL_AESADV_EVENT_DMA_DATA_INPUT_TRIGGER	if DMA output trigger event is pending
0	if DMA output trigger event is not pending

References DL_AESADV_EVENT_DMA_DATA_OUTPUT_TRIGGER.

§ DL_AESADV_getPendingDMAInputTriggerEvent()

__STATIC_INLINE DL_AESADV_IIDX DL_AESADV_getPendingDMAInputTriggerEvent ( const AESADV_Regs * aesadv )

Get highest priority pending DMA input trigger event.

Checks if DMA input trigger event is pending. Event does not have to be previously enabled.

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

Returns: The highest priority pending DMA input trigger event

§ DL_AESADV_getPendingDMAOutputTriggerEvent()

__STATIC_INLINE DL_AESADV_IIDX DL_AESADV_getPendingDMAOutputTriggerEvent ( const AESADV_Regs * aesadv )

Get highest priority pending DMA output trigger event.

Checks if DMA output trigger event is pending. Event does not have to be previously enabled.

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

Returns: The highest priority pending DMA output trigger event

§ DL_AESADV_clearDMAInputTriggerEventStatus()

__STATIC_INLINE void DL_AESADV_clearDMAInputTriggerEventStatus ( AESADV_Regs * aesadv )

Clear pending DMA input trigger event.

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

References DL_AESADV_EVENT_DMA_DATA_INPUT_TRIGGER.

§ DL_AESADV_clearDMAOutputTriggerEventStatus()

__STATIC_INLINE void DL_AESADV_clearDMAOutputTriggerEventStatus ( AESADV_Regs * aesadv )

Clear pending DMA output trigger event.

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

References DL_AESADV_EVENT_DMA_DATA_OUTPUT_TRIGGER.

§ DL_AESADV_getDATAINAddr()

__STATIC_INLINE uintptr_t DL_AESADV_getDATAINAddr ( const AESADV_Regs * aesadv )

Returns the address of the AESADV input data register.

This API can be used with DL_DMA_setDestAddr to set the destination address when using DMA transfers. The Data should be written as 128-bit block writes (4 32-bit words) to a region of memory starting at the provided address. Use with the DL_AESADV_enableDMAOperation The DMA output request use DL_AESADV_EVENT_DMA_DATA_OUTPUT_TRIGGER

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

Returns: Address of the AESADV input data register

See also: DL_AESADV_enableDMAOperation

§ DL_AESADV_getDATAOUTAddr()

__STATIC_INLINE uintptr_t DL_AESADV_getDATAOUTAddr ( const AESADV_Regs * aesadv )

Returns the address of the AESADV output data register.

This API can be used with DL_DMA_setDestAddr to set the destination address when using DMA transfers. The Data should be read as 128-bit block read (4 32-bit words) to a region of memory starting at the provided address. Use with the DL_AESADV_enableDMAOperation The DMA output request use DL_AESADV_EVENT_DMA_DATA_OUTPUT_TRIGGER

Parameters

[in] aesadv Pointer to the register overlay for the peripheral

Returns: Address of the AESADV output data register

See also: DL_AESADV_enableDMAOperation

References DL_AESADV_initCBC(), DL_AESADV_initCBCMAC(), DL_AESADV_initCCM(), DL_AESADV_initCFB(), DL_AESADV_initCMAC(), DL_AESADV_initCTR(), DL_AESADV_initECB(), DL_AESADV_initGCM(), DL_AESADV_initICM(), and DL_AESADV_initOFB().

§ DL_AESADV_initECB()

void DL_AESADV_initECB	(	AESADV_Regs *	aesadv,
		const DL_AESADV_Config *	config
	)

Initializes the engine in the Electronic Codebook (ECB) mode.

This function is designed to place the engine in Electronic Codebook (ECB) mode with all necessary control context. The primary key, however, must be set into the AES engine before this function is called. This is because the key could come from either the KEYSTORECTL or from plaintext depending on system setting.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	config	Pointer to configuration struct with valid values for: direction, lowerCryptoLength, upperCryptoLength

See also: DL_AESADV_setKey

Referenced by DL_AESADV_getDATAOUTAddr().

§ DL_AESADV_initCBC()

void DL_AESADV_initCBC	(	AESADV_Regs *	aesadv,
		const DL_AESADV_Config *	config
	)

Initializes the engine in the Cipher-Block Chaining (CBC) mode.

This function is designed to place the engine in Cipher Block Chaining (CBC) mode with all necessary control context. The primary key, however, must be set into the AES engine before this function is called. This is because the key could come from either the KEYSTORECTL or from plaintext depending on system setting.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	config	Pointer to configuration struct with valid values for: direction, iv, lowerCryptoLength, upperCryptoLength

See also: DL_AESADV_setKey

Referenced by DL_AESADV_getDATAOUTAddr().

§ DL_AESADV_initCFB()

void DL_AESADV_initCFB	(	AESADV_Regs *	aesadv,
		const DL_AESADV_Config *	config
	)

Initializes the engine in the Cipher Feedback (CFB) mode.

This function is designed to place the engine in Cipher Feedback (CFB) mode with all necessary control context. The primary key, however, must be set into the AES engine before this function is called. This is because the key could come from either the KEYSTORECTL or from plaintext depending on system setting.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	config	Pointer to configuration struct with valid values for: direction, iv, lowerCryptoLength, upperCryptoLength, cfb_fbWidth

See also: DL_AESADV_setKey

Referenced by DL_AESADV_getDATAOUTAddr().

§ DL_AESADV_initOFB()

void DL_AESADV_initOFB	(	AESADV_Regs *	aesadv,
		const DL_AESADV_Config *	config
	)

Initializes the engine in the Output Feedback (OFB) mode.

This function is designed to place the engine in Output Feedback (OFB) mode with all necessary control context. The primary key, however, must be set into the AES engine before this function is called. This is because the key could come from either the KEYSTORECTL or from plaintext depending on system setting.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	config	Pointer to configuration struct with valid values for: direction, iv, lowerCryptoLength, upperCryptoLength

See also: DL_AESADV_setKey

Referenced by DL_AESADV_getDATAOUTAddr().

§ DL_AESADV_initCTR()

void DL_AESADV_initCTR	(	AESADV_Regs *	aesadv,
		const DL_AESADV_Config *	config
	)

Initializes the engine in the Counter (CTR) mode.

This function is designed to place the engine in Counter (CTR) mode with all necessary control context. The primary key, however, must be set into the AES engine before this function is called. This is because the key could come from either the KEYSTORECTL or from plaintext depending on system setting.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	config	Pointer to configuration struct with valid values for: direction iv, lowerCryptoLength, upperCryptoLength, ctr_ctrWidth. IV is typically 0x00000001

See also: DL_AESADV_setKey

Referenced by DL_AESADV_getDATAOUTAddr().

§ DL_AESADV_initICM()

void DL_AESADV_initICM	(	AESADV_Regs *	aesadv,
		const DL_AESADV_Config *	config
	)

Initializes the engine in the Integer Counter Mode (ICM)

This function is designed to place the engine in Integer Counter Mode (ICM) with all necessary control context. ICM is a variant of CTR mode with a 16- bit wide counter value. The primary key, however, must be set into the AES engine before this function is called. This is because the key could come from either the KEYSTORECTL or from plaintext depending on system setting.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	config	Pointer to configuration struct with valid values for: direction iv, lowerCryptoLength, upperCryptoLength. IV is typically 0x00000001

See also: DL_AESADV_setKey

Referenced by DL_AESADV_getDATAOUTAddr().

§ DL_AESADV_initCMAC()

void DL_AESADV_initCMAC	(	AESADV_Regs *	aesadv,
		const DL_AESADV_Config *	config
	)

Initializes the engine in the block cipher-based Message Authentication Code (CMAC)

This function is designed to place the engine in block cipher-based Message Authentication Code: CMAC. CMAC is strictly authentication and does not generate any ciphertext or plaintext, but only a tag. CMAC is also recommended by NIST in SP 800-38B for authentication. It consists of a primary key as well as derived keys K1 and K2 which must be provided in the configuration. The engine will not derive K1 and K2, and these must be calculated beforehand and included in the config struct. The primary key from which K1 and K2 are derived, however, must be set in the AES engine before this function is called. This is because the key could come from either the KEYSTORECTL or from plaintext depending on system setting.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	config	Pointer to configuration struct with valid values for: K1, K2, lowerCryptoLength, upperCryptoLength.

See also: DL_AESADV_setKey

Referenced by DL_AESADV_getDATAOUTAddr().

§ DL_AESADV_initCBCMAC()

void DL_AESADV_initCBCMAC	(	AESADV_Regs *	aesadv,
		const DL_AESADV_Config *	config
	)

Initializes the engine in the Cipher Block Chaining Message Authenication Code (CBC-MAC)

This function is designed to place the engine in Cipher Block Chaining Message Authenication Code (CBC-MAC). CBC-MAC is strictly authentication and does not generate any ciphertext or plaintext, but only a tag. The primary key, however, must be set into the AES engine before this function is called. This is because the key could come from either the KEYSTORECTL or from plaintext depending on system setting.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	config	Pointer to configuration struct with valid values for: lowerCryptoLength, upperCryptoLength.

See also: DL_AESADV_setKey

Referenced by DL_AESADV_getDATAOUTAddr().

§ DL_AESADV_initGCM()

void DL_AESADV_initGCM	(	AESADV_Regs *	aesadv,
		const DL_AESADV_Config *	config
	)

Initializes the engine in the Galois/Counter Mode (GCM)

This function is designed to place the engine in Galois/Counter Mode (GCM). GCM is both authentication and data encryption, and will generate both ciphertext/plaintext and the corresponding tag. The primary key and hash key (if expected from DL_AESADV_MODE) must be set into the AES engine before this function is called. This is because the key could come from either the KEYSTORECTL or from plaintext depending on system setting. After this function has completed, the user is to first input all additional authentication data (AAD) before entering the crypto payload.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	config	Pointer to configuration struct with valid values for: mode (one of the GCM operations), direction, iv, lowerCryptoLength, upperCryptoLength, aadLength. IV is typically 0x00000001. The maximum length in bytes is 2^36 - 32.

See also: DL_AESADV_setKey; DL_AESADV_setHashKey

Referenced by DL_AESADV_getDATAOUTAddr().

§ DL_AESADV_initCCM()

void DL_AESADV_initCCM	(	AESADV_Regs *	aesadv,
		DL_AESADV_Config *	config
	)

Initializes the engine in the Counter & CBC-MAC (CCM)mode.

This function is designed to place the engine in Counter and Cipher-Block Chaining Message Authentication Code (CCM) mode. CCM is both authentication and data encryption, and will generate both ciphertext/plaintext and the corresponding tag. To calculate the length of the nonce and the counter width, please refer to DL_AESADV_loadCCMNonceAndCounter. After this function has completed, the user is to first input all additional authentication data (AAD) before entering the crypto payload.

Parameters

[in]	aesadv	Pointer to the register overlay for the peripheral
[in]	config	Pointer to configuration struct with valid values for: direction, nonce, ccm_ctrWidth, ccm_tagWidth, lowerCryptoLength, upperCryptoLength, aadLength IV is typically 0x00000001. The maximum AAD Length is 2^16-2^8

See also: DL_AESADV_setKey

Referenced by DL_AESADV_getDATAOUTAddr().

Modules

Data Structures

Macros

Enumerations

Functions

Detailed Description

Overview

Macro Definition Documentation

§ DL_AESADV_MODE_MASK

Enumeration Type Documentation

§ DL_AESADV_IIDX

§ DL_AESADV_MODE

§ DL_AESADV_KEY_SIZE

§ DL_AESADV_DIR

§ DL_AESADV_CTR_WIDTH

§ DL_AESADV_FB_WIDTH

§ DL_AESADV_CCM_CTR_WIDTH

§ DL_AESADV_CCM_TAG_WIDTH

§ DL_AESADV_STATUS

Function Documentation

§ DL_AESADV_enablePower()

§ DL_AESADV_disablePower()

§ DL_AESADV_isPowerEnabled()

§ DL_AESADV_reset()

§ DL_AESADV_isReset()

§ DL_AESADV_isOutputReady()

§ DL_AESADV_isInputReady()

§ DL_AESADV_setDirection()

§ DL_AESADV_getDirection()

§ DL_AESADV_setKeySize()

§ DL_AESADV_getKeySize()

§ DL_AESADV_setMode()

§ DL_AESADV_getMode()

§ DL_AESADV_setFeedbackWidth()

§ DL_AESADV_getFeedbackWidth()

§ DL_AESADV_setCounterWidth()

§ DL_AESADV_getCounterWidth()

§ DL_AESADV_setCCMCounterWidth()

§ DL_AESADV_getCCMCounterWidth()

§ DL_AESADV_setCCMTagWidth()

§ DL_AESADV_getCCMTagWidth()

§ DL_AESADV_haltOperationAndGenerateDigest()

§ DL_AESADV_resumeAADPhase()

§ DL_AESADV_resumeDataPhase()

§ DL_AESADV_enableSavedOutputContext()

§ DL_AESADV_disableSavedOutputContext()

§ DL_AESADV_isSavedOutputContextEnabled()

§ DL_AESADV_isSavedOutputContextReady()

§ DL_AESADV_isInputContextWriteable()

§ DL_AESADV_setLowerCryptoLength()

§ DL_AESADV_setUpperCryptoLength()

§ DL_AESADV_setAADLength()

§ DL_AESADV_enableDMAOperation()

§ DL_AESADV_disableDMAOperation()

§ DL_AESADV_isDMAOperationEnabled()

§ DL_AESADV_isUserKeyWriteEnabled()

§ DL_AESADV_setKey()

§ DL_AESADV_setKeyAligned()

§ DL_AESADV_setGCMHashKey()

§ DL_AESADV_setGCMHashKeyAligned()

§ DL_AESADV_setSecondKey()

§ DL_AESADV_setSecondKeyAligned()

§ DL_AESADV_setThirdKey()

§ DL_AESADV_setThirdKeyAligned()

§ DL_AESADV_loadIntermediateTAG()

§ DL_AESADV_loadIntermediateTAGAligned()

§ DL_AESADV_loadInitializationVector()

§ DL_AESADV_loadInitializationVectorAligned()

§ DL_AESADV_readInitializationVector()

§ DL_AESADV_readInitializationVectorAligned()

§ DL_AESADV_loadCCMNonceAndCounter()

§ DL_AESADV_loadInputData()

§ DL_AESADV_loadInputDataAligned()

§ DL_AESADV_readOutputData()

§ DL_AESADV_readOutputDataAligned()

§ DL_AESADV_readTAG()

§ DL_AESADV_readTAGAligned()

§ DL_AESADV_forceInputDataAvailable()

§ DL_AESADV_setCCMAlignWord()

§ DL_AESADV_getCCMAlignWord()