Functions
static uint32_t	AUXTDCStatusGet (uint32_t ui32Base)
	Get the status of the AUX TDC internal state machine. More...

void	AUXTDCConfigSet (uint32_t ui32Base, uint32_t ui32StartCondition, uint32_t ui32StopCondition)
	Configure the operation of the AUX TDC. More...

static bool	AUXTDCIdle (uint32_t ui32Base)
	Check if the AUX TDC is in idle mode. More...

static void	AUXTDCEnable (uint32_t ui32Base, uint32_t ui32RunMode)
	Enable the AUX TDC for a measurement. More...

static void	AUXTDCIdleForce (uint32_t ui32Base)
	Force the AUX TDC back to Idle mode. More...

uint32_t	AUXTDCMeasurementDone (uint32_t ui32Base)
	Check if the AUX TDC is done measuring. More...

static uint32_t	AUXTDCMeasurementGet (uint32_t ui32Base)
	Get the value of the latest measurement. More...

static void	AUXTDCLimitSet (uint32_t ui32Base, uint32_t ui32Limit)
	Set the saturation limit of the measurement. More...

static uint32_t	AUXTDCLimitGet (uint32_t ui32Base)
	Get the saturation limit of the measurement. More...

static bool	AUXTDCCounterEnable (uint32_t ui32Base)
	Enables the counter if possible. More...

static bool	AUXTDCCounterDisable (uint32_t ui32Base)
	Disables the counter if possible. More...

static bool	AUXTDCCounterSet (uint32_t ui32Base, uint32_t ui32Events)
	Set the reset number of counter compare/stop event to ignore before taking a measurement. More...

static uint32_t	AUXTDCCounterGet (uint32_t ui32Base)
	Get the current number of counter compare/stop event to ignore before taking a measurement. More...

Detailed Description

Function Documentation

§ AUXTDCConfigSet()

void AUXTDCConfigSet	(	uint32_t	ui32Base,
		uint32_t	ui32StartCondition,
		uint32_t	ui32StopCondition
	)

Configure the operation of the AUX TDC.

Use this function to configure the start and stop event for the AUX TDC.

The ui32StartCondition must be a bitwise OR of the start event and the polarity of the start event. The start events are:

The polarity of the start event is either rising AUXTDC_STARTPOL_RIS or falling AUXTDC_STARTPOL_FALL.

The ui32StopCondition must be a bitwise OR of the stop event and the polarity of the stop event. The stop events are:

The polarity of the stop event is either rising AUXTDC_STOPPOL_RIS or falling AUXTDC_STOPPOL_FALL.

Note: The AUX TDC should only be configured when the AUX TDC is in the Idle state. To ensure that software does not lock up, it is recommended to ensure that the AUX TDC is actually in idle when calling AUXTDCConfigSet(). This can be tested using AUXTDCIdle().

Parameters

ui32Base	is base address of the AUX TDC.
ui32StartCondition	is AUX TDC a bitwise OR of a start event and polarity.
ui32StopCondition	is AUX TDC a bitwise OR of a stop event and polarity.

Returns: None

See also: AUXTDCConfigSet(), AUXTDCIdle()

Referenced by AUXTDCStatusGet().

 {
     // Check the arguments.
     ASSERT(AUXTDCBaseValid(ui32Base));
 
     // Make sure the AUX TDC is in the idle state before changing the
     // configuration.
     while(!((HWREG(ui32Base + AUX_TDC_O_STAT) & AUX_TDC_STAT_STATE_M) ==
             AUX_TDC_STAT_STATE_IDLE))
     {
     }
 
     // Clear previous results.
     HWREG(ui32Base + AUX_TDC_O_CTL) = 0x0;
 
     // Change the configuration.
     HWREG(ui32Base + AUX_TDC_O_TRIGSRC) = ui32StartCondition | ui32StopCondition;
 }

§ AUXTDCCounterDisable()

static bool AUXTDCCounterDisable ( uint32_t ui32Base )

inlinestatic

Disables the counter if possible.

This function can be used to disable the AUX TDC stop/compare event counter.

Parameters

ui32Base is base address of the AUX TDC.

Returns: Returns true if the counter was successfully disabled. If the AUX TDC is not in Idle mode, the counter can not be disabled, and the return value will be false.

See also: AUXTDCCounterEnable() for more information on how to use the counter.

 {
     // Check the arguments.
     ASSERT(AUXTDCBaseValid(ui32Base));
 
     // Check if the AUX TDC is in Idle mode. If not in Idle mode, the counter
     // will not be disabled.
     if(!((HWREG(ui32Base + AUX_TDC_O_STAT) & AUX_TDC_STAT_STATE_M) ==
             AUX_TDC_STAT_STATE_IDLE))
     {
         return false;
     }
 
     // Disable the counter.
     HWREG(ui32Base + AUX_TDC_O_TRIGCNTCFG) = 0;
 
     // Counter successfully disabled.
     return true;
 }

§ AUXTDCCounterEnable()

static bool AUXTDCCounterEnable ( uint32_t ui32Base )

inlinestatic

Enables the counter if possible.

This function can be used to enable the AUX TDC stop/compare event counter. The counter can be used to measure multiple periods of a clock signal. For each stop/compare event the counter will be decremented by one and the measurement will continue running until the value of the counter reaches 0. The current value of the counter can be read using AUXTDCCounterGet(). The reset value of the counter can be set using AUXTDCCounterSet().

Parameters

ui32Base is base address of the AUX TDC.

Returns: Returns true if the counter was successfully enabled. If the AUX TDC is not in Idle mode, the counter can not be enabled, and the return value will be false.

See also: AUXTDCCounterGet(), AUXTDCCounterSet()

 {
     // Check the arguments.
     ASSERT(AUXTDCBaseValid(ui32Base));
 
     // Check if the AUX TDC is in idle mode. If not in Idle mode, the counter
     // will not be enabled.
     if(!((HWREG(ui32Base + AUX_TDC_O_STAT) & AUX_TDC_STAT_STATE_M) ==
             AUX_TDC_STAT_STATE_IDLE))
     {
         return false;
     }
 
     // Enable the counter.
     HWREG(ui32Base + AUX_TDC_O_TRIGCNTCFG) = AUX_TDC_TRIGCNTCFG_EN;
 
     // Counter successfully enabled.
     return true;
 }

§ AUXTDCCounterGet()

static uint32_t AUXTDCCounterGet ( uint32_t ui32Base )

inlinestatic

Get the current number of counter compare/stop event to ignore before taking a measurement.

This function returns the current value of compare/stop events before a measurement is registered. This value is decremented by one for each registered compare/stop event and will always be less than or equal the reset value of the counter set using AUXTDCCounterSet().

Parameters

ui32Base is base address of the AUX TDC.

Returns: Returns the current value of compare/stop events ignored before a measurement is performed.

See also: AUXTDCCounterEnable().

 {
     // Check the arguments.
     ASSERT(AUXTDCBaseValid(ui32Base));
 
     // Return the current counter value.
     return (HWREG(ui32Base + AUX_TDC_O_TRIGCNT));
 }

§ AUXTDCCounterSet()

static bool AUXTDCCounterSet	(	uint32_t	ui32Base,
		uint32_t	ui32Events
	)

inlinestatic

Set the reset number of counter compare/stop event to ignore before taking a measurement.

This function loads the reset value of the counter with the specified number of events to ignore. A reset in this context means the counter has been disabled and then enabled.

Parameters

ui32Base	is base address of the AUX TDC.
ui32Events	is the number of compare/stop events to load into the counter.

Returns: Returns true if the counter was successfully updated. If the AUX TDC is not in Idle mode, the counter can not be updated, and the return value will be false.

See also: AUXTDCCounterEnable()

 {
     // Check the arguments.
     ASSERT(AUXTDCBaseValid(ui32Base));
 
     // Check if the AUX TDC is in idle mode. If not in idle mode, the counter
     // will not be disabled.
     if(!((HWREG(ui32Base + AUX_TDC_O_STAT) & AUX_TDC_STAT_STATE_M) ==
             AUX_TDC_STAT_STATE_IDLE))
     {
         return false;
     }
 
     // Update the reset counter value.
     HWREG(ui32Base + AUX_TDC_O_TRIGCNTLOAD) = ui32Events;
 
     // Counter successfully updated.
     return true;
 }

§ AUXTDCEnable()

static void AUXTDCEnable	(	uint32_t	ui32Base,
		uint32_t	ui32RunMode
	)

inlinestatic

Enable the AUX TDC for a measurement.

This function is used for arming the AUX TDC to begin a measurement as soon as the start condition is met. There are two run modes:

AUX_TDC_RUNSYNC will wait for a falling event of the start pulse before starting measurement on next rising edge of start. This guarantees an edge triggered start and is recommended for frequency measurements. If the first falling edge is close to the start command it may be missed, but the TDC shall catch later falling edges and in any case guarantee a measurement start synchronous to the rising edge of the start event.
The AUX_TDC_RUN is asynchronous start and asynchronous stop mode. Using this a TDC measurement may start immediately if start is high and hence it may not give precise edge to edge measurements. This mode is only recommended when start pulse is guaranteed to arrive at least 7 clock periods after command.

Note: The AUX TDC should be configured and in Idle mode before calling this function.

Parameters

ui32Base	is the base address of the AUX TDC.
ui32RunMode	is the run mode for the AUX TDC. AUX_TDC_RUNSYNC : Synchronous run mode. AUX_TDC_RUN : Asynchronous run mode.

Returns: None

 {
     // Check the arguments.
     ASSERT(AUXTDCBaseValid(ui32Base));
     ASSERT((ui32RunMode == AUX_TDC_RUN) ||
            (ui32RunMode == AUX_TDC_RUNSYNC));
 
     // Enable the AUX TDC.
     HWREG(ui32Base + AUX_TDC_O_CTL) = ui32RunMode;
 }

§ AUXTDCIdle()

static bool AUXTDCIdle ( uint32_t ui32Base )

inlinestatic

Check if the AUX TDC is in idle mode.

This function can be used to check whether the AUX TDC internal state machine is in idle mode. This is required before setting the polarity of the start and stop event.

Parameters

ui32Base is the base address of the AUX TDC.

Returns: Returns true if state machine is in idle and returns false if the state machine is in any other state.

 {
     // Check the arguments.
     ASSERT(AUXTDCBaseValid(ui32Base));
 
     // Check if the AUX TDC is in the Idle state.
     return (((HWREG(ui32Base + AUX_TDC_O_STAT) & AUX_TDC_STAT_STATE_M) ==
              AUX_TDC_STAT_STATE_IDLE) ? true : false);
 }

§ AUXTDCIdleForce()

static void AUXTDCIdleForce ( uint32_t ui32Base )

inlinestatic

Force the AUX TDC back to Idle mode.

This function will force the AUX TDC in Idle mode. The internal state machine will not go directly to Idle mode, so it is left to the programmer to ensure that the state machine is in Idle mode before doing any new configuration. This can be checked using AUXTDCIdle().

Parameters

ui32Base is the base address of the AUX TDC.

Returns: None

See also: AUXTDCIdle()

 {
     // Check the arguments
     ASSERT(AUXTDCBaseValid(ui32Base));
 
     // Abort operation of AUX TDC and force into Idle mode.
     HWREG(ui32Base + AUX_TDC_O_CTL) = AUX_TDC_CTL_CMD_ABORT;
 }

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§ AUXTDCLimitGet()

static uint32_t AUXTDCLimitGet ( uint32_t ui32Base )

inlinestatic

Get the saturation limit of the measurement.

This function is used to retrieve the current saturation for the accumulator register.

Parameters

ui32Base is base address of the AUX TDC.

Returns

Returns the saturation limit.

See also: AUXTDCLimitSet()

 {
     // Check the arguments.
     ASSERT(AUXTDCBaseValid(ui32Base));
 
     // Return the saturation limit.
     return (HWREG(ui32Base + AUX_TDC_O_SATCFG));
 }

§ AUXTDCLimitSet()

static void AUXTDCLimitSet	(	uint32_t	ui32Base,
		uint32_t	ui32Limit
	)

inlinestatic

Set the saturation limit of the measurement.

This function is used to set a saturation limit for the event accumulation register. The saturation limit is defined as a bit width of the accumulation register and therefore increases in power of 2.

Parameters

ui32Base	is base address of the AUX TDC.
ui32Limit	is the saturation limit. AUXTDC_SAT_4096 AUXTDC_SAT_8192 AUXTDC_SAT_16384 AUXTDC_SAT_32768 AUXTDC_SAT_65536 AUXTDC_SAT_131072 AUXTDC_SAT_262144 AUXTDC_SAT_524288 AUXTDC_SAT_1048576 AUXTDC_SAT_2097152 AUXTDC_SAT_4194304 AUXTDC_SAT_8388608 AUXTDC_SAT_16777216 (default)

Returns: None

Note: The actual value of the accumulation register might increase slightly beyond the saturation value before the saturation takes effect.

See also: AUXTDCLimitGet()

 {
     // Check the arguments.
     ASSERT(AUXTDCBaseValid(ui32Base));
     ASSERT(ui32Limit < AUXTDC_NUM_SAT_VALS);
 
     // Set the saturation limit.
     HWREG(ui32Base + AUX_TDC_O_SATCFG) = ui32Limit;
 }

§ AUXTDCMeasurementDone()

uint32_t AUXTDCMeasurementDone ( uint32_t ui32Base )

Check if the AUX TDC is done measuring.

This function can be used to check whether the AUX TDC has finished a measurement. The AUX TDC may have completed a measurement for two reasons. Either it finish successfully AUX_TDC_DONE or it failed due to a timeout AUX_TDC_TIMEOUT. If the AUX TDC is still measuring it this function will return AUX_TDC_BUSY.

Parameters

ui32Base is the base address of the AUX TDC.

Returns

Returns the current status of a measurement:

AUX_TDC_DONE : An AUX TDC measurement finished successfully.
AUX_TDC_TIMEOUT : An AUX TDC measurement failed due to timeout.
AUX_TDC_BUSY : An AUX TDC measurement is being performed.

Referenced by AUXTDCIdleForce().

 {
     uint32_t ui32Reg;
     uint32_t ui32Status;
 
     // Check the arguments.
     ASSERT(AUXTDCBaseValid(ui32Base));
 
     // Check if the AUX TDC is done measuring.
     ui32Reg = HWREG(ui32Base + AUX_TDC_O_STAT);
     if(ui32Reg & AUX_TDC_STAT_DONE)
     {
         ui32Status = AUX_TDC_DONE;
     }
     else if(ui32Reg & AUX_TDC_STAT_SAT)
     {
         ui32Status = AUX_TDC_TIMEOUT;
     }
     else
     {
         ui32Status = AUX_TDC_BUSY;
     }
 
     // Return the status.
     return (ui32Status);
 }

§ AUXTDCMeasurementGet()

static uint32_t AUXTDCMeasurementGet ( uint32_t ui32Base )

inlinestatic

Get the value of the latest measurement.

This function is used for retrieving the value of the latest measurement performed by the AUX TDC.

Parameters

ui32Base is the base address of the AUX TDC.

Returns: Returns the result of the latest measurement.

 {
     // Check the arguments.
     ASSERT(AUXTDCBaseValid(ui32Base));
 
     // Return the measurement.
     return (HWREG(ui32Base + AUX_TDC_O_RESULT));
 }

§ AUXTDCStatusGet()

static uint32_t AUXTDCStatusGet ( uint32_t ui32Base )

inlinestatic

Get the status of the AUX TDC internal state machine.

This function will return the current state of the AUX TDC internal state machine.

Parameters

ui32Base is base address of the AUX TDC

Returns

Returns the current state of the state machine. Possible states for the state machine are:

 {
     // Check the arguments.
     ASSERT(AUXTDCBaseValid(ui32Base));
 
     // Return the status value for the correct ADI Slave.
     return((HWREG(ui32Base + AUX_TDC_O_STAT) & AUX_TDC_STAT_STATE_M) >>
            AUX_TDC_STAT_STATE_S);
 }

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Macro Definition Documentation

§ AUX_TDC_ABORT

#define AUX_TDC_ABORT 0x00000003

§ AUX_TDC_BUSY

#define AUX_TDC_BUSY 0x00000001

Referenced by AUXTDCMeasurementDone().

§ AUX_TDC_DONE

#define AUX_TDC_DONE 0x00000004

Referenced by AUXTDCMeasurementDone().

§ AUX_TDC_RUN

#define AUX_TDC_RUN 0x00000002

Referenced by AUXTDCEnable().

§ AUX_TDC_RUNSYNC

#define AUX_TDC_RUNSYNC 0x00000001

Referenced by AUXTDCEnable().

§ AUX_TDC_TIMEOUT

#define AUX_TDC_TIMEOUT 0x00000002

Referenced by AUXTDCMeasurementDone().

§ AUXTDC_CLRCNT

#define AUXTDC_CLRCNT (AUX_TDC_STAT_STATE_CLR_CNT)

§ AUXTDC_FORCE_STOP

#define AUXTDC_FORCE_STOP (AUX_TDC_STAT_STATE_FORCE_STOP)

§ AUXTDC_GETRESULTS

#define AUXTDC_GETRESULTS (AUX_TDC_STAT_STATE_GET_RESULT)

§ AUXTDC_IDLE

#define AUXTDC_IDLE (AUX_TDC_STAT_STATE_IDLE)

§ AUXTDC_NUM_SAT_VALS

#define AUXTDC_NUM_SAT_VALS 16

Referenced by AUXTDCLimitSet().

§ AUXTDC_POR

#define AUXTDC_POR (AUX_TDC_STAT_STATE_POR)

§ AUXTDC_SAT_1048576

#define AUXTDC_SAT_1048576 (AUX_TDC_SATCFG_LIMIT_R20)

§ AUXTDC_SAT_131072

#define AUXTDC_SAT_131072 (AUX_TDC_SATCFG_LIMIT_R17)

§ AUXTDC_SAT_16384

#define AUXTDC_SAT_16384 (AUX_TDC_SATCFG_LIMIT_R14)

§ AUXTDC_SAT_16777216

#define AUXTDC_SAT_16777216 (AUX_TDC_SATCFG_LIMIT_R24)

§ AUXTDC_SAT_2097152

#define AUXTDC_SAT_2097152 (AUX_TDC_SATCFG_LIMIT_R21)

§ AUXTDC_SAT_262144

#define AUXTDC_SAT_262144 (AUX_TDC_SATCFG_LIMIT_R18)

§ AUXTDC_SAT_32768

#define AUXTDC_SAT_32768 (AUX_TDC_SATCFG_LIMIT_R15)

§ AUXTDC_SAT_4096

#define AUXTDC_SAT_4096 (AUX_TDC_SATCFG_LIMIT_R12)

§ AUXTDC_SAT_4194304

#define AUXTDC_SAT_4194304 (AUX_TDC_SATCFG_LIMIT_R22)

§ AUXTDC_SAT_524288

#define AUXTDC_SAT_524288 (AUX_TDC_SATCFG_LIMIT_R19)

§ AUXTDC_SAT_65536

#define AUXTDC_SAT_65536 (AUX_TDC_SATCFG_LIMIT_R16)

§ AUXTDC_SAT_8192

#define AUXTDC_SAT_8192 (AUX_TDC_SATCFG_LIMIT_R13)

§ AUXTDC_SAT_8388608

#define AUXTDC_SAT_8388608 (AUX_TDC_SATCFG_LIMIT_R23)

§ AUXTDC_START_ACLK_REF

#define AUXTDC_START_ACLK_REF (AUX_TDC_TRIGSRC_START_SRC_ACLK_REF)

§ AUXTDC_START_ADC_DONE

#define AUXTDC_START_ADC_DONE (AUX_TDC_TRIGSRC_START_SRC_AUX_ADC_DONE)

§ AUXTDC_START_ADC_FIFO_ALMOST_FULL

#define AUXTDC_START_ADC_FIFO_ALMOST_FULL (AUX_TDC_TRIGSRC_START_SRC_AUX_ADC_FIFO_ALMOST_FULL)

§ AUXTDC_START_ADC_FIFO_NOT_EMPTY

#define AUXTDC_START_ADC_FIFO_NOT_EMPTY (AUX_TDC_TRIGSRC_START_SRC_AUX_ADC_FIFO_NOT_EMPTY)

§ AUXTDC_START_ADC_IRQ

#define AUXTDC_START_ADC_IRQ (AUX_TDC_TRIGSRC_START_SRC_AUX_ADC_IRQ)

§ AUXTDC_START_AON_BATMON_BAT_UPD

#define AUXTDC_START_AON_BATMON_BAT_UPD (AUX_TDC_TRIGSRC_START_SRC_AON_BATMON_BAT_UPD)

§ AUXTDC_START_AON_BATMON_TEMP_UPD

#define AUXTDC_START_AON_BATMON_TEMP_UPD (AUX_TDC_TRIGSRC_START_SRC_AON_BATMON_TEMP_UPD)

§ AUXTDC_START_AON_RTC_4KHZ

#define AUXTDC_START_AON_RTC_4KHZ (AUX_TDC_TRIGSRC_START_SRC_AON_RTC_4KHZ)

§ AUXTDC_START_AON_RTC_CH2

#define AUXTDC_START_AON_RTC_CH2 (AUX_TDC_TRIGSRC_START_SRC_AON_RTC_CH2)

§ AUXTDC_START_AON_RTC_CH2_DLY

#define AUXTDC_START_AON_RTC_CH2_DLY (AUX_TDC_TRIGSRC_START_SRC_AON_RTC_CH2_DLY)

§ AUXTDC_START_AUX_COMPA

#define AUXTDC_START_AUX_COMPA (AUX_TDC_TRIGSRC_START_SRC_AUX_COMPA)

§ AUXTDC_START_AUX_COMPB

#define AUXTDC_START_AUX_COMPB (AUX_TDC_TRIGSRC_START_SRC_AUX_COMPB)

§ AUXTDC_START_AUXIO0

#define AUXTDC_START_AUXIO0 (AUX_TDC_TRIGSRC_START_SRC_AUXIO0)

§ AUXTDC_START_AUXIO1

#define AUXTDC_START_AUXIO1 (AUX_TDC_TRIGSRC_START_SRC_AUXIO1)

§ AUXTDC_START_AUXIO10

#define AUXTDC_START_AUXIO10 (AUX_TDC_TRIGSRC_START_SRC_AUXIO10)

§ AUXTDC_START_AUXIO11

#define AUXTDC_START_AUXIO11 (AUX_TDC_TRIGSRC_START_SRC_AUXIO11)

§ AUXTDC_START_AUXIO12

#define AUXTDC_START_AUXIO12 (AUX_TDC_TRIGSRC_START_SRC_AUXIO12)

§ AUXTDC_START_AUXIO13

#define AUXTDC_START_AUXIO13 (AUX_TDC_TRIGSRC_START_SRC_AUXIO13)

§ AUXTDC_START_AUXIO14

#define AUXTDC_START_AUXIO14 (AUX_TDC_TRIGSRC_START_SRC_AUXIO14)

§ AUXTDC_START_AUXIO15

#define AUXTDC_START_AUXIO15 (AUX_TDC_TRIGSRC_START_SRC_AUXIO15)

§ AUXTDC_START_AUXIO16

#define AUXTDC_START_AUXIO16 (AUX_TDC_TRIGSRC_START_SRC_AUXIO16)

§ AUXTDC_START_AUXIO17

#define AUXTDC_START_AUXIO17 (AUX_TDC_TRIGSRC_START_SRC_AUXIO17)

§ AUXTDC_START_AUXIO18

#define AUXTDC_START_AUXIO18 (AUX_TDC_TRIGSRC_START_SRC_AUXIO18)

§ AUXTDC_START_AUXIO19

#define AUXTDC_START_AUXIO19 (AUX_TDC_TRIGSRC_START_SRC_AUXIO19)

§ AUXTDC_START_AUXIO2

#define AUXTDC_START_AUXIO2 (AUX_TDC_TRIGSRC_START_SRC_AUXIO2)

§ AUXTDC_START_AUXIO20

#define AUXTDC_START_AUXIO20 (AUX_TDC_TRIGSRC_START_SRC_AUXIO20)

§ AUXTDC_START_AUXIO21

#define AUXTDC_START_AUXIO21 (AUX_TDC_TRIGSRC_START_SRC_AUXIO21)

§ AUXTDC_START_AUXIO22

#define AUXTDC_START_AUXIO22 (AUX_TDC_TRIGSRC_START_SRC_AUXIO22)

§ AUXTDC_START_AUXIO23

#define AUXTDC_START_AUXIO23 (AUX_TDC_TRIGSRC_START_SRC_AUXIO23)

§ AUXTDC_START_AUXIO24

#define AUXTDC_START_AUXIO24 (AUX_TDC_TRIGSRC_START_SRC_AUXIO24)

§ AUXTDC_START_AUXIO25

#define AUXTDC_START_AUXIO25 (AUX_TDC_TRIGSRC_START_SRC_AUXIO25)

§ AUXTDC_START_AUXIO26

#define AUXTDC_START_AUXIO26 (AUX_TDC_TRIGSRC_START_SRC_AUXIO26)

§ AUXTDC_START_AUXIO27

#define AUXTDC_START_AUXIO27 (AUX_TDC_TRIGSRC_START_SRC_AUXIO27)

§ AUXTDC_START_AUXIO28

#define AUXTDC_START_AUXIO28 (AUX_TDC_TRIGSRC_START_SRC_AUXIO28)

§ AUXTDC_START_AUXIO29

#define AUXTDC_START_AUXIO29 (AUX_TDC_TRIGSRC_START_SRC_AUXIO29)

§ AUXTDC_START_AUXIO3

#define AUXTDC_START_AUXIO3 (AUX_TDC_TRIGSRC_START_SRC_AUXIO3)

§ AUXTDC_START_AUXIO30

#define AUXTDC_START_AUXIO30 (AUX_TDC_TRIGSRC_START_SRC_AUXIO30)

§ AUXTDC_START_AUXIO31

#define AUXTDC_START_AUXIO31 (AUX_TDC_TRIGSRC_START_SRC_AUXIO31)

§ AUXTDC_START_AUXIO4

#define AUXTDC_START_AUXIO4 (AUX_TDC_TRIGSRC_START_SRC_AUXIO4)

§ AUXTDC_START_AUXIO5

#define AUXTDC_START_AUXIO5 (AUX_TDC_TRIGSRC_START_SRC_AUXIO5)

§ AUXTDC_START_AUXIO6

#define AUXTDC_START_AUXIO6 (AUX_TDC_TRIGSRC_START_SRC_AUXIO6)

§ AUXTDC_START_AUXIO7

#define AUXTDC_START_AUXIO7 (AUX_TDC_TRIGSRC_START_SRC_AUXIO7)

§ AUXTDC_START_AUXIO8

#define AUXTDC_START_AUXIO8 (AUX_TDC_TRIGSRC_START_SRC_AUXIO8)

§ AUXTDC_START_AUXIO9

#define AUXTDC_START_AUXIO9 (AUX_TDC_TRIGSRC_START_SRC_AUXIO9)

§ AUXTDC_START_FALL

#define AUXTDC_START_FALL (AUX_TDC_STAT_STATE_START_FALL)

§ AUXTDC_START_ISRC_RESET

#define AUXTDC_START_ISRC_RESET (AUX_TDC_TRIGSRC_START_SRC_AUX_ISRC_RESET_N)

§ AUXTDC_START_MANUAL_EV

#define AUXTDC_START_MANUAL_EV (AUX_TDC_TRIGSRC_START_SRC_MANUAL_EV)

§ AUXTDC_START_MCU_ACTIVE

#define AUXTDC_START_MCU_ACTIVE (AUX_TDC_TRIGSRC_START_SRC_MCU_ACTIVE)

§ AUXTDC_START_MCU_EV

#define AUXTDC_START_MCU_EV (AUX_TDC_TRIGSRC_START_SRC_MCU_EV)

§ AUXTDC_START_NO_EVENT

#define AUXTDC_START_NO_EVENT (AUX_TDC_TRIGSRC_START_SRC_NO_EVENT)

§ AUXTDC_START_OBSMUX0

#define AUXTDC_START_OBSMUX0 (AUX_TDC_TRIGSRC_START_SRC_MCU_OBSMUX0)

§ AUXTDC_START_OBSMUX1

#define AUXTDC_START_OBSMUX1 (AUX_TDC_TRIGSRC_START_SRC_MCU_OBSMUX1)

§ AUXTDC_START_PWR_DWN

#define AUXTDC_START_PWR_DWN (AUX_TDC_TRIGSRC_START_SRC_PWR_DWN)

§ AUXTDC_START_SCLK_LF

#define AUXTDC_START_SCLK_LF (AUX_TDC_TRIGSRC_START_SRC_SCLK_LF)

§ AUXTDC_START_SMPH_AUTOTAKE_DONE

#define AUXTDC_START_SMPH_AUTOTAKE_DONE (AUX_TDC_TRIGSRC_START_SRC_AUX_SMPH_AUTOTAKE_DONE)

§ AUXTDC_START_TDC_DONE

#define AUXTDC_START_TDC_DONE (AUX_TDC_TRIGSRC_START_SRC_AUX_TDC_DONE)

§ AUXTDC_START_TDC_PRE

#define AUXTDC_START_TDC_PRE (AUX_TDC_TRIGSRC_START_SRC_AUX_TDC_PRE)

§ AUXTDC_START_TIMER0_EV

#define AUXTDC_START_TIMER0_EV (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER0_EV)

§ AUXTDC_START_TIMER1_EV

#define AUXTDC_START_TIMER1_EV (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER1_EV)

§ AUXTDC_START_TIMER2_EV0

#define AUXTDC_START_TIMER2_EV0 (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER2_EV0)

§ AUXTDC_START_TIMER2_EV1

#define AUXTDC_START_TIMER2_EV1 (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER2_EV1)

§ AUXTDC_START_TIMER2_EV2

#define AUXTDC_START_TIMER2_EV2 (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER2_EV2)

§ AUXTDC_START_TIMER2_EV3

#define AUXTDC_START_TIMER2_EV3 (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER2_EV3)

§ AUXTDC_START_TIMER2_PULSE

#define AUXTDC_START_TIMER2_PULSE (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER2_PULSE)

§ AUXTDC_START_VDDR_RECHARGE

#define AUXTDC_START_VDDR_RECHARGE (AUX_TDC_TRIGSRC_START_SRC_VDDR_RECHARGE)

§ AUXTDC_STARTPOL_FALL

#define AUXTDC_STARTPOL_FALL (AUX_TDC_TRIGSRC_START_POL_LOW)

§ AUXTDC_STARTPOL_RIS

#define AUXTDC_STARTPOL_RIS (AUX_TDC_TRIGSRC_START_POL_HIGH)

§ AUXTDC_STOP_ACLK_REF

#define AUXTDC_STOP_ACLK_REF (AUX_TDC_TRIGSRC_STOP_SRC_ACLK_REF)

§ AUXTDC_STOP_ADC_DONE

#define AUXTDC_STOP_ADC_DONE (AUX_TDC_TRIGSRC_STOP_SRC_AUX_ADC_DONE)

§ AUXTDC_STOP_ADC_FIFO_ALMOST_FULL

#define AUXTDC_STOP_ADC_FIFO_ALMOST_FULL (AUX_TDC_TRIGSRC_STOP_SRC_AUX_ADC_FIFO_ALMOST_FULL)

§ AUXTDC_STOP_ADC_FIFO_NOT_EMPTY

#define AUXTDC_STOP_ADC_FIFO_NOT_EMPTY (AUX_TDC_TRIGSRC_STOP_SRC_AUX_ADC_FIFO_NOT_EMPTY)

§ AUXTDC_STOP_ADC_IRQ

#define AUXTDC_STOP_ADC_IRQ (AUX_TDC_TRIGSRC_STOP_SRC_AUX_ADC_IRQ)

§ AUXTDC_STOP_AON_BATMON_BAT_UPD

#define AUXTDC_STOP_AON_BATMON_BAT_UPD (AUX_TDC_TRIGSRC_STOP_SRC_AON_BATMON_BAT_UPD)

§ AUXTDC_STOP_AON_BATMON_TEMP_UPD

#define AUXTDC_STOP_AON_BATMON_TEMP_UPD (AUX_TDC_TRIGSRC_STOP_SRC_AON_BATMON_TEMP_UPD)

§ AUXTDC_STOP_AON_RTC_4KHZ

#define AUXTDC_STOP_AON_RTC_4KHZ (AUX_TDC_TRIGSRC_STOP_SRC_AON_RTC_4KHZ)

§ AUXTDC_STOP_AON_RTC_CH2

#define AUXTDC_STOP_AON_RTC_CH2 (AUX_TDC_TRIGSRC_STOP_SRC_AON_RTC_CH2)

§ AUXTDC_STOP_AON_RTC_CH2_DLY

#define AUXTDC_STOP_AON_RTC_CH2_DLY (AUX_TDC_TRIGSRC_STOP_SRC_AON_RTC_CH2_DLY)

§ AUXTDC_STOP_AUX_COMPA

#define AUXTDC_STOP_AUX_COMPA (AUX_TDC_TRIGSRC_STOP_SRC_AUX_COMPA)

§ AUXTDC_STOP_AUX_COMPB

#define AUXTDC_STOP_AUX_COMPB (AUX_TDC_TRIGSRC_STOP_SRC_AUX_COMPB)

§ AUXTDC_STOP_AUXIO0

#define AUXTDC_STOP_AUXIO0 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO0)

§ AUXTDC_STOP_AUXIO1

#define AUXTDC_STOP_AUXIO1 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO1)

§ AUXTDC_STOP_AUXIO10

#define AUXTDC_STOP_AUXIO10 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO10)

§ AUXTDC_STOP_AUXIO11

#define AUXTDC_STOP_AUXIO11 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO11)

§ AUXTDC_STOP_AUXIO12

#define AUXTDC_STOP_AUXIO12 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO12)

§ AUXTDC_STOP_AUXIO13

#define AUXTDC_STOP_AUXIO13 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO13)

§ AUXTDC_STOP_AUXIO14

#define AUXTDC_STOP_AUXIO14 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO14)

§ AUXTDC_STOP_AUXIO15

#define AUXTDC_STOP_AUXIO15 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO15)

§ AUXTDC_STOP_AUXIO16

#define AUXTDC_STOP_AUXIO16 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO16)

§ AUXTDC_STOP_AUXIO17

#define AUXTDC_STOP_AUXIO17 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO17)

§ AUXTDC_STOP_AUXIO18

#define AUXTDC_STOP_AUXIO18 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO18)

§ AUXTDC_STOP_AUXIO19

#define AUXTDC_STOP_AUXIO19 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO19)

§ AUXTDC_STOP_AUXIO2

#define AUXTDC_STOP_AUXIO2 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO2)

§ AUXTDC_STOP_AUXIO20

#define AUXTDC_STOP_AUXIO20 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO20)

§ AUXTDC_STOP_AUXIO21

#define AUXTDC_STOP_AUXIO21 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO21)

§ AUXTDC_STOP_AUXIO22

#define AUXTDC_STOP_AUXIO22 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO22)

§ AUXTDC_STOP_AUXIO23

#define AUXTDC_STOP_AUXIO23 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO23)

§ AUXTDC_STOP_AUXIO24

#define AUXTDC_STOP_AUXIO24 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO24)

§ AUXTDC_STOP_AUXIO25

#define AUXTDC_STOP_AUXIO25 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO25)

§ AUXTDC_STOP_AUXIO26

#define AUXTDC_STOP_AUXIO26 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO26)

§ AUXTDC_STOP_AUXIO27

#define AUXTDC_STOP_AUXIO27 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO27)

§ AUXTDC_STOP_AUXIO28

#define AUXTDC_STOP_AUXIO28 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO28)

§ AUXTDC_STOP_AUXIO29

#define AUXTDC_STOP_AUXIO29 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO29)

§ AUXTDC_STOP_AUXIO3

#define AUXTDC_STOP_AUXIO3 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO3)

§ AUXTDC_STOP_AUXIO30

#define AUXTDC_STOP_AUXIO30 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO30)

§ AUXTDC_STOP_AUXIO31

#define AUXTDC_STOP_AUXIO31 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO31)

§ AUXTDC_STOP_AUXIO4

#define AUXTDC_STOP_AUXIO4 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO4)

§ AUXTDC_STOP_AUXIO5

#define AUXTDC_STOP_AUXIO5 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO5)

§ AUXTDC_STOP_AUXIO6

#define AUXTDC_STOP_AUXIO6 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO6)

§ AUXTDC_STOP_AUXIO7

#define AUXTDC_STOP_AUXIO7 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO7)

§ AUXTDC_STOP_AUXIO8

#define AUXTDC_STOP_AUXIO8 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO8)

§ AUXTDC_STOP_AUXIO9

#define AUXTDC_STOP_AUXIO9 (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO9)

§ AUXTDC_STOP_ISRC_RESET

#define AUXTDC_STOP_ISRC_RESET (AUX_TDC_TRIGSRC_STOP_SRC_AUX_ISRC_RESET_N)

§ AUXTDC_STOP_MANUAL_EV

#define AUXTDC_STOP_MANUAL_EV (AUX_TDC_TRIGSRC_STOP_SRC_MANUAL_EV)

§ AUXTDC_STOP_MCU_ACTIVE

#define AUXTDC_STOP_MCU_ACTIVE (AUX_TDC_TRIGSRC_STOP_SRC_MCU_ACTIVE)

§ AUXTDC_STOP_MCU_EV

#define AUXTDC_STOP_MCU_EV (AUX_TDC_TRIGSRC_STOP_SRC_MCU_EV)

§ AUXTDC_STOP_NO_EVENT

#define AUXTDC_STOP_NO_EVENT (AUX_TDC_TRIGSRC_STOP_SRC_NO_EVENT)

§ AUXTDC_STOP_OBSMUX0

#define AUXTDC_STOP_OBSMUX0 (AUX_TDC_TRIGSRC_STOP_SRC_MCU_OBSMUX0)

§ AUXTDC_STOP_OBSMUX1

#define AUXTDC_STOP_OBSMUX1 (AUX_TDC_TRIGSRC_STOP_SRC_MCU_OBSMUX1)

§ AUXTDC_STOP_PWR_DWN

#define AUXTDC_STOP_PWR_DWN (AUX_TDC_TRIGSRC_STOP_SRC_PWR_DWN)

§ AUXTDC_STOP_SCLK_LF

#define AUXTDC_STOP_SCLK_LF (AUX_TDC_TRIGSRC_STOP_SRC_SCLK_LF)

§ AUXTDC_STOP_SMPH_AUTOTAKE_DONE

#define AUXTDC_STOP_SMPH_AUTOTAKE_DONE (AUX_TDC_TRIGSRC_STOP_SRC_AUX_SMPH_AUTOTAKE_DONE)

§ AUXTDC_STOP_TDC_DONE

#define AUXTDC_STOP_TDC_DONE (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TDC_DONE)

§ AUXTDC_STOP_TDC_PRE

#define AUXTDC_STOP_TDC_PRE (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TDC_PRE)

§ AUXTDC_STOP_TIMER0_EV

#define AUXTDC_STOP_TIMER0_EV (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER0_EV)

§ AUXTDC_STOP_TIMER1_EV

#define AUXTDC_STOP_TIMER1_EV (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER1_EV)

§ AUXTDC_STOP_TIMER2_EV0

#define AUXTDC_STOP_TIMER2_EV0 (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER2_EV0)

§ AUXTDC_STOP_TIMER2_EV1

#define AUXTDC_STOP_TIMER2_EV1 (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER2_EV1)

§ AUXTDC_STOP_TIMER2_EV2

#define AUXTDC_STOP_TIMER2_EV2 (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER2_EV2)

§ AUXTDC_STOP_TIMER2_EV3

#define AUXTDC_STOP_TIMER2_EV3 (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER2_EV3)

§ AUXTDC_STOP_TIMER2_PULSE

#define AUXTDC_STOP_TIMER2_PULSE (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER2_PULSE)

§ AUXTDC_STOP_VDDR_RECHARGE

#define AUXTDC_STOP_VDDR_RECHARGE (AUX_TDC_TRIGSRC_STOP_SRC_VDDR_RECHARGE)

§ AUXTDC_STOPPOL_FALL

#define AUXTDC_STOPPOL_FALL (AUX_TDC_TRIGSRC_STOP_POL_LOW)

§ AUXTDC_STOPPOL_RIS

#define AUXTDC_STOPPOL_RIS (AUX_TDC_TRIGSRC_STOP_POL_HIGH)

§ AUXTDC_WAIT_CLRCNT_DONE

#define AUXTDC_WAIT_CLRCNT_DONE (AUX_TDC_STAT_STATE_WAIT_CLR_CNT_DONE)

§ AUXTDC_WAIT_START

#define AUXTDC_WAIT_START (AUX_TDC_STAT_STATE_WAIT_START)

§ AUXTDC_WAIT_START_CNTEN

#define AUXTDC_WAIT_START_CNTEN (AUX_TDC_STAT_STATE_WAIT_START_STOP_CNT_EN)

§ AUXTDC_WAIT_STOP

#define AUXTDC_WAIT_STOP (AUX_TDC_STAT_STATE_WAIT_STOP)

§ AUXTDC_WAIT_STOP_CNTDOWN

#define AUXTDC_WAIT_STOP_CNTDOWN (AUX_TDC_STAT_STATE_WAIT_STOP_CNTDWN)

Functions

Detailed Description

Function Documentation

§ AUXTDCConfigSet()

§ AUXTDCCounterDisable()

§ AUXTDCCounterEnable()

§ AUXTDCCounterGet()

§ AUXTDCCounterSet()

§ AUXTDCEnable()

§ AUXTDCIdle()

§ AUXTDCIdleForce()

§ AUXTDCLimitGet()

§ AUXTDCLimitSet()

§ AUXTDCMeasurementDone()

§ AUXTDCMeasurementGet()

§ AUXTDCStatusGet()

Macro Definition Documentation

§ AUX_TDC_ABORT

§ AUX_TDC_BUSY

§ AUX_TDC_DONE

§ AUX_TDC_RUN

§ AUX_TDC_RUNSYNC

§ AUX_TDC_TIMEOUT

§ AUXTDC_CLRCNT

§ AUXTDC_FORCE_STOP

§ AUXTDC_GETRESULTS

§ AUXTDC_IDLE

§ AUXTDC_NUM_SAT_VALS

§ AUXTDC_POR

§ AUXTDC_SAT_1048576

§ AUXTDC_SAT_131072

§ AUXTDC_SAT_16384

§ AUXTDC_SAT_16777216

§ AUXTDC_SAT_2097152

§ AUXTDC_SAT_262144

§ AUXTDC_SAT_32768

§ AUXTDC_SAT_4096

§ AUXTDC_SAT_4194304

§ AUXTDC_SAT_524288

§ AUXTDC_SAT_65536

§ AUXTDC_SAT_8192

§ AUXTDC_SAT_8388608

§ AUXTDC_START_ACLK_REF

§ AUXTDC_START_ADC_DONE

§ AUXTDC_START_ADC_FIFO_ALMOST_FULL

§ AUXTDC_START_ADC_FIFO_NOT_EMPTY

§ AUXTDC_START_ADC_IRQ

§ AUXTDC_START_AON_BATMON_BAT_UPD

§ AUXTDC_START_AON_BATMON_TEMP_UPD

§ AUXTDC_START_AON_RTC_4KHZ

§ AUXTDC_START_AON_RTC_CH2

§ AUXTDC_START_AON_RTC_CH2_DLY

§ AUXTDC_START_AUX_COMPA

§ AUXTDC_START_AUX_COMPB

§ AUXTDC_START_AUXIO0

§ AUXTDC_START_AUXIO1

§ AUXTDC_START_AUXIO10

§ AUXTDC_START_AUXIO11

§ AUXTDC_START_AUXIO12

§ AUXTDC_START_AUXIO13

§ AUXTDC_START_AUXIO14

§ AUXTDC_START_AUXIO15

§ AUXTDC_START_AUXIO16

§ AUXTDC_START_AUXIO17

§ AUXTDC_START_AUXIO18

§ AUXTDC_START_AUXIO19

§ AUXTDC_START_AUXIO2

§ AUXTDC_START_AUXIO20

§ AUXTDC_START_AUXIO21

§ AUXTDC_START_AUXIO22

§ AUXTDC_START_AUXIO23

§ AUXTDC_START_AUXIO24

§ AUXTDC_START_AUXIO25

§ AUXTDC_START_AUXIO26

§ AUXTDC_START_AUXIO27

§ AUXTDC_START_AUXIO28

§ AUXTDC_START_AUXIO29

§ AUXTDC_START_AUXIO3

§ AUXTDC_START_AUXIO30

§ AUXTDC_START_AUXIO31