CC26xx Driver Library
setup.c File Reference
#include "../inc/hw_types.h"
#include "../inc/hw_memmap.h"
#include "../inc/hw_adi.h"
#include "../inc/hw_adi_2_refsys.h"
#include "../inc/hw_adi_3_refsys.h"
#include "../inc/hw_adi_4_aux.h"
#include "../inc/hw_aon_ioc.h"
#include "../inc/hw_aon_pmctl.h"
#include "../inc/hw_aon_rtc.h"
#include "../inc/hw_ddi_0_osc.h"
#include "../inc/hw_ddi.h"
#include "../inc/hw_ccfg.h"
#include "../inc/hw_fcfg1.h"
#include "../inc/hw_flash.h"
#include "../inc/hw_prcm.h"
#include "../inc/hw_vims.h"
#include "aon_rtc.h"
#include "interrupt.h"
#include "aux_sysif.h"
#include "chipinfo.h"
#include "osc.h"
#include "setup.h"
#include "setup_rom.h"
#include "ccfgread.h"

Macros

#define ADI_4_AUX_O_LPMBIAS   0x0000000E
 
#define ADI_4_AUX_LPMBIAS_LPM_TRIM_IOUT_M   0x0000003F
 
#define ADI_4_AUX_LPMBIAS_LPM_TRIM_IOUT_S   0
 
#define ADI_4_AUX_COMP_LPM_BIAS_WIDTH_TRIM_M   0x00000038
 
#define ADI_4_AUX_COMP_LPM_BIAS_WIDTH_TRIM_S   3
 
#define CPU_DELAY_MICRO_SECONDS(x)   CPUdelay(((uint32_t)((( x ) * 48.0 ) / 5.0 )) - 1 )
 
#define SUBSECINC_31250_HZ   0x8637BD
 
#define SUBSECINC_32768_HZ   0x800000
 

Functions

static void TrimAfterColdReset (void)
 Trims to be applied when coming from PIN_RESET. More...
 
static void TrimAfterColdResetWakeupFromShutDown (uint32_t ui32Fcfg1Revision)
 Trims to be applied when coming from SHUTDOWN (also called when coming from PIN_RESET). More...
 
static void TrimAfterColdResetWakeupFromShutDownWakeupFromPowerDown (void)
 Trims to be applied when coming from POWER_DOWN (also called when coming from SHUTDOWN and PIN_RESET). More...
 
void SetupTrimDevice (void)
 Performs the necessary trim of the device which is not done in ROM boot code. More...
 

Macro Definition Documentation

§ ADI_4_AUX_COMP_LPM_BIAS_WIDTH_TRIM_M

#define ADI_4_AUX_COMP_LPM_BIAS_WIDTH_TRIM_M   0x00000038

§ ADI_4_AUX_COMP_LPM_BIAS_WIDTH_TRIM_S

#define ADI_4_AUX_COMP_LPM_BIAS_WIDTH_TRIM_S   3

§ ADI_4_AUX_LPMBIAS_LPM_TRIM_IOUT_M

#define ADI_4_AUX_LPMBIAS_LPM_TRIM_IOUT_M   0x0000003F

§ ADI_4_AUX_LPMBIAS_LPM_TRIM_IOUT_S

#define ADI_4_AUX_LPMBIAS_LPM_TRIM_IOUT_S   0

§ ADI_4_AUX_O_LPMBIAS

#define ADI_4_AUX_O_LPMBIAS   0x0000000E

§ CPU_DELAY_MICRO_SECONDS

#define CPU_DELAY_MICRO_SECONDS (   x)    CPUdelay(((uint32_t)((( x ) * 48.0 ) / 5.0 )) - 1 )

§ SUBSECINC_31250_HZ

#define SUBSECINC_31250_HZ   0x8637BD

Referenced by SetupTrimDevice().

§ SUBSECINC_32768_HZ

#define SUBSECINC_32768_HZ   0x800000

Function Documentation

§ TrimAfterColdReset()

static void TrimAfterColdReset ( void  )
static

Trims to be applied when coming from PIN_RESET.

Returns
None

Referenced by SetupTrimDevice().

385 {
386  // Currently no specific trim for Cold Reset
387 }

§ TrimAfterColdResetWakeupFromShutDown()

static void TrimAfterColdResetWakeupFromShutDown ( uint32_t  ui32Fcfg1Revision)
static

Trims to be applied when coming from SHUTDOWN (also called when coming from PIN_RESET).

Parameters
ui32Fcfg1Revision
Returns
None

Referenced by SetupTrimDevice().

281 {
282  uint32_t ccfg_ModeConfReg ;
283 
284  // Check in CCFG for alternative DCDC setting
285  if (( HWREG( CCFG_BASE + CCFG_O_SIZE_AND_DIS_FLAGS ) & CCFG_SIZE_AND_DIS_FLAGS_DIS_ALT_DCDC_SETTING ) == 0 ) {
286  // ADI_3_REFSYS:DCDCCTL5[3] (=DITHER_EN) = CCFG_MODE_CONF_1[19] (=ALT_DCDC_DITHER_EN)
287  // ADI_3_REFSYS:DCDCCTL5[2:0](=IPEAK ) = CCFG_MODE_CONF_1[18:16](=ALT_DCDC_IPEAK )
288  // Using a single 4-bit masked write since layout is equal for both source and destination
289  HWREGB( ADI3_BASE + ADI_O_MASK4B + ( ADI_3_REFSYS_O_DCDCCTL5 * 2 )) = ( 0xF0 |
290  ( HWREG( CCFG_BASE + CCFG_O_MODE_CONF_1 ) >> CCFG_MODE_CONF_1_ALT_DCDC_IPEAK_S ));
291  }
292 
293  // Force DCDC to use RCOSC before starting up XOSC.
294  // Clock loss detector does not use XOSC until SCLK_HF actually switches
295  // and thus DCDC is not protected from clock loss on XOSC in that time frame.
296  // The force must be released when the switch to XOSC has happened. This is done
297  // in OSCHfSourceSwitch().
298  HWREG(AUX_DDI0_OSC_BASE + DDI_O_MASK16B + (DDI_0_OSC_O_CTL0 << 1) + 4) = DDI_0_OSC_CTL0_CLK_DCDC_SRC_SEL_M | (DDI_0_OSC_CTL0_CLK_DCDC_SRC_SEL_M >> 16);
299  // Dummy read to ensure that the write has propagated
300  HWREGH(AUX_DDI0_OSC_BASE + DDI_0_OSC_O_CTL0);
301 
302  // read the MODE_CONF register in CCFG
303  ccfg_ModeConfReg = HWREG( CCFG_BASE + CCFG_O_MODE_CONF );
304 
305  // First part of trim done after cold reset and wakeup from shutdown:
306  // -Adjust the VDDR_TRIM_SLEEP value.
307  // -Configure DCDC.
308  SetupAfterColdResetWakeupFromShutDownCfg1( ccfg_ModeConfReg );
309 
310  // Addition to the CC1352 boost mode for HWREV >= 2.0
311  // The combination VDDR_EXT_LOAD=0 and VDDS_BOD_LEVEL=1 is defined to select boost mode
312  if ((( ccfg_ModeConfReg & CCFG_MODE_CONF_VDDR_EXT_LOAD ) == 0 ) &&
313  (( ccfg_ModeConfReg & CCFG_MODE_CONF_VDDS_BOD_LEVEL ) != 0 ) )
314  {
315  // OR in VDDR_BOOST_COMP_BOOST and maintain the other register fields.
316  // On CC13X2, CC26X2, CC13X1 and CC26X1 devices, there are no other
317  // fields in this register. But on CC26X4 and CC13X4 devices, there is
318  // an additional trim field that must not be overwritten.
319  HWREGB( ADI3_BASE + ADI_3_REFSYS_O_DCDCCTL3 ) |= ADI_3_REFSYS_DCDCCTL3_VDDR_BOOST_COMP_BOOST ;
320  }
321 
322  // Second part of trim done after cold reset and wakeup from shutdown:
323  // -Configure XOSC.
324 #if ( CCFG_BASE == CCFG_BASE_DEFAULT )
325  SetupAfterColdResetWakeupFromShutDownCfg2( ui32Fcfg1Revision, ccfg_ModeConfReg );
326 #else
327  NOROM_SetupAfterColdResetWakeupFromShutDownCfg2( ui32Fcfg1Revision, ccfg_ModeConfReg );
328 #endif
329 
330  // Do workaround if both enabled and needed (enabled by setting CCFG_SIZE_AND_DIS_FLAGS_DIS_LINEAR_CAPARRAY_DELTA_WORKAROUND = 0)
331  // Special XOSC_HF workaround adjustment for CC13x2 / CC26x2 XOSC_CAPARRAY_DELTA setting in CCFG (Customer configuration)
333 
334  {
335  uint32_t trimReg ;
336  uint32_t ui32TrimValue ;
337 
338  //--- Propagate the LPM_BIAS trim ---
339  trimReg = HWREG( FCFG1_BASE + FCFG1_O_DAC_BIAS_CNF );
340  ui32TrimValue = (( trimReg & FCFG1_DAC_BIAS_CNF_LPM_TRIM_IOUT_M ) >>
341  FCFG1_DAC_BIAS_CNF_LPM_TRIM_IOUT_S ) ;
342  HWREGB( AUX_ADI4_BASE + ADI_4_AUX_O_LPMBIAS ) = (( ui32TrimValue << ADI_4_AUX_LPMBIAS_LPM_TRIM_IOUT_S ) &
344  // Set LPM_BIAS_BACKUP_EN according to FCFG1 configuration
345  if ( trimReg & FCFG1_DAC_BIAS_CNF_LPM_BIAS_BACKUP_EN ) {
346  HWREGB( ADI3_BASE + ADI_O_SET + ADI_3_REFSYS_O_AUX_DEBUG ) = ADI_3_REFSYS_AUX_DEBUG_LPM_BIAS_BACKUP_EN;
347  } else {
348  HWREGB( ADI3_BASE + ADI_O_CLR + ADI_3_REFSYS_O_AUX_DEBUG ) = ADI_3_REFSYS_AUX_DEBUG_LPM_BIAS_BACKUP_EN;
349  }
350  // Set LPM_BIAS_WIDTH_TRIM according to FCFG1 configuration
351  {
352  uint32_t widthTrim = (( trimReg & FCFG1_DAC_BIAS_CNF_LPM_BIAS_WIDTH_TRIM_M ) >> FCFG1_DAC_BIAS_CNF_LPM_BIAS_WIDTH_TRIM_S );
353  HWREGH( AUX_ADI4_BASE + ADI_O_MASK8B + ( ADI_4_AUX_O_COMP * 2 )) = // Set LPM_BIAS_WIDTH_TRIM = 3
354  (( ADI_4_AUX_COMP_LPM_BIAS_WIDTH_TRIM_M << 8 ) | // Set mask (bits to be written) in [15:8]
355  ( widthTrim << ADI_4_AUX_COMP_LPM_BIAS_WIDTH_TRIM_S ) ); // Set value (in correct bit pos) in [7:0]
356  }
357  }
358 
359  // Third part of trim done after cold reset and wakeup from shutdown:
360  // -Configure HPOSC.
361  // -Setup the LF clock.
362 #if ( CCFG_BASE == CCFG_BASE_DEFAULT )
363  SetupAfterColdResetWakeupFromShutDownCfg3( ccfg_ModeConfReg );
364 #else
365  NOROM_SetupAfterColdResetWakeupFromShutDownCfg3( ccfg_ModeConfReg );
366 #endif
367 
368  // Set AUX into power down active mode
370 
371  // Disable EFUSE clock
372  HWREGBITW( FLASH_BASE + FLASH_O_CFG, FLASH_CFG_DIS_EFUSECLK_BITN ) = 1;
373 }
#define ADI_4_AUX_O_LPMBIAS
Definition: setup.c:46
void SetupAfterColdResetWakeupFromShutDownCfg3(uint32_t ccfg_ModeConfReg)
Third part of configuration required after cold reset and when waking up from shutdown.
Definition: setup_rom.c:322
#define ADI_4_AUX_COMP_LPM_BIAS_WIDTH_TRIM_S
Definition: setup.c:50
#define ADI_4_AUX_COMP_LPM_BIAS_WIDTH_TRIM_M
Definition: setup.c:49
#define AUX_SYSIF_OPMODE_TARGET_PDA
Definition: aux_sysif.h:97
void SetupAfterColdResetWakeupFromShutDownCfg1(uint32_t ccfg_ModeConfReg)
First part of configuration required after cold reset and when waking up from shutdown.
Definition: setup_rom.c:166
void AUXSYSIFOpModeChange(uint32_t targetOpMode)
Changes the AUX operational mode to the requested target mode.
Definition: aux_sysif.c:66
#define ADI_4_AUX_LPMBIAS_LPM_TRIM_IOUT_S
Definition: setup.c:48
void OSC_CapArrayAdjustWorkaround_Boot(void)
Special XOSC_HF workaround adjustment for CC13x2 / CC26x2 XOSC_CAPARRAY_DELTA setting in CCFG (Custom...
Definition: osc.c:359
void SetupAfterColdResetWakeupFromShutDownCfg2(uint32_t ui32Fcfg1Revision, uint32_t ccfg_ModeConfReg)
Second part of configuration required after cold reset and when waking up from shutdown.
Definition: setup_rom.c:221
#define ADI_4_AUX_LPMBIAS_LPM_TRIM_IOUT_M
Definition: setup.c:47
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§ TrimAfterColdResetWakeupFromShutDownWakeupFromPowerDown()

static void TrimAfterColdResetWakeupFromShutDownWakeupFromPowerDown ( void  )
static

Trims to be applied when coming from POWER_DOWN (also called when coming from SHUTDOWN and PIN_RESET).

Returns
None

Referenced by SetupTrimDevice().

265 {
266  // Currently no specific trim for Powerdown
267 }