NVSCC26XX hardware attributes. More...
#include <NVSCC26XX.h>
Data Fields | |
void * | regionBase |
size_t | regionSize |
NVSCC26XX hardware attributes.
The NVSCC26XX hardware attributes define hardware specific settings for a NVS driver instance.
For CCS and IAR tools, defining and reserving flash memory regions can be done entirely within the ti_drivers_config.c file. For GCC, additional content is required in the application's linker script to achieve the same result.
The example below defines a char array flashBuf
. Preprocessor logic is used so that this example will work with either the TI, IAR or GCC tools. For the TI and IAR tools, pragmas are used to place flashBuf
at the flash location specified by NVSCC26XX_HWAttrs.regionBase.
For the GCC tool, the flashBuf
array is placed into a named linker output section, .nvs. This section is defined in the application's linker script. The section placement command is carefully chosen to only RESERVE space for the
flashBuf
array, and not to actually initialize it during the application load process, thus preserving the content of flash.
Regardless of tool chain, the flashBuf
array in the example below is placed at the NVS_REGIONS_BASE
address and has an overall size of REGIONSIZE
bytes. Theoretically, the memory reserved by flashBuf
can be divided into four separate regions, each having a size of SECTORSIZE
bytes. Each region must always be aligned to the flash sector size, SECTORSIZE
. This example below shows two regions defined.
An array of two NVSCC26XX_HWAttrs structures is defined. Each index of this structure defines a region of on-chip flash memory. Both regions utilize memory reserved by the flashBuf
array. The two regions do not overlap or share the same physical memory locations. The two regions do however exist adjacent to each other in physical memory. The first region is defined as starting at the NVS_REGIONS_BASE
address and has a size equal to the flash sector size, as defined by SECTORSIZE
. The second region is defined as starting at (NVS_REGIONS_BASE + SECTORSIZE), that is, the NVS_REGIONS_BASE
address offset by SECTORSIZE
bytes. The second region has a size equal to (3 * SECTORSIZE) bytes. These regions together fully occupy REGIONSIZE
bytes of physical on-chip flash memory as reserved by the flashBuf
array.
Example GCC linker script file content. This example places an output section, .nvs, at the memory address
0x1B000
. The NOLOAD
directive is used so that this memory is not initialized during program load to the target.
If the write "scoreboard" is enabled, three new fields are added to the NVSCC26XX_HWAttrs structure:
void* NVSCC26XX_HWAttrs::regionBase |
The regionBase field specifies the base address of the on-chip flash memory to be managed. The regionBase must be aligned to the flash sector size. This memory cannot be shared and must be for exclusive use by one NVS driver instance.
size_t NVSCC26XX_HWAttrs::regionSize |
The regionSize field specifies the overall size of the on-chip flash memory to be managed. The regionSize must be at least 1 flash sector size AND an integer multiple of the flash sector size. For most CC26XX/CC13XX devices, the flash sector size is 4096 bytes. The NVSCC26XX driver will determine the device's actual sector size by reading internal system configuration registers.