Performs the necessary trim of the device which is not done in ROM boot code.
This function should only execute coming from ROM boot.
126 uint32_t ui32Fcfg1Revision;
127 uint32_t ui32AonSysResetctl;
131 ui32Fcfg1Revision = HWREG(FCFG1_BASE + FCFG1_O_FCFG1_REVISION);
132 if ( ui32Fcfg1Revision == 0xFFFFFFFF ) {
133 ui32Fcfg1Revision = 0;
141 HWREGBITW( FLASH_BASE + FLASH_O_CFG, FLASH_CFG_DIS_STANDBY_BITN ) = 0;
144 #if ( CCFG_BASE == CCFG_BASE_DEFAULT ) 147 NOROM_SetupSetCacheModeAccordingToCcfgSetting();
159 if( ! ( HWREGBITW( AON_IOC_BASE + AON_IOC_O_IOCLATCH, AON_IOC_IOCLATCH_EN_BITN )))
172 else if( ! ( HWREGBITW( AON_PMCTL_BASE + AON_PMCTL_O_SLEEPCTL, AON_PMCTL_SLEEPCTL_IO_PAD_SLEEP_DIS_BITN )))
199 HWREG( PRCM_BASE + PRCM_O_PDCTL1VIMS ) = 0;
203 HWREG(FLASH_BASE + FLASH_O_FPAC1) = (HWREG(FLASH_BASE + FLASH_O_FPAC1) &
204 ~FLASH_FPAC1_PSLEEPTDIS_M) |
205 (0x139<<FLASH_FPAC1_PSLEEPTDIS_S);
210 if ((( HWREG( AON_PMCTL_BASE + AON_PMCTL_O_RESETCTL ) &
211 ( AON_PMCTL_RESETCTL_BOOT_DET_1_M | AON_PMCTL_RESETCTL_BOOT_DET_0_M )) >>
212 AON_PMCTL_RESETCTL_BOOT_DET_0_S ) == 1 )
214 ui32AonSysResetctl = ( HWREG( AON_PMCTL_BASE + AON_PMCTL_O_RESETCTL ) &
215 ~( AON_PMCTL_RESETCTL_BOOT_DET_1_CLR_M | AON_PMCTL_RESETCTL_BOOT_DET_0_CLR_M |
216 AON_PMCTL_RESETCTL_BOOT_DET_1_SET_M | AON_PMCTL_RESETCTL_BOOT_DET_0_SET_M | AON_PMCTL_RESETCTL_MCU_WARM_RESET_M ));
217 HWREG( AON_PMCTL_BASE + AON_PMCTL_O_RESETCTL ) = ui32AonSysResetctl | AON_PMCTL_RESETCTL_BOOT_DET_1_SET_M;
218 HWREG( AON_PMCTL_BASE + AON_PMCTL_O_RESETCTL ) = ui32AonSysResetctl;
249 while ( HWREGBITW( VIMS_BASE + VIMS_O_STAT, VIMS_STAT_MODE_CHANGING_BITN )) {
#define AON_RTC_CH1
Definition: aon_rtc.h:93
void IntPendClear(uint32_t ui32Interrupt)
Unpends an interrupt.
Definition: interrupt.c:441
#define AON_RTC_CH2
Definition: aon_rtc.h:94
#define CCFGREAD_SCLK_LF_OPTION_XOSC_LF
Definition: ccfgread.h:116
static void AONRTCCombinedEventConfig(uint32_t ui32Channels)
Configure the source of the combined event.
Definition: aon_rtc.h:335
static void TrimAfterColdResetWakeupFromShutDownWakeupFromPowerDown(void)
Trims to be applied when coming from POWER_DOWN (also called when coming from SHUTDOWN and PIN_RESET)...
Definition: setup.c:264
static void AONRTCReset(void)
Reset the RTC.
Definition: aon_rtc.h:209
#define AON_RTC_CH0
Definition: aon_rtc.h:92
static uint32_t CCFGRead_SCLK_LF_OPTION(void)
Read SCLK_LF_OPTION from CCFG.
Definition: ccfgread.h:132
void SetupSetAonRtcSubSecInc(uint32_t subSecInc)
Doing the tricky stuff needed to enter new RTCSUBSECINC value.
Definition: setup_rom.c:927
static void TrimAfterColdResetWakeupFromShutDown(uint32_t ui32Fcfg1Revision)
Trims to be applied when coming from SHUTDOWN (also called when coming from PIN_RESET).
Definition: setup.c:280
static void AONRTCEnable(void)
Enable the RTC.
Definition: aon_rtc.h:172
void SetupSetCacheModeAccordingToCcfgSetting(void)
Set correct VIMS_MODE according to CCFG setting (CACHE or GPRAM)
Definition: setup_rom.c:882
void ThisLibraryIsFor_CC13x2_CC26x2_HwRev20AndLater_HaltIfViolated(void)
Verifies that current chip is CC13x2 or CC26x2 PG2.0 or later and never returns if violated...
Definition: chipinfo.c:212
#define SUBSECINC_31250_HZ
Definition: setup.c:102
static void TrimAfterColdReset(void)
Trims to be applied when coming from PIN_RESET.
Definition: setup.c:384