[i2c.h] Inter-Integrated Circuit

Collaboration diagram for [i2c.h] Inter-Integrated Circuit:

Macros
#define	I2C_CONTROLLER_CMD_SINGLE_SEND   0x00000007
#define	I2C_CONTROLLER_CMD_SINGLE_RECEIVE   0x00000007
#define	I2C_CONTROLLER_CMD_BURST_SEND_START   0x00000003
#define	I2C_CONTROLLER_CMD_BURST_SEND_CONT   0x00000001
#define	I2C_CONTROLLER_CMD_BURST_SEND_FINISH   0x00000005
#define	I2C_CONTROLLER_CMD_BURST_SEND_ERROR_STOP   0x00000004
#define	I2C_CONTROLLER_CMD_BURST_RECEIVE_START   0x0000000b
#define	I2C_CONTROLLER_CMD_BURST_RECEIVE_CONT   0x00000009
#define	I2C_CONTROLLER_CMD_BURST_RECEIVE_FINISH   0x00000005
#define	I2C_CONTROLLER_CMD_BURST_RECEIVE_ERROR_STOP   0x00000004
#define	I2C_CONTROLLER_ERR_NONE   0
#define	I2C_CONTROLLER_ERR_ADDR_ACK   0x00000004
#define	I2C_CONTROLLER_ERR_DATA_ACK   0x00000008
#define	I2C_CONTROLLER_ERR_ARB_LOST   0x00000010
#define	I2C_TARGET_ACT_NONE   0
#define	I2C_TARGET_ACT_RREQ   0x00000001
#define	I2C_TARGET_ACT_TREQ   0x00000002
#define	I2C_TARGET_ACT_RREQ_FBR   0x00000005
#define	I2C_TARGET_INT_STOP   0x00000004
#define	I2C_TARGET_INT_START   0x00000002
#define	I2C_TARGET_INT_DATA   0x00000001
#define	I2C_CLK_FREQ   48000000

Functions
void	I2CControllerInitExpClk (uint32_t base, bool fast)
	Initializes the I2C Controller module. More...
__STATIC_INLINE void	I2CControllerCommand (uint32_t base, uint32_t cmd)
	Controls the state of the I2C Controller module. More...
__STATIC_INLINE void	I2CControllerSetTargetAddr (uint32_t base, uint8_t targetAddr, bool receive)
	Sets the address that the I2C Controller will place on the bus. More...
__STATIC_INLINE void	I2CControllerEnable (uint32_t base)
	Enables the I2C Controller module. More...
__STATIC_INLINE void	I2CControllerDisable (uint32_t base)
	Disables the I2C controller module. More...
__STATIC_INLINE bool	I2CControllerBusy (uint32_t base)
	Indicates whether or not the I2C Controller is busy. More...
__STATIC_INLINE bool	I2CControllerBusBusy (uint32_t base)
	Indicates whether or not the I2C bus is busy. More...
__STATIC_INLINE uint32_t	I2CControllerGetData (uint32_t base)
	Receives a byte that has been sent to the I2C Controller. More...
__STATIC_INLINE void	I2CControllerPutData (uint32_t base, uint8_t data)
	Transmits a byte from the I2C Controller. More...
uint32_t	I2CControllerError (uint32_t base)
	Gets the error status of the I2C Controller module. More...
__STATIC_INLINE void	I2CControllerEnableInt (uint32_t base)
	Enables the I2C Controller interrupt. More...
__STATIC_INLINE void	I2CControllerDisableInt (uint32_t base)
	Disables the I2C Controller interrupt. More...
__STATIC_INLINE void	I2CControllerClearInt (uint32_t base)
	Clears I2C Controller interrupt sources. More...
__STATIC_INLINE bool	I2CControllerIntStatus (uint32_t base, bool masked)
	Gets the current I2C Controller interrupt status. More...
__STATIC_INLINE void	I2CTargetEnable (uint32_t base)
	Enables the I2C Target module. More...
__STATIC_INLINE void	I2CTargetInit (uint32_t base, uint8_t targetAddr)
	Initializes the I2C Target module. More...
__STATIC_INLINE void	I2CTargetSetAddress (uint32_t base, uint8_t targetAddr)
	Sets the I2C target address. More...
__STATIC_INLINE void	I2CTargetDisable (uint32_t base)
	Disables the I2C target module. More...
__STATIC_INLINE uint32_t	I2CTargetStatus (uint32_t base)
	Gets the I2C Target module status. More...
__STATIC_INLINE uint32_t	I2CTargetGetData (uint32_t base)
	Receives a byte that has been sent to the I2C Target. More...
__STATIC_INLINE void	I2CTargetPutData (uint32_t base, uint8_t data)
	Transmits a byte from the I2C Target. More...
__STATIC_INLINE void	I2CTargetEnableInt (uint32_t base, uint32_t intFlags)
	Enables individual I2C Target interrupt sources. More...
__STATIC_INLINE void	I2CTargetDisableInt (uint32_t base, uint32_t intFlags)
	Disables individual I2C Target interrupt sources. More...
__STATIC_INLINE void	I2CTargetClearInt (uint32_t base, uint32_t intFlags)
	Clears I2C Target interrupt sources. More...
__STATIC_INLINE uint32_t	I2CTargetIntStatus (uint32_t base, bool masked)
	Gets the current I2C Target interrupt status. More...

Detailed Description

Macro Definition Documentation

I2C_CONTROLLER_CMD_SINGLE_SEND

#define I2C_CONTROLLER_CMD_SINGLE_SEND   0x00000007

Referenced by I2CControllerCommand().

I2C_CONTROLLER_CMD_SINGLE_RECEIVE

#define I2C_CONTROLLER_CMD_SINGLE_RECEIVE   0x00000007

I2C_CONTROLLER_CMD_BURST_SEND_START

#define I2C_CONTROLLER_CMD_BURST_SEND_START   0x00000003

Referenced by I2CControllerCommand().

I2C_CONTROLLER_CMD_BURST_SEND_CONT

#define I2C_CONTROLLER_CMD_BURST_SEND_CONT   0x00000001

Referenced by I2CControllerCommand().

I2C_CONTROLLER_CMD_BURST_SEND_FINISH

#define I2C_CONTROLLER_CMD_BURST_SEND_FINISH   0x00000005

Referenced by I2CControllerCommand().

I2C_CONTROLLER_CMD_BURST_SEND_ERROR_STOP

#define I2C_CONTROLLER_CMD_BURST_SEND_ERROR_STOP   0x00000004

Referenced by I2CControllerCommand().

I2C_CONTROLLER_CMD_BURST_RECEIVE_START

#define I2C_CONTROLLER_CMD_BURST_RECEIVE_START   0x0000000b

Referenced by I2CControllerCommand().

I2C_CONTROLLER_CMD_BURST_RECEIVE_CONT

#define I2C_CONTROLLER_CMD_BURST_RECEIVE_CONT   0x00000009

Referenced by I2CControllerCommand().

I2C_CONTROLLER_CMD_BURST_RECEIVE_FINISH

#define I2C_CONTROLLER_CMD_BURST_RECEIVE_FINISH   0x00000005

Referenced by I2CControllerCommand().

I2C_CONTROLLER_CMD_BURST_RECEIVE_ERROR_STOP

#define I2C_CONTROLLER_CMD_BURST_RECEIVE_ERROR_STOP   0x00000004

Referenced by I2CControllerCommand().

I2C_CONTROLLER_ERR_NONE

#define I2C_CONTROLLER_ERR_NONE   0

Referenced by I2CControllerError().

I2C_CONTROLLER_ERR_ADDR_ACK

#define I2C_CONTROLLER_ERR_ADDR_ACK   0x00000004

I2C_CONTROLLER_ERR_DATA_ACK

#define I2C_CONTROLLER_ERR_DATA_ACK   0x00000008

I2C_CONTROLLER_ERR_ARB_LOST

#define I2C_CONTROLLER_ERR_ARB_LOST   0x00000010

I2C_TARGET_ACT_NONE

#define I2C_TARGET_ACT_NONE   0

I2C_TARGET_ACT_RREQ

#define I2C_TARGET_ACT_RREQ   0x00000001

I2C_TARGET_ACT_TREQ

#define I2C_TARGET_ACT_TREQ   0x00000002

I2C_TARGET_ACT_RREQ_FBR

#define I2C_TARGET_ACT_RREQ_FBR   0x00000005

I2C_TARGET_INT_STOP

#define I2C_TARGET_INT_STOP   0x00000004

Referenced by I2CTargetDisableInt(), and I2CTargetEnableInt().

I2C_TARGET_INT_START

#define I2C_TARGET_INT_START   0x00000002

Referenced by I2CTargetDisableInt(), and I2CTargetEnableInt().

I2C_TARGET_INT_DATA

#define I2C_TARGET_INT_DATA   0x00000001

Referenced by I2CTargetDisableInt(), and I2CTargetEnableInt().

I2C_CLK_FREQ

#define I2C_CLK_FREQ   48000000

Referenced by I2CControllerInitExpClk().

Function Documentation

I2CControllerInitExpClk()

void I2CControllerInitExpClk	(	uint32_t	base,
		bool	fast
	)

Initializes the I²C Controller module.

This function initializes operation of the I²C Controller module. Upon successful initialization of the I²C module, this function will have set the bus speed for the controller, and will have enabled the I²C Controller module.

If the parameter fast is true, then the controller module will be set up to transfer data at 400 kbps; otherwise, it will be set up to transfer data at 100 kbps.

Parameters

base	is the base address of the I2C module.
fast	set up for fast data transfers.

Returns

None

References ASSERT, HWREG, I2C_CLK_FREQ, I2C_O_CTPR, and I2CControllerEnable().

I2CControllerCommand()

__STATIC_INLINE void I2CControllerCommand	(	uint32_t	base,
		uint32_t	cmd
	)

Controls the state of the I²C Controller module.

This function is used to control the state of the Controller module send and receive operations.

Parameters

base

is the base address of the I2C module.

cmd

is the command to be issued by the I2C Controller module The parameter can be one of the following values: I2C_CONTROLLER_CMD_SINGLE_SEND I2C_CONTROLLER_CMD_SINGLE_RECEIVE I2C_CONTROLLER_CMD_BURST_SEND_START I2C_CONTROLLER_CMD_BURST_SEND_CONT I2C_CONTROLLER_CMD_BURST_SEND_FINISH I2C_CONTROLLER_CMD_BURST_SEND_ERROR_STOP I2C_CONTROLLER_CMD_BURST_RECEIVE_START I2C_CONTROLLER_CMD_BURST_RECEIVE_CONT I2C_CONTROLLER_CMD_BURST_RECEIVE_FINISH I2C_CONTROLLER_CMD_BURST_RECEIVE_ERROR_STOP

Returns

None

References ASSERT, CPUDelay(), HWREG, I2C_CONTROLLER_CMD_BURST_RECEIVE_CONT, I2C_CONTROLLER_CMD_BURST_RECEIVE_ERROR_STOP, I2C_CONTROLLER_CMD_BURST_RECEIVE_FINISH, I2C_CONTROLLER_CMD_BURST_RECEIVE_START, I2C_CONTROLLER_CMD_BURST_SEND_CONT, I2C_CONTROLLER_CMD_BURST_SEND_ERROR_STOP, I2C_CONTROLLER_CMD_BURST_SEND_FINISH, I2C_CONTROLLER_CMD_BURST_SEND_START, I2C_CONTROLLER_CMD_SINGLE_SEND, and I2C_O_CSTAT_CTL.

I2CControllerSetTargetAddr()

__STATIC_INLINE void I2CControllerSetTargetAddr	(	uint32_t	base,
		uint8_t	targetAddr,
		bool	receive
	)

Sets the address that the I²C Controller will place on the bus.

This function will set the address that the I²C Controller will place on the bus when initiating a transaction. When the receive parameter is set to true, the address will indicate that the I²C Controller is initiating a read from the target; otherwise the address will indicate that the I²C Controller is initiating a write to the target.

Parameters

base	is the base address of the I2C module.
targetAddr	is a 7-bit target address
receive	flag indicates the type of communication with the target. true : I2C Controller is initiating a read from the target. false : I2C Controller is initiating a write to the target.

Returns

None

References ASSERT, HWREG, and I2C_O_CSA.

I2CControllerEnable()

__STATIC_INLINE void I2CControllerEnable

(

uint32_t

base

)

Enables the I²C Controller module.

This will enable operation of the I²C Controller module.

Parameters

base	is the base address of the I2C module.

Returns

None

References ASSERT, HWREG, I2C_CCR_MFE_M, I2C_CSTAT_CTL_BUSY_RUN, I2C_O_CCR, and I2C_O_CSTAT_CTL.

Referenced by I2CControllerInitExpClk().

I2CControllerDisable()

__STATIC_INLINE void I2CControllerDisable

(

uint32_t

base

)

Disables the I²C controller module.

This will disable operation of the I²C controller module.

Parameters

base	is the base address of the I2C module.

Returns

None

References ASSERT, HWREG, I2C_CCR_MFE_M, I2C_O_CCR, and I2C_O_CSTAT_CTL.

I2CControllerBusy()

__STATIC_INLINE bool I2CControllerBusy

(

uint32_t

base

)

Indicates whether or not the I²C Controller is busy.

This function returns an indication of whether or not the I²C Controller is busy transmitting or receiving data.

Parameters

base	is the base address of the I2C module.

Returns

Returns status of I²C Controller:

• true : I²C Controller is busy.
• false : I²C Controller is not busy.

References ASSERT, HWREG, I2C_CSTAT_CTL_BUSY_RUN, and I2C_O_CSTAT_CTL.

I2CControllerBusBusy()

__STATIC_INLINE bool I2CControllerBusBusy

(

uint32_t

base

)

Indicates whether or not the I²C bus is busy.

This function returns an indication of whether or not the I²C bus is busy. This function can be used in a multi-controller environment to determine if another controller is currently using the bus.

Parameters

base	is the base address of the I2C module.

Returns

Returns status of the I²C bus:

• true : I²C bus is busy.
• false : I²C bus is not busy.

References ASSERT, HWREG, I2C_CSTAT_CTL_BUSBSY, and I2C_O_CSTAT_CTL.

I2CControllerGetData()

__STATIC_INLINE uint32_t I2CControllerGetData

(

uint32_t

base

)

Receives a byte that has been sent to the I²C Controller.

This function reads a byte of data from the I²C Controller Data Register.

Parameters

base	is the base address of the I2C module.

Returns

Returns the byte received from by the I²C Controller, cast as an uint32_t.

References ASSERT, HWREG, and I2C_O_CDR.

I2CControllerPutData()

__STATIC_INLINE void I2CControllerPutData	(	uint32_t	base,
		uint8_t	data
	)

Transmits a byte from the I²C Controller.

This function will place the supplied data into I²C Controller Data Register.

Parameters

base	is the base address of the I2C module.
data	is the data to be transmitted by the I2C Controller

Returns

None

References ASSERT, HWREG, I2C_O_CDR, and I2CControllerError().

I2CControllerError()

uint32_t I2CControllerError

(

uint32_t

base

)

Gets the error status of the I²C Controller module.

This function is used to obtain the error status of the Controller module send and receive operations.

Parameters

base	is the base address of the I2C module.

Returns

Returns the error status of the Controller module:

• I2C_CONTROLLER_ERR_NONE
• I2C_CONTROLLER_ERR_ADDR_ACK
• I2C_CONTROLLER_ERR_DATA_ACK
• I2C_CONTROLLER_ERR_ARB_LOST

References ASSERT, HWREG, I2C_CONTROLLER_ERR_NONE, I2C_CSTAT_CTL_ADRACKN_STOP, I2C_CSTAT_CTL_ARBLST, I2C_CSTAT_CTL_BUSY_RUN, I2C_CSTAT_CTL_DATACKN_ACK, I2C_CSTAT_CTL_ERR_START, and I2C_O_CSTAT_CTL.

Referenced by I2CControllerPutData().

I2CControllerEnableInt()

__STATIC_INLINE void I2CControllerEnableInt

(

uint32_t

base

)

Enables the I²C Controller interrupt.

Enables the I²C Controller interrupt source.

Parameters

base	is the base address of the I2C module.

Returns

None

References ASSERT, HWREG, I2C_CIMR_IM, and I2C_O_CIMR.

I2CControllerDisableInt()

__STATIC_INLINE void I2CControllerDisableInt

(

uint32_t

base

)

Disables the I²C Controller interrupt.

Disables the I²C Controller interrupt source.

Parameters

base	is the base address of the I2C module.

Returns

None

References ASSERT, HWREG, and I2C_O_CIMR.

I2CControllerClearInt()

__STATIC_INLINE void I2CControllerClearInt

(

uint32_t

base

)

Clears I²C Controller interrupt sources.

The I²C Controller interrupt source is cleared, so that it no longer asserts. This must be done in the interrupt handler to keep it from being called again immediately upon exit.

Note

Due to write buffers and synchronizers in the system it may take several clock cycles from a register write clearing an event in a module and until the event is actually cleared in the NVIC of the system CPU. It is recommended to clear the event source early in the interrupt service routine (ISR) to allow the event clear to propagate to the NVIC before returning from the ISR. At the same time, an early event clear allows new events of the same type to be pended instead of ignored if the event is cleared later in the ISR. It is the responsibility of the programmer to make sure that enough time has passed before returning from the ISR to avoid false re-triggering of the cleared event. A simple, although not necessarily optimal, way of clearing an event before returning from the ISR is:

1. Write to clear event (interrupt source). (buffered write)
2. Dummy read from the event source module. (making sure the write has propagated)
3. Wait two system CPU clock cycles (user code or two NOPs). (allowing cleared event to propagate through any synchronizers)

Parameters

base	is the base address of the I2C module.

Returns

None

References ASSERT, HWREG, I2C_CICR_IC, and I2C_O_CICR.

I2CControllerIntStatus()

__STATIC_INLINE bool I2CControllerIntStatus	(	uint32_t	base,
		bool	masked
	)

Gets the current I²C Controller interrupt status.

This returns the interrupt status for the I²C Controller module. Either the raw interrupt status or the status of interrupts that are allowed to reflect to the processor can be returned.

Parameters

base	is the base address of the I2C Controller module.
masked	selects either raw or masked interrupt status. false : Raw interrupt status is requested. true : Masked interrupt status is requested.

Returns

Returns the current interrupt status.

• true : Active.
• false : Not active.

References ASSERT, HWREG, I2C_O_CMIS, and I2C_O_CRIS.

I2CTargetEnable()

__STATIC_INLINE void I2CTargetEnable

(

uint32_t

base

)

Enables the I²C Target module.

This will enable operation of the I²C Target module.

Parameters

base	is the base address of the I2C Target module.

Returns

None

References ASSERT, HWREG, I2C_CCR_SFE_M, I2C_O_CCR, I2C_O_TSTAT_CTL, and I2C_TSTAT_CTL_RREQ_DA.

Referenced by I2CTargetInit().

I2CTargetInit()

__STATIC_INLINE void I2CTargetInit	(	uint32_t	base,
		uint8_t	targetAddr
	)

Initializes the I²C Target module.

This function initializes operation of the I²C Target module. Upon successful initialization of the I²C module, this function will have set the target address and have enabled the I²C Target module.

The parameter targetAddr is the value that will be compared against the target address sent by an I²C controller.

Parameters

base	is the base address of the I2C Target module.
targetAddr	is the 7-bit target address.

Returns

None

References ASSERT, HWREG, I2C_O_TOAR, and I2CTargetEnable().

I2CTargetSetAddress()

__STATIC_INLINE void I2CTargetSetAddress	(	uint32_t	base,
		uint8_t	targetAddr
	)

Sets the I²C target address.

This function writes the specified target address.

Parameters

base	is the base address of the I2C Target module.
targetAddr	is the 7-bit target address

Returns

None.

References ASSERT, HWREG, and I2C_O_TOAR.

I2CTargetDisable()

__STATIC_INLINE void I2CTargetDisable

(

uint32_t

base

)

Disables the I²C target module.

This will disable operation of the I²C target module.

Parameters

base	is the base address of the I2C Target module.

Returns

None

References ASSERT, HWREG, I2C_CCR_SFE_M, I2C_O_CCR, and I2C_O_TSTAT_CTL.

I2CTargetStatus()

__STATIC_INLINE uint32_t I2CTargetStatus

(

uint32_t

base

)

Gets the I²C Target module status.

This function will return the action requested from a controller, if any.

Parameters

base	is the base address of the I2C Target module.

Returns

Returns the status of the I²C Target module:

• I2C_TARGET_ACT_NONE : No action has been requested of the I²C Target module.
• I2C_TARGET_ACT_RREQ : An I²C controller has sent data to the I²C Target module.
• I2C_TARGET_ACT_TREQ : An I²C controller has requested that the I²C Target module send data.
• I2C_TARGET_ACT_RREQ_FBR : An I²C controller has sent data to the I²C target and the first byte following the target's own address has been received.

References ASSERT, HWREG, and I2C_O_TSTAT_CTL.

I2CTargetGetData()

__STATIC_INLINE uint32_t I2CTargetGetData

(

uint32_t

base

)

Receives a byte that has been sent to the I²C Target.

This function reads a byte of data from the I²C Target Data Register.

Parameters

base	is the base address of the I2C Target module.

Returns

Returns the byte received from by the I²C Target, cast as an uint32_t.

References ASSERT, HWREG, and I2C_O_TDR.

I2CTargetPutData()

__STATIC_INLINE void I2CTargetPutData	(	uint32_t	base,
		uint8_t	data
	)

Transmits a byte from the I²C Target.

This function will place the supplied data into I²C Target Data Register.

Parameters

base	is the base address of the I2C Target module.
data	data to be transmitted from the I2C Target.

Returns

None

References ASSERT, HWREG, and I2C_O_TDR.

I2CTargetEnableInt()

__STATIC_INLINE void I2CTargetEnableInt	(	uint32_t	base,
		uint32_t	intFlags
	)

Enables individual I²C Target interrupt sources.

Enables the indicated I²C Target interrupt sources. Only the sources that are enabled can be reflected to the processor interrupt; disabled sources have no effect on the processor.

Parameters

base	is the base address of the I2C module.
intFlags	is the bit mask of the target interrupt sources to be enabled. The parameter is the bitwise OR of any of the following: I2C_TARGET_INT_STOP I2C_TARGET_INT_START I2C_TARGET_INT_DATA

Returns

None

References ASSERT, HWREG, I2C_O_TIMR, I2C_TARGET_INT_DATA, I2C_TARGET_INT_START, and I2C_TARGET_INT_STOP.

I2CTargetDisableInt()

__STATIC_INLINE void I2CTargetDisableInt	(	uint32_t	base,
		uint32_t	intFlags
	)

Disables individual I²C Target interrupt sources.

Disables the indicated I²C Target interrupt sources. Only the sources that are enabled can be reflected to the processor interrupt; disabled sources have no effect on the processor.

Parameters

base	is the base address of the I2C Target module.
intFlags	is the bit mask of the interrupt sources to be disabled. The parameter is the bitwise OR of any of the following: I2C_TARGET_INT_STOP I2C_TARGET_INT_START I2C_TARGET_INT_DATA

Returns

None

References ASSERT, HWREG, I2C_O_TIMR, I2C_TARGET_INT_DATA, I2C_TARGET_INT_START, and I2C_TARGET_INT_STOP.

I2CTargetClearInt()

__STATIC_INLINE void I2CTargetClearInt	(	uint32_t	base,
		uint32_t	intFlags
	)

Clears I²C Target interrupt sources.

The specified I²C Target interrupt sources are cleared, so that they no longer assert. This must be done in the interrupt handler to keep it from being called again immediately upon exit.

Note

Due to write buffers and synchronizers in the system it may take several clock cycles from a register write clearing an event in a module and until the event is actually cleared in the NVIC of the system CPU. It is recommended to clear the event source early in the interrupt service routine (ISR) to allow the event clear to propagate to the NVIC before returning from the ISR. At the same time, an early event clear allows new events of the same type to be pended instead of ignored if the event is cleared later in the ISR. It is the responsibility of the programmer to make sure that enough time has passed before returning from the ISR to avoid false re-triggering of the cleared event. A simple, although not necessarily optimal, way of clearing an event before returning from the ISR is:

1. Write to clear event (interrupt source). (buffered write)
2. Dummy read from the event source module. (making sure the write has propagated)
3. Wait two system CPU clock cycles (user code or two NOPs). (allowing cleared event to propagate through any synchronizers)

Parameters

base	is the base address of the I2C module.
intFlags	is a bit mask of the interrupt sources to be cleared. The parameter is the bitwise OR of any of the following: I2C_TARGET_INT_STOP I2C_TARGET_INT_START I2C_TARGET_INT_DATA

Returns

None

References ASSERT, HWREG, and I2C_O_TICR.

I2CTargetIntStatus()

__STATIC_INLINE uint32_t I2CTargetIntStatus	(	uint32_t	base,
		bool	masked
	)

Gets the current I²C Target interrupt status.

This returns the interrupt status for the I²C Target module. Either the raw interrupt status or the status of interrupts that are allowed to reflect to the processor can be returned.

Parameters

base	is the base address of the I2C Target module.
masked	selects either raw or masked interrupt status. false : Raw interrupt status is requested. true : Masked interrupt status is requested.

Returns

Returns the current interrupt status as an OR'ed combination of:

• I2C_TARGET_INT_STOP
• I2C_TARGET_INT_START
• I2C_TARGET_INT_DATA

References ASSERT, HWREG, I2C_O_TMIS, and I2C_O_TRIS.