Collaboration diagram for [spi.h] Serial Peripheral Interface:

Macros
#define	SPI_DMA_DONE_TX SPI_IMASK_DMATX
	DMA Done 1 event for TX event mask. More...

#define	SPI_DMA_DONE_RX SPI_IMASK_DMARX
	DMA Done 1 event for RX event mask. More...

#define	SPI_IDLE SPI_IMASK_IDLE
	SPI Idle event mask. More...

#define	SPI_TXEMPTY SPI_IMASK_TXEMPTY
	Transmit FIFO Empty event mask. More...

#define	SPI_TX SPI_IMASK_TX
	Transmit FIFO event mask. More...

#define	SPI_RX SPI_IMASK_RX
	Receive FIFO event. This interrupt is set if the selected Receive FIFO level has been reached. More...

#define	SPI_RTOUT SPI_IMASK_RTOUT
	Enable SPI Receive Time-Out event mask. More...

#define	SPI_PER SPI_IMASK_PER
	Parity error event mask. More...

#define	SPI_RXFIFO_OVF SPI_IMASK_RXOVF
	RXFIFO overflow event mask. More...

#define	SPI_BUSY SPI_STA_BUSY_ACTIVE
	Busy. More...

#define	SPI_RX_NOT_FULL SPI_STA_RNF_NOT_FULL
	Receive FIFO not full. More...

#define	SPI_RX_EMPTY SPI_STA_RFE_EMPTY
	Receive FIFO empty. More...

#define	SPI_TX_NOT_FULL SPI_STA_TNF_NOT_FULL
	Transmit FIFO not full. More...

#define	SPI_TX_EMPTY SPI_STA_TFE_EMPTY
	Transmit FIFO empty. More...

#define	SPI_STATUS_MASK 0x0000001F
	Mask for bits above. More...

#define	SPI_FRF_MOTO_MODE_0 (SPI_CTL0_FRF_MOTOROLA_3WIRE \| SPI_CTL0_SPO_LO \| SPI_CTL0_SPH_FIRST)
	Motorola format 3-wire, polarity 0, phase 0. More...

#define	SPI_FRF_MOTO_MODE_1 (SPI_CTL0_FRF_MOTOROLA_3WIRE \| SPI_CTL0_SPO_LO \| SPI_CTL0_SPH_SECOND)
	Motorola format 3-wire, polarity 0, phase 1. More...

#define	SPI_FRF_MOTO_MODE_2 (SPI_CTL0_FRF_MOTOROLA_3WIRE \| SPI_CTL0_SPO_HI \| SPI_CTL0_SPH_FIRST)
	Motorola format 3-wire, polarity 1, phase 0. More...

#define	SPI_FRF_MOTO_MODE_3 (SPI_CTL0_FRF_MOTOROLA_3WIRE \| SPI_CTL0_SPO_HI \| SPI_CTL0_SPH_SECOND)
	Motorola format 3-wire, polarity 1, phase 1. More...

#define	SPI_FRF_MOTO_MODE_4 (SPI_CTL0_FRF_MOTOROLA_4WIRE \| SPI_CTL0_SPO_LO \| SPI_CTL0_SPH_FIRST)
	Motorola format 4-wire, polarity 0, phase 0. More...

#define	SPI_FRF_MOTO_MODE_5 (SPI_CTL0_FRF_MOTOROLA_4WIRE \| SPI_CTL0_SPO_LO \| SPI_CTL0_SPH_SECOND)
	Motorola format 4-wire, polarity 0, phase 1. More...

#define	SPI_FRF_MOTO_MODE_6 (SPI_CTL0_FRF_MOTOROLA_4WIRE \| SPI_CTL0_SPO_HI \| SPI_CTL0_SPH_FIRST)
	Motorola format 4-wire, polarity 1, phase 0. More...

#define	SPI_FRF_MOTO_MODE_7 (SPI_CTL0_FRF_MOTOROLA_4WIRE \| SPI_CTL0_SPO_HI \| SPI_CTL0_SPH_SECOND)
	Motorola format 4-wire, polarity 1, phase 1. More...

#define	SPI_FRF_TI SPI_CTL0_FRF_TI_SYNC
	TI Sync frame format. More...

#define	SPI_FRF_NMW SPI_CTL0_FRF_MIRCOWIRE
	MicroWire frame format. More...

#define	SPI_MODE_CONTROLLER SPI_CTL1_MS_CONTROLLER
	SPI controller. More...

#define	SPI_MODE_PERIPHERAL SPI_CTL1_MS_PERIPHERAL
	SPI peripheral. More...

#define	SPI_MODE_PERIPHERAL_OD SPI_CTL1_SOD_ENABLE
	output disabled More...

#define	SPI_DMA_TX SPI_DMACR_TXEN
	Enable DMA for transmit. More...

#define	SPI_DMA_RX SPI_DMACR_RXEN
	Enable DMA for receive. More...

Functions
void	SPIConfigSetExpClk (uint32_t base, uint32_t spiClk, uint32_t protocol, uint32_t mode, uint32_t bitRate, uint32_t dataWidth)
	Configures the serial peripheral port. More...

__STATIC_INLINE void	SPIEnable (uint32_t base)
	Enables the serial peripheral port. More...

__STATIC_INLINE void	SPIDisable (uint32_t base)
	Disables the serial peripheral port. More...

void	SPIPutData (uint32_t base, uint32_t data)
	Puts a data element into the SPI transmit FIFO. More...

int32_t	SPIPutDataNonBlocking (uint32_t base, uint32_t data)
	Puts a data element into the SPI transmit FIFO. More...

void	SPIGetData (uint32_t base, uint32_t *data)
	Gets a data element from the SPI receive FIFO. More...

int32_t	SPIGetDataNonBlocking (uint32_t base, uint32_t *data)
	Gets a data element from the SPI receive FIFO. More...

__STATIC_INLINE bool	SPIBusy (uint32_t base)
	Determines whether the SPI transmitter is busy or not. More...

__STATIC_INLINE uint32_t	SPIStatus (uint32_t base)
	Get the status of the SPI data buffers. More...

void	SPIRegisterInt (uint32_t base, void(*pfnHandler)(void))
	Registers an interrupt handler for the Serial Peripheral Interface in the dynamic interrupt table. More...

void	SPIUnregisterInt (uint32_t base)
	Unregisters an interrupt handler for the Serial Peripheral Interface in the dynamic interrupt table. More...

__STATIC_INLINE void	SPIEnableInt (uint32_t base, uint32_t intFlags)
	Enables individual SPI interrupt sources. More...

__STATIC_INLINE void	SPIDisableInt (uint32_t base, uint32_t intFlags)
	Disables individual SPI interrupt sources. More...

__STATIC_INLINE void	SPIClearInt (uint32_t base, uint32_t intFlags)
	Clears SPI interrupt sources. More...

__STATIC_INLINE uint32_t	SPIIntStatus (uint32_t base, bool isMasked)
	Gets the current interrupt status. More...

__STATIC_INLINE void	SPIEnableDMA (uint32_t base, uint32_t dmaFlags)
	Enable SPI DMA operation. More...

__STATIC_INLINE void	SPIDisableDMA (uint32_t base, uint32_t dmaFlags)
	Disable SPI DMA operation. More...

Detailed Description

Macro Definition Documentation

§ SPI_DMA_DONE_TX

#define SPI_DMA_DONE_TX SPI_IMASK_DMATX

DMA Done 1 event for TX event mask.

§ SPI_DMA_DONE_RX

#define SPI_DMA_DONE_RX SPI_IMASK_DMARX

DMA Done 1 event for RX event mask.

§ SPI_IDLE

#define SPI_IDLE SPI_IMASK_IDLE

SPI Idle event mask.

§ SPI_TXEMPTY

#define SPI_TXEMPTY SPI_IMASK_TXEMPTY

Transmit FIFO Empty event mask.

§ SPI_TX

#define SPI_TX SPI_IMASK_TX

Transmit FIFO event mask.

§ SPI_RX

#define SPI_RX SPI_IMASK_RX

Receive FIFO event. This interrupt is set if the selected Receive FIFO level has been reached.

§ SPI_RTOUT

#define SPI_RTOUT SPI_IMASK_RTOUT

Enable SPI Receive Time-Out event mask.

§ SPI_PER

#define SPI_PER SPI_IMASK_PER

Parity error event mask.

§ SPI_RXFIFO_OVF

#define SPI_RXFIFO_OVF SPI_IMASK_RXOVF

RXFIFO overflow event mask.

§ SPI_BUSY

#define SPI_BUSY SPI_STA_BUSY_ACTIVE

Busy.

§ SPI_RX_NOT_FULL

#define SPI_RX_NOT_FULL SPI_STA_RNF_NOT_FULL

Receive FIFO not full.

§ SPI_RX_EMPTY

#define SPI_RX_EMPTY SPI_STA_RFE_EMPTY

Receive FIFO empty.

§ SPI_TX_NOT_FULL

#define SPI_TX_NOT_FULL SPI_STA_TNF_NOT_FULL

Transmit FIFO not full.

§ SPI_TX_EMPTY

#define SPI_TX_EMPTY SPI_STA_TFE_EMPTY

Transmit FIFO empty.

§ SPI_STATUS_MASK

#define SPI_STATUS_MASK 0x0000001F

Mask for bits above.

Referenced by SPIStatus().

§ SPI_FRF_MOTO_MODE_0

#define SPI_FRF_MOTO_MODE_0 (SPI_CTL0_FRF_MOTOROLA_3WIRE | SPI_CTL0_SPO_LO | SPI_CTL0_SPH_FIRST)

Motorola format 3-wire, polarity 0, phase 0.

§ SPI_FRF_MOTO_MODE_1

#define SPI_FRF_MOTO_MODE_1 (SPI_CTL0_FRF_MOTOROLA_3WIRE | SPI_CTL0_SPO_LO | SPI_CTL0_SPH_SECOND)

Motorola format 3-wire, polarity 0, phase 1.

§ SPI_FRF_MOTO_MODE_2

#define SPI_FRF_MOTO_MODE_2 (SPI_CTL0_FRF_MOTOROLA_3WIRE | SPI_CTL0_SPO_HI | SPI_CTL0_SPH_FIRST)

Motorola format 3-wire, polarity 1, phase 0.

§ SPI_FRF_MOTO_MODE_3

#define SPI_FRF_MOTO_MODE_3 (SPI_CTL0_FRF_MOTOROLA_3WIRE | SPI_CTL0_SPO_HI | SPI_CTL0_SPH_SECOND)

Motorola format 3-wire, polarity 1, phase 1.

§ SPI_FRF_MOTO_MODE_4

#define SPI_FRF_MOTO_MODE_4 (SPI_CTL0_FRF_MOTOROLA_4WIRE | SPI_CTL0_SPO_LO | SPI_CTL0_SPH_FIRST)

Motorola format 4-wire, polarity 0, phase 0.

§ SPI_FRF_MOTO_MODE_5

#define SPI_FRF_MOTO_MODE_5 (SPI_CTL0_FRF_MOTOROLA_4WIRE | SPI_CTL0_SPO_LO | SPI_CTL0_SPH_SECOND)

Motorola format 4-wire, polarity 0, phase 1.

§ SPI_FRF_MOTO_MODE_6

#define SPI_FRF_MOTO_MODE_6 (SPI_CTL0_FRF_MOTOROLA_4WIRE | SPI_CTL0_SPO_HI | SPI_CTL0_SPH_FIRST)

Motorola format 4-wire, polarity 1, phase 0.

§ SPI_FRF_MOTO_MODE_7

#define SPI_FRF_MOTO_MODE_7 (SPI_CTL0_FRF_MOTOROLA_4WIRE | SPI_CTL0_SPO_HI | SPI_CTL0_SPH_SECOND)

Motorola format 4-wire, polarity 1, phase 1.

§ SPI_FRF_TI

#define SPI_FRF_TI SPI_CTL0_FRF_TI_SYNC

TI Sync frame format.

§ SPI_FRF_NMW

#define SPI_FRF_NMW SPI_CTL0_FRF_MIRCOWIRE

MicroWire frame format.

§ SPI_MODE_CONTROLLER

#define SPI_MODE_CONTROLLER SPI_CTL1_MS_CONTROLLER

SPI controller.

§ SPI_MODE_PERIPHERAL

#define SPI_MODE_PERIPHERAL SPI_CTL1_MS_PERIPHERAL

SPI peripheral.

§ SPI_MODE_PERIPHERAL_OD

#define SPI_MODE_PERIPHERAL_OD SPI_CTL1_SOD_ENABLE

output disabled

SPI peripheral with POCI

§ SPI_DMA_TX

#define SPI_DMA_TX SPI_DMACR_TXEN

Enable DMA for transmit.

§ SPI_DMA_RX

#define SPI_DMA_RX SPI_DMACR_RXEN

Enable DMA for receive.

Function Documentation

§ SPIConfigSetExpClk()

void SPIConfigSetExpClk	(	uint32_t	base,
		uint32_t	spiClk,
		uint32_t	protocol,
		uint32_t	mode,
		uint32_t	bitRate,
		uint32_t	dataWidth
	)

Configures the serial peripheral port.

This function configures the serial peripheral port. It sets the SPI protocol, mode of operation, bit rate, and data width.

The protocol parameter defines the data frame format. The Motorola frame formats imply the following polarity and phase configurations:

Polarity Phase   Motorola Protocol                  Mode
  0       0           3-wire                SPI_FRF_MOTO_MODE_0
  0       1           3-wire                SPI_FRF_MOTO_MODE_1
  1       0           3-wire                SPI_FRF_MOTO_MODE_2
  1       1           3-wire                SPI_FRF_MOTO_MODE_3
  0       0           4-wire                SPI_FRF_MOTO_MODE_4
  0       1           4-wire                SPI_FRF_MOTO_MODE_5
  1       0           4-wire                SPI_FRF_MOTO_MODE_6
  1       1           4-wire                SPI_FRF_MOTO_MODE_7

The mode parameter defines the operating mode of the SPI module. The SPI module can operate as a controller or peripheral; if a peripheral, the SPI can be configured to disable output on its serial output line.

The bitRate parameter defines the bit rate for the SPI.

The dataWidth parameter defines the width of the data transfers, and can be a value between 4 and 32, for controller mode, and 7 to 32, in peripheral mode.

Note: The peripheral clock is not necessarily the same as the processor clock. The frequency of the peripheral clock is set by the system control.

Parameters

base	specifies the SPI module base address.
spiClk	is the rate of the clock supplied to the SPI module.
protocol	specifies the data transfer protocol. The parameter can be one of the following values: SPI_FRF_MOTO_MODE_0 SPI_FRF_MOTO_MODE_1 SPI_FRF_MOTO_MODE_2 SPI_FRF_MOTO_MODE_3 SPI_FRF_MOTO_MODE_4 SPI_FRF_MOTO_MODE_5 SPI_FRF_MOTO_MODE_6 SPI_FRF_MOTO_MODE_7 SPI_FRF_TI SPI_FRF_NMW.
mode	specifies the mode of operation. The parameter can be one of the following values: SPI_MODE_CONTROLLER SPI_MODE_PERIPHERAL SPI_MODE_PERIPHERAL_OD
bitRate	specifies the clock rate.
dataWidth	specifies number of bits transferred per frame. Must be a value between 4 and 16 for controller mode, and 7 to 16 in peripheral mode.

Returns: None

References ASSERT, DSAMPLE_HIGH_BITRATE, DSAMPLE_MED_BITRATE, SPI_CLKCFG1_DSAMPLE_S, and SPIConfig().

§ SPIEnable()

__STATIC_INLINE void SPIEnable ( uint32_t base )

Enables the serial peripheral port.

This function enables operation of the serial peripheral port. The serial peripheral port must be configured before it is enabled.

Parameters

base	specifies the SPI module base address.

Returns: None

References ASSERT, HWREG, SPI_CTL1_EN_EN, and SPI_O_CTL1.

§ SPIDisable()

__STATIC_INLINE void SPIDisable ( uint32_t base )

Disables the serial peripheral port.

This function disables operation of the serial peripheral port.

Parameters

base	specifies the SPI module base address.

Returns: None

References ASSERT, HWREG, SPI_CTL1_EN_EN, SPI_O_CTL1, SPIGetData(), SPIGetDataNonBlocking(), SPIPutData(), and SPIPutDataNonBlocking().

§ SPIPutData()

void SPIPutData	(	uint32_t	base,
		uint32_t	data
	)

Puts a data element into the SPI transmit FIFO.

This function places the supplied data into the transmit FIFO of the specified SPI module.

Note: The upper 32 - N bits of the data are discarded by the hardware, where N is the data width as configured by SPIConfigSetExpClk(). For example, if the interface is configured for 8-bit data width, the upper 24 bits of data are discarded.

Parameters

base	specifies the SPI module base address.
data	is the data to be transmitted over the SPI interface.

Returns: None

References ASSERT, HWREG, SPI_O_STA, SPI_O_TXDATA, and SPI_STA_TNF_NOT_FULL.

Referenced by SPIDisable().

§ SPIPutDataNonBlocking()

int32_t SPIPutDataNonBlocking	(	uint32_t	base,
		uint32_t	data
	)

Puts a data element into the SPI transmit FIFO.

This function places the supplied data into the transmit FIFO of the specified SPI module. If there is no space in the FIFO, then this function returns a zero.

Note: The upper 32 - N bits of the data are discarded by the hardware, where N is the data width as configured by SPIConfigSetExpClk(). For example, if the interface is configured for 8-bit data width, the upper 24 bits of data are discarded.

Parameters

base	specifies the SPI module base address.
data	is the data to be transmitted over the SPI interface.

Returns: Returns the number of elements written to the SPI transmit FIFO.

References ASSERT, HWREG, SPI_O_STA, SPI_O_TXDATA, and SPI_STA_TNF_NOT_FULL.

Referenced by SPIDisable().

§ SPIGetData()

void SPIGetData	(	uint32_t	base,
		uint32_t *	data
	)

Gets a data element from the SPI receive FIFO.

This function gets received data from the receive FIFO of the specified SPI module and places that data into the location specified by the data parameter.

Note: Only the lower N bits of the value written to data contain valid data, where N is the data width as configured by SPIConfigSetExpClk(). For example, if the interface is configured for 8-bit data width, only the lower 8 bits of the value written to data contain valid data.

Parameters

base	specifies the SPI module base address.
data	is a pointer to a storage location for data that was received over the SPI interface.

Returns: None

References ASSERT, HWREG, SPI_O_RXDATA, SPI_O_STA, and SPI_STA_RFE_EMPTY.

Referenced by SPIDisable().

§ SPIGetDataNonBlocking()

int32_t SPIGetDataNonBlocking	(	uint32_t	base,
		uint32_t *	data
	)

Gets a data element from the SPI receive FIFO.

This function gets received data from the receive FIFO of the specified SPI module and places that data into the location specified by the data parameter. If there is no data in the FIFO, then this function returns a zero.

Note: Only the lower N bits of the value written to data contain valid data, where N is the data width as configured by SPIConfigSetExpClk(). For example, if the interface is configured for 8-bit data width, only the lower 8 bits of the value written to data contain valid data.

Parameters

base	specifies the SPI module base address.
data	is a pointer to a storage location for data that was received over the SPI interface.

Returns: Returns the number of elements read from the SPI receive FIFO.

References ASSERT, HWREG, SPI_O_RXDATA, SPI_O_STA, and SPI_STA_RFE_EMPTY.

Referenced by SPIDisable().

§ SPIBusy()

__STATIC_INLINE bool SPIBusy ( uint32_t base )

Determines whether the SPI transmitter is busy or not.

Allows the caller to determine whether all transmitted bytes have cleared the transmitter hardware. If false is returned, then the transmit FIFO is empty and all bits of the last transmitted word have left the hardware shift register.

Parameters

base	is the base address of the SPI port.

Returns

Returns status of the SPI transmit buffer.

true : SPI is transmitting.
false : SPI transmissions are complete.

References ASSERT, HWREG, SPI_O_STA, and SPI_STA_BUSY.

§ SPIStatus()

__STATIC_INLINE uint32_t SPIStatus ( uint32_t base )

Get the status of the SPI data buffers.

This function is used to poll the status of the internal FIFOs in the SPI module. The status of both TX and RX FIFO is returned.

Parameters

base	specifies the SPI module base address.

Returns

Returns the current status of the internal SPI data buffers. The status is a bitwise OR'ed combination of:

SPI_BUSY : Busy
SPI_RX_NOT_FULL : Receive FIFO not full
SPI_RX_EMPTY : Receive FIFO empty
SPI_TX_NOT_FULL : Transmit FIFO not full
SPI_TX_EMPTY : Transmit FIFO empty

References ASSERT, HWREG, SPI_O_STA, SPI_STATUS_MASK, SPIRegisterInt(), and SPIUnregisterInt().

§ SPIRegisterInt()

void SPIRegisterInt	(	uint32_t	base,
		void(*)(void)	pfnHandler
	)

Registers an interrupt handler for the Serial Peripheral Interface in the dynamic interrupt table.

Note: Only use this function if you want to use the dynamic vector table (in SRAM)!

This function registers a function as the interrupt handler for a specific interrupt and enables the corresponding interrupt in the interrupt controller.

Specific SPI interrupts must be enabled via SPIEnableInt(). If necessary, it is the interrupt handler's responsibility to clear the interrupt source via SPIClearInt().

Parameters

base	specifies the SPI module base address.
pfnHandler	is a pointer to the function to be called when the serial peripheral port interrupt occurs.

Returns: None

See also: IntRegister() for important information about registering interrupt handlers.

References ASSERT, INT_SPI0_COMB, IntEnable(), and IntRegister().

Referenced by SPIStatus().

§ SPIUnregisterInt()

void SPIUnregisterInt ( uint32_t base )

Unregisters an interrupt handler for the Serial Peripheral Interface in the dynamic interrupt table.

This function will clear the handler to be called when a SPI interrupt occurs. This will also mask off the interrupt in the interrupt controller so that the interrupt handler no longer is called.

Parameters

base	specifies the SPI module base address.

Returns: None

See also: IntRegister() for important information about registering interrupt handlers.

References ASSERT, INT_SPI0_COMB, IntDisable(), and IntUnregister().

Referenced by SPIStatus().

§ SPIEnableInt()

__STATIC_INLINE void SPIEnableInt	(	uint32_t	base,
		uint32_t	intFlags
	)

Enables individual SPI interrupt sources.

Enables the indicated SPI interrupt sources. Only the sources that are enabled can be reflected to the processor interrupt; disabled sources have no effect on the processor.

Parameters

base	specifies the SPI module base address.
intFlags	is a bit mask of the interrupt sources to be enabled. SPI_DMA_DONE_TX SPI_DMA_DONE_RX SPI_IDLE SPI_TXEMPTY SPI_TX SPI_RX SPI_RTOUT SPI_PER SPI_RXFIFO_OVF

Returns: None

References ASSERT, HWREG, and SPI_O_IMASK.

§ SPIDisableInt()

__STATIC_INLINE void SPIDisableInt	(	uint32_t	base,
		uint32_t	intFlags
	)

Disables individual SPI interrupt sources.

Disables the indicated SPI interrupt sources.

Parameters

base	specifies the SPI module base address.
intFlags	is a bit mask of the interrupt sources to be disabled. SPI_DMA_DONE_TX SPI_DMA_DONE_RX SPI_IDLE SPI_TXEMPTY SPI_TX SPI_RX SPI_RTOUT SPI_PER SPI_RXFIFO_OVF

Returns: None

References ASSERT, HWREG, and SPI_O_IMASK.

§ SPIClearInt()

__STATIC_INLINE void SPIClearInt	(	uint32_t	base,
		uint32_t	intFlags
	)

Clears SPI interrupt sources.

The specified SPI interrupt sources are cleared so that they no longer assert. This function must be called in the interrupt handler to keep the interrupts from being recognized again immediately upon exit.

Note

Due to write buffers and synchronizers in the system it may take several clock cycles from a register write clearing an event in a module and until the event is actually cleared in the NVIC of the system CPU. It is recommended to clear the event source early in the interrupt service routine (ISR) to allow the event clear to propagate to the NVIC before returning from the ISR. At the same time, an early event clear allows new events of the same type to be pended instead of ignored if the event is cleared later in the ISR. It is the responsibility of the programmer to make sure that enough time has passed before returning from the ISR to avoid false re-triggering of the cleared event. A simple, although not necessarily optimal, way of clearing an event before returning from the ISR is:

Write to clear event (interrupt source). (buffered write)
Dummy read from the event source module. (making sure the write has propagated)
Wait two system CPU clock cycles (user code or two NOPs), (allowing cleared event to propagate through any synchronizers)

Parameters

base	specifies the SPI module base address.
intFlags	is a bit mask of the interrupt sources to be cleared. The parameter can consist of either or both of: SPI_DMA_DONE_TX SPI_DMA_DONE_RX SPI_IDLE SPI_TXEMPTY SPI_TX SPI_RX SPI_RTOUT SPI_PER SPI_RXFIFO_OVF

Returns: None

References ASSERT, HWREG, and SPI_O_ICLR.

§ SPIIntStatus()

__STATIC_INLINE uint32_t SPIIntStatus	(	uint32_t	base,
		bool	isMasked
	)

Gets the current interrupt status.

This function returns the interrupt status for the SPI module. Either the raw interrupt status or the status of interrupts that are allowed to reflect to the processor can be returned.

Parameters

base	specifies the SPI module base address.
isMasked	selects either raw or masked interrupt. `false` : Raw interrupt status is required. `true` : Masked interrupt status is required.

Returns

Returns the current interrupt status as an OR'ed combination of:

References ASSERT, HWREG, SPI_O_MIS, and SPI_O_RIS.

§ SPIEnableDMA()

__STATIC_INLINE void SPIEnableDMA	(	uint32_t	base,
		uint32_t	dmaFlags
	)

Enable SPI DMA operation.

The specified SPI DMA features are enabled. The SPI can be configured to use DMA for transmit and/or receive data transfers.

Note: The uDMA controller must also be set up before DMA can be used with the SPI.

Parameters

base	is the base address of the SPI port.
dmaFlags	is a bit mask of the DMA features to enable. The parameter is the bitwise OR of any of the following values: SPI_DMA_RX : Enable DMA for receive. SPI_DMA_TX : Enable DMA for transmit.

Returns: None

References ASSERT, HWREG, and SPI_O_DMACR.

§ SPIDisableDMA()

__STATIC_INLINE void SPIDisableDMA	(	uint32_t	base,
		uint32_t	dmaFlags
	)

Disable SPI DMA operation.

This function is used to disable SPI DMA features that were enabled by SPIEnableDMA(). The specified SPI DMA features are disabled.

Parameters

base	is the base address of the SPI port.
dmaFlags	is a bit mask of the DMA features to disable. The parameter is the bitwise OR of any of the following values: SPI_DMA_RX : Disable DMA for receive. SPI_DMA_TX : Disable DMA for transmit.

Returns: None

References ASSERT, HWREG, and SPI_O_DMACR.

Macros

Functions

Detailed Description

Macro Definition Documentation

§ SPI_DMA_DONE_TX

§ SPI_DMA_DONE_RX

§ SPI_IDLE

§ SPI_TXEMPTY

§ SPI_TX

§ SPI_RX

§ SPI_RTOUT

§ SPI_PER

§ SPI_RXFIFO_OVF

§ SPI_BUSY

§ SPI_RX_NOT_FULL

§ SPI_RX_EMPTY

§ SPI_TX_NOT_FULL

§ SPI_TX_EMPTY

§ SPI_STATUS_MASK

§ SPI_FRF_MOTO_MODE_0

§ SPI_FRF_MOTO_MODE_1

§ SPI_FRF_MOTO_MODE_2

§ SPI_FRF_MOTO_MODE_3

§ SPI_FRF_MOTO_MODE_4

§ SPI_FRF_MOTO_MODE_5

§ SPI_FRF_MOTO_MODE_6

§ SPI_FRF_MOTO_MODE_7

§ SPI_FRF_TI

§ SPI_FRF_NMW

§ SPI_MODE_CONTROLLER

§ SPI_MODE_PERIPHERAL

§ SPI_MODE_PERIPHERAL_OD

§ SPI_DMA_TX

§ SPI_DMA_RX

Function Documentation

§ SPIConfigSetExpClk()

§ SPIEnable()

§ SPIDisable()

§ SPIPutData()

§ SPIPutDataNonBlocking()

§ SPIGetData()

§ SPIGetDataNonBlocking()

§ SPIBusy()

§ SPIStatus()

§ SPIRegisterInt()

§ SPIUnregisterInt()

§ SPIEnableInt()

§ SPIDisableInt()

§ SPIClearInt()

§ SPIIntStatus()

§ SPIEnableDMA()

§ SPIDisableDMA()