49 #ifndef ti_drivers_uart2_UART2CC32XX__include 50 #define ti_drivers_uart2_UART2CC32XX__include 56 #include <ti/drivers/dpl/HwiP.h> 57 #include <ti/drivers/dpl/SemaphoreP.h> 73 #define UART2CC32XX_PIN_UNASSIGNED 0xFFF 81 #define UART2CC32XX_DMACH_UNASSIGNED 0xFF 93 #define UART2CC32XX_PIN_01_UART1_TX 0x700 94 #define UART2CC32XX_PIN_02_UART1_RX 0x701 95 #define UART2CC32XX_PIN_03_UART0_TX 0x702 96 #define UART2CC32XX_PIN_04_UART0_RX 0x703 97 #define UART2CC32XX_PIN_07_UART1_TX 0x506 98 #define UART2CC32XX_PIN_08_UART1_RX 0x507 99 #define UART2CC32XX_PIN_16_UART1_TX 0x20F 100 #define UART2CC32XX_PIN_17_UART1_RX 0x210 101 #define UART2CC32XX_PIN_45_UART0_RX 0x92C 102 #define UART2CC32XX_PIN_45_UART1_RX 0x22C 103 #define UART2CC32XX_PIN_53_UART0_TX 0x934 104 #define UART2CC32XX_PIN_55_UART0_TX 0x336 105 #define UART2CC32XX_PIN_55_UART1_TX 0x636 106 #define UART2CC32XX_PIN_57_UART0_RX 0x338 107 #define UART2CC32XX_PIN_57_UART1_RX 0x638 108 #define UART2CC32XX_PIN_58_UART1_TX 0x639 109 #define UART2CC32XX_PIN_59_UART1_RX 0x63A 110 #define UART2CC32XX_PIN_62_UART0_TX 0xB3D 115 #define UART2CC32XX_PIN_50_UART0_CTS 0xC31 116 #define UART2CC32XX_PIN_50_UART0_RTS 0x331 117 #define UART2CC32XX_PIN_50_UART1_RTS 0xA31 118 #define UART2CC32XX_PIN_52_UART0_RTS 0x633 119 #define UART2CC32XX_PIN_61_UART0_RTS 0x53C 120 #define UART2CC32XX_PIN_61_UART0_CTS 0x63C 121 #define UART2CC32XX_PIN_61_UART1_CTS 0x33C 122 #define UART2CC32XX_PIN_62_UART0_RTS 0xA3D 123 #define UART2CC32XX_PIN_62_UART1_RTS 0x33D Power_NotifyObj postNotify
Definition: UART2CC32XX.h:232
struct UART2CC32XX_Object * UART2CC32XX_Handle
Definition: UART2CC32XX.h:136
Definition: UART2CC32XX.h:137
UART2_BASE_OBJECT UDMACC32XX_Handle udmaHandle
Definition: UART2CC32XX.h:229
Definition: UART2CC32XX.h:134
PRELIMINARY UART driver interface
Definition: UART2CC32XX.h:135
UART2_BASE_HWATTRS UART2CC32XX_FifoThreshold txIntFifoThr
Definition: UART2CC32XX.h:212
uDMA driver implementation for CC32XX.
UART2CC32XX_FifoThreshold
UART TX/RX interrupt FIFO threshold select.
Definition: UART2CC32XX.h:133
UART2CC32XX Hardware attributes.
Definition: UART2CC32XX.h:208
UDMACC32XX Global configuration.
Definition: UDMACC32XX.h:125
Power manager interface for the CC32XX.
UART2CC32XX Object.
Definition: UART2CC32XX.h:226
PowerCC32XX_ParkState prevParkRTS
Definition: UART2CC32XX.h:235
uint32_t txDmaChannel
Definition: UART2CC32XX.h:218
uint16_t rtsPin
Definition: UART2CC32XX.h:236
uint32_t rxDmaChannel
Definition: UART2CC32XX.h:216
Power notify object structure.
Definition: Power.h:443
Definition: UART2CC32XX.h:138
uint16_t txPin
Definition: UART2CC32XX.h:234
PowerCC32XX_ParkState prevParkTX
Definition: UART2CC32XX.h:233
UART2CC32XX_FifoThreshold rxIntFifoThr
Definition: UART2CC32XX.h:214
PowerCC32XX_ParkState
Enumeration of states a pin can be parked in.
Definition: PowerCC32XX.h:393