UART2CC32XX.h
Go to the documentation of this file.
1 /*
2  * Copyright (c) 2020, Texas Instruments Incorporated
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  *
9  * * Redistributions of source code must retain the above copyright
10  * notice, this list of conditions and the following disclaimer.
11  *
12  * * Redistributions in binary form must reproduce the above copyright
13  * notice, this list of conditions and the following disclaimer in the
14  * documentation and/or other materials provided with the distribution.
15  *
16  * * Neither the name of Texas Instruments Incorporated nor the names of
17  * its contributors may be used to endorse or promote products derived
18  * from this software without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
24  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
25  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
26  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
27  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
28  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
29  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
30  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  */
49 #ifndef ti_drivers_uart2_UART2CC32XX__include
50 #define ti_drivers_uart2_UART2CC32XX__include
51 
52 #include <stddef.h>
53 #include <stdint.h>
54 #include <stdbool.h>
55 
56 #include <ti/drivers/dpl/HwiP.h>
57 #include <ti/drivers/dpl/SemaphoreP.h>
59 #include <ti/drivers/UART2.h>
61 #include <ti/drivers/Power.h>
62 
63 #ifdef __cplusplus
64 extern "C" {
65 #endif
66 
73 #define UART2CC32XX_PIN_UNASSIGNED 0xFFF
74 
81 #define UART2CC32XX_DMACH_UNASSIGNED 0xFF
82 
83 /*
84  * The bits in the pin mode macros are as follows:
85  * The lower 8 bits of the macro refer to the pin, offset by 1, to match
86  * driverlib pin defines. For example, UART2CC32XX_PIN_01_UART1_TX & 0xff = 0,
87  * which equals PIN_01 in driverlib pin.h. By matching the PIN_xx defines in
88  * driverlib pin.h, we can pass the pin directly to the driverlib functions.
89  * The upper 8 bits of the macro correspond to the pin mux confg mode
90  * value for the pin to operate in the UART mode. For example, pin 1 is
91  * configured with mode 7 to operate as UART1 TX.
92  */
93 #define UART2CC32XX_PIN_01_UART1_TX 0x700
94 #define UART2CC32XX_PIN_02_UART1_RX 0x701
95 #define UART2CC32XX_PIN_03_UART0_TX 0x702
96 #define UART2CC32XX_PIN_04_UART0_RX 0x703
97 #define UART2CC32XX_PIN_07_UART1_TX 0x506
98 #define UART2CC32XX_PIN_08_UART1_RX 0x507
99 #define UART2CC32XX_PIN_16_UART1_TX 0x20F
100 #define UART2CC32XX_PIN_17_UART1_RX 0x210
101 #define UART2CC32XX_PIN_45_UART0_RX 0x92C
102 #define UART2CC32XX_PIN_45_UART1_RX 0x22C
103 #define UART2CC32XX_PIN_53_UART0_TX 0x934
104 #define UART2CC32XX_PIN_55_UART0_TX 0x336
105 #define UART2CC32XX_PIN_55_UART1_TX 0x636
106 #define UART2CC32XX_PIN_57_UART0_RX 0x338
107 #define UART2CC32XX_PIN_57_UART1_RX 0x638
108 #define UART2CC32XX_PIN_58_UART1_TX 0x639
109 #define UART2CC32XX_PIN_59_UART1_RX 0x63A
110 #define UART2CC32XX_PIN_62_UART0_TX 0xB3D
112 /*
113  * Flow control pins.
114  */
115 #define UART2CC32XX_PIN_50_UART0_CTS 0xC31
116 #define UART2CC32XX_PIN_50_UART0_RTS 0x331
117 #define UART2CC32XX_PIN_50_UART1_RTS 0xA31
118 #define UART2CC32XX_PIN_52_UART0_RTS 0x633
119 #define UART2CC32XX_PIN_61_UART0_RTS 0x53C
120 #define UART2CC32XX_PIN_61_UART0_CTS 0x63C
121 #define UART2CC32XX_PIN_61_UART1_CTS 0x33C
122 #define UART2CC32XX_PIN_62_UART0_RTS 0xA3D
123 #define UART2CC32XX_PIN_62_UART1_RTS 0x33D
133 typedef enum {
140 
208 typedef struct {
209  UART2_BASE_HWATTRS
210 
216  uint32_t rxDmaChannel;
218  uint32_t txDmaChannel;
220 
226 typedef struct {
227  UART2_BASE_OBJECT
228 
229  UDMACC32XX_Handle udmaHandle; /* For setting power dependency */
230 
231  /* For Power management */
233  PowerCC32XX_ParkState prevParkTX; /* Previous park state TX pin */
234  uint16_t txPin; /* TX pin ID */
235  PowerCC32XX_ParkState prevParkRTS; /* Previous park state of RTS pin */
236  uint16_t rtsPin; /* RTS pin ID */
238 
239 #ifdef __cplusplus
240 }
241 #endif
242 
243 #endif /* ti_drivers_uart2_UART2CC32XX__include */
Power_NotifyObj postNotify
Definition: UART2CC32XX.h:232
struct UART2CC32XX_Object * UART2CC32XX_Handle
Definition: UART2CC32XX.h:136
Definition: UART2CC32XX.h:137
UART2_BASE_OBJECT UDMACC32XX_Handle udmaHandle
Definition: UART2CC32XX.h:229
Definition: UART2CC32XX.h:134
PRELIMINARY UART driver interface
Power Manager.
Definition: UART2CC32XX.h:135
UART2_BASE_HWATTRS UART2CC32XX_FifoThreshold txIntFifoThr
Definition: UART2CC32XX.h:212
uDMA driver implementation for CC32XX.
UART2CC32XX_FifoThreshold
UART TX/RX interrupt FIFO threshold select.
Definition: UART2CC32XX.h:133
UART2CC32XX Hardware attributes.
Definition: UART2CC32XX.h:208
UDMACC32XX Global configuration.
Definition: UDMACC32XX.h:125
Power manager interface for the CC32XX.
UART2CC32XX Object.
Definition: UART2CC32XX.h:226
PowerCC32XX_ParkState prevParkRTS
Definition: UART2CC32XX.h:235
uint32_t txDmaChannel
Definition: UART2CC32XX.h:218
uint16_t rtsPin
Definition: UART2CC32XX.h:236
uint32_t rxDmaChannel
Definition: UART2CC32XX.h:216
Power notify object structure.
Definition: Power.h:443
Definition: UART2CC32XX.h:138
uint16_t txPin
Definition: UART2CC32XX.h:234
PowerCC32XX_ParkState prevParkTX
Definition: UART2CC32XX.h:233
UART2CC32XX_FifoThreshold rxIntFifoThr
Definition: UART2CC32XX.h:214
PowerCC32XX_ParkState
Enumeration of states a pin can be parked in.
Definition: PowerCC32XX.h:393
© Copyright 1995-2021, Texas Instruments Incorporated. All rights reserved.
Trademarks | Privacy policy | Terms of use | Terms of sale