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UART driver implementation for a CC32XX UART controller.
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The UART header file should be included in an application as follows:
Refer to UART2.h for a complete description of APIs and examples of use.
#include <stddef.h>#include <stdint.h>#include <stdbool.h>#include <ti/drivers/dpl/HwiP.h>#include <ti/drivers/dpl/SemaphoreP.h>#include <ti/drivers/power/PowerCC32XX.h>#include <ti/drivers/UART2.h>#include <ti/drivers/dma/UDMACC32XX.h>#include <ti/drivers/Power.h>
Go to the source code of this file.
Data Structures | |
| struct | UART2CC32XX_HWAttrs |
| UART2CC32XX Hardware attributes. More... | |
| struct | UART2CC32XX_Object |
| UART2CC32XX Object. More... | |
Typedefs | |
| typedef struct UART2CC32XX_Object * | UART2CC32XX_Handle |
Enumerations | |
| enum | UART2CC32XX_FifoThreshold { UART2CC32XX_FIFO_THRESHOLD_1_8 = 0, UART2CC32XX_FIFO_THRESHOLD_2_8 = 1, UART2CC32XX_FIFO_THRESHOLD_4_8 = 2, UART2CC32XX_FIFO_THRESHOLD_6_8 = 3, UART2CC32XX_FIFO_THRESHOLD_7_8 = 4 } |
| UART TX/RX interrupt FIFO threshold select. More... | |
| #define UART2CC32XX_PIN_UNASSIGNED 0xFFF |
Indicates a pin is not being used.
If hardware flow control is not being used, the UART CTS and RTS pins should be set to UART2CC32XX_PIN_UNASSIGNED.
| #define UART2CC32XX_DMACH_UNASSIGNED 0xFF |
Indicates a DMA channel is not being used.
If DMA is not being used, the UART rxDmaChannel and txDmaChannel should be set to UART2CC32XX_DMACH_UNASSIGNED.
| #define UART2CC32XX_PIN_01_UART1_TX 0x700 |
PIN 1 is used for UART1 TX
| #define UART2CC32XX_PIN_02_UART1_RX 0x701 |
PIN 2 is used for UART1 RX
| #define UART2CC32XX_PIN_03_UART0_TX 0x702 |
PIN 3 is used for UART0 TX
| #define UART2CC32XX_PIN_04_UART0_RX 0x703 |
PIN 4 is used for UART0 RX
| #define UART2CC32XX_PIN_07_UART1_TX 0x506 |
PIN 7 is used for UART1 TX
| #define UART2CC32XX_PIN_08_UART1_RX 0x507 |
PIN 8 is used for UART1 RX
| #define UART2CC32XX_PIN_16_UART1_TX 0x20F |
PIN 16 is used for UART1 TX
| #define UART2CC32XX_PIN_17_UART1_RX 0x210 |
PIN 17 is used for UART1 RX
| #define UART2CC32XX_PIN_45_UART0_RX 0x92C |
PIN 45 is used for UART0 RX
| #define UART2CC32XX_PIN_45_UART1_RX 0x22C |
PIN 45 is used for UART1 RX
| #define UART2CC32XX_PIN_53_UART0_TX 0x934 |
PIN 53 is used for UART0 TX
| #define UART2CC32XX_PIN_55_UART0_TX 0x336 |
PIN 55 is used for UART0 TX
| #define UART2CC32XX_PIN_55_UART1_TX 0x636 |
PIN 55 is used for UART1 TX
| #define UART2CC32XX_PIN_57_UART0_RX 0x338 |
PIN 57 is used for UART0 RX
| #define UART2CC32XX_PIN_57_UART1_RX 0x638 |
PIN 57 is used for UART1 RX
| #define UART2CC32XX_PIN_58_UART1_TX 0x639 |
PIN 58 is used for UART1 TX
| #define UART2CC32XX_PIN_59_UART1_RX 0x63A |
PIN 59 is used for UART1 RX
| #define UART2CC32XX_PIN_62_UART0_TX 0xB3D |
PIN 62 is used for UART0 TX
| #define UART2CC32XX_PIN_50_UART0_CTS 0xC31 |
PIN 50 is used for UART0 CTS
| #define UART2CC32XX_PIN_50_UART0_RTS 0x331 |
PIN 50 is used for UART0 RTS
| #define UART2CC32XX_PIN_50_UART1_RTS 0xA31 |
PIN 50 is used for UART1 RTS
| #define UART2CC32XX_PIN_52_UART0_RTS 0x633 |
PIN 52 is used for UART0 RTS
| #define UART2CC32XX_PIN_61_UART0_RTS 0x53C |
PIN 61 is used for UART0 RTS
| #define UART2CC32XX_PIN_61_UART0_CTS 0x63C |
PIN 61 is used for UART0 CTS
| #define UART2CC32XX_PIN_61_UART1_CTS 0x33C |
PIN 61 is used for UART1 CTS
| #define UART2CC32XX_PIN_62_UART0_RTS 0xA3D |
PIN 62 is used for UART0 RTS
| #define UART2CC32XX_PIN_62_UART1_RTS 0x33D |
PIN 62 is used for UART1 RTS
| typedef struct UART2CC32XX_Object * UART2CC32XX_Handle |
UART TX/RX interrupt FIFO threshold select.
Defined FIFO thresholds for generation of both TX interrupt and RX interrupt. If the RX and TX FIFO and thresholds are not set in the HwAttrs, the RX interrupt FIFO threshold is set to 1/8 full, and the TX interrupt FIFO threshold is set to 1/8 full.