CC26xx Driver Library
[timer.h] Timer

Functions

static void TimerEnable (uint32_t ui32Base, uint32_t ui32Timer)
 Enables the timer(s). More...
 
static void TimerDisable (uint32_t ui32Base, uint32_t ui32Timer)
 Disables the timer(s). More...
 
void TimerConfigure (uint32_t ui32Base, uint32_t ui32Config)
 Configures the timer(s). More...
 
void TimerLevelControl (uint32_t ui32Base, uint32_t ui32Timer, bool bInvert)
 Controls the output level. More...
 
static void TimerEventControl (uint32_t ui32Base, uint32_t ui32Timer, uint32_t ui32Event)
 Controls the event type. More...
 
void TimerStallControl (uint32_t ui32Base, uint32_t ui32Timer, bool bStall)
 Controls the stall handling. More...
 
void TimerWaitOnTriggerControl (uint32_t ui32Base, uint32_t ui32Timer, bool bWait)
 Controls the wait on trigger handling. More...
 
static void TimerPrescaleSet (uint32_t ui32Base, uint32_t ui32Timer, uint32_t ui32Value)
 Set the timer prescale value. More...
 
static uint32_t TimerPrescaleGet (uint32_t ui32Base, uint32_t ui32Timer)
 Get the timer prescale value. More...
 
static void TimerPrescaleMatchSet (uint32_t ui32Base, uint32_t ui32Timer, uint32_t ui32Value)
 Set the timer prescale match value. More...
 
static uint32_t TimerPrescaleMatchGet (uint32_t ui32Base, uint32_t ui32Timer)
 Get the timer prescale match value. More...
 
static void TimerLoadSet (uint32_t ui32Base, uint32_t ui32Timer, uint32_t ui32Value)
 Sets the timer load value. More...
 
static uint32_t TimerLoadGet (uint32_t ui32Base, uint32_t ui32Timer)
 Gets the timer load value. More...
 
static uint32_t TimerValueGet (uint32_t ui32Base, uint32_t ui32Timer)
 Gets the current timer value. More...
 
static void TimerMatchSet (uint32_t ui32Base, uint32_t ui32Timer, uint32_t ui32Value)
 Sets the timer match value. More...
 
static uint32_t TimerMatchGet (uint32_t ui32Base, uint32_t ui32Timer)
 Gets the timer match value. More...
 
void TimerIntRegister (uint32_t ui32Base, uint32_t ui32Timer, void(*pfnHandler)(void))
 Registers an interrupt handler for the timer interrupt in the dynamic interrupt table. More...
 
void TimerIntUnregister (uint32_t ui32Base, uint32_t ui32Timer)
 Unregisters an interrupt handler for the timer interrupt in the dynamic interrupt table. More...
 
static void TimerIntEnable (uint32_t ui32Base, uint32_t ui32IntFlags)
 Enables individual timer interrupt sources. More...
 
static void TimerIntDisable (uint32_t ui32Base, uint32_t ui32IntFlags)
 Disables individual timer interrupt sources. More...
 
static uint32_t TimerIntStatus (uint32_t ui32Base, bool bMasked)
 Gets the current interrupt status. More...
 
static void TimerIntClear (uint32_t ui32Base, uint32_t ui32IntFlags)
 Clears timer interrupt sources. More...
 
static void TimerSynchronize (uint32_t ui32Base, uint32_t ui32Timers)
 Synchronizes the counters in a set of timers. More...
 
static void TimerCcpCombineEnable (uint32_t ui32Base)
 Enables AND'ing of the CCP outputs from Timer A and Timer B. More...
 
static void TimerCcpCombineDisable (uint32_t ui32Base)
 Disables AND'ing of the CCP outputs from Timer A and Timer B. More...
 
void TimerMatchUpdateMode (uint32_t ui32Base, uint32_t ui32Timer, uint32_t ui32Mode)
 Sets the Match Register Update mode. More...
 
void TimerIntervalLoadMode (uint32_t ui32Base, uint32_t ui32Timer, uint32_t ui32Mode)
 Sets the Interval Load mode. More...
 

Detailed Description

Introduction

The timer API provides a set of functions for using the general-purpose timer module.

The timer module contains four timer blocks with the following functional options:

Each timer block provides two half-width timers/counters that can be configured to operate independently as timers or event counters or to operate as a combined full-width timer. The timers provide 16-bit half-width timers and a 32-bit full-width timer. For the purposes of this API, the two half-width timers provided by a timer block are referred to as TimerA and TimerB, and the full-width timer is referred to as TimerA.

When in half-width mode, the timer can also be configured for event capture or as a pulse width modulation (PWM) generator. When configured for event capture, the timer acts as a counter. It can be configured to count either the time between events or the events themselves. The type of event being counted can be configured as a positive edge, a negative edge, or both edges. When a timer is configured as a PWM generator, the input signal used to capture events becomes an output signal, and the timer drives an edge-aligned pulse onto that signal.

Control is also provided over interrupt sources and events. Interrupts can be generated to indicate that an event has been captured, or that a certain number of events have been captured. Interrupts can also be generated when the timer has counted down to 0 or when the timer matches a certain value.

Timer configuration is handled by TimerConfigure(), which performs the high level setup of the timer module; that is, it is used to set up full- or half-width modes, and to select between PWM, capture, and timer operations.

API

The API functions can be grouped like this:

Functions to perform timer control:

Functions to manage timer content:

Functions to manage the interrupt handler for the timer interrupt:

The individual interrupt sources within the timer module are managed with:

Function Documentation

§ TimerCcpCombineDisable()

static void TimerCcpCombineDisable ( uint32_t  ui32Base)
inlinestatic

Disables AND'ing of the CCP outputs from Timer A and Timer B.

Parameters
ui32Baseis the base address of the timer module.
Returns
None
1054 {
1055  // Check the arguments
1056  ASSERT(TimerBaseValid(ui32Base));
1057 
1058  // Clear the bit
1059  HWREG(ui32Base + GPT_O_ANDCCP) &= ~(GPT_ANDCCP_CCP_AND_EN);
1060 }
#define ASSERT(expr)
Definition: debug.h:71
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§ TimerCcpCombineEnable()

static void TimerCcpCombineEnable ( uint32_t  ui32Base)
inlinestatic

Enables AND'ing of the CCP outputs from Timer A and Timer B.

Parameters
ui32Baseis the base address of the timer module.
Returns
None
1035 {
1036  // Check the arguments
1037  ASSERT(TimerBaseValid(ui32Base));
1038 
1039  // Set the bit
1040  HWREG(ui32Base + GPT_O_ANDCCP) |= GPT_ANDCCP_CCP_AND_EN;
1041 }
#define ASSERT(expr)
Definition: debug.h:71

§ TimerConfigure()

void TimerConfigure ( uint32_t  ui32Base,
uint32_t  ui32Config 
)

Configures the timer(s).

This function configures the operating mode of the timer(s). The timer module is disabled before being configured and is left in the disabled state.

The timers are comprised of two 16-bit timers that can operate independently or be concatenated to form a 32-bit timer.

Note
If the timers are used independently the length of timer can be extended to 24 bit by use of an 8 bit prescale register set using TimerPrescaleSet().

When configuring for full-width timer ui32Config is set as one of the following values:

When configuring for a pair of half-width timers, each timer is separately configured. The timers are configured by setting ui32Config to the bitwise OR of one of each of the following three:

Parameters
ui32Baseis the base address of the timer module.
ui32Configis the configuration for the timer.
Returns
None

Referenced by TimerDisable().

112 {
113  // Check the arguments.
114  ASSERT(TimerBaseValid(ui32Base));
115  ASSERT((ui32Config == TIMER_CFG_ONE_SHOT) ||
116  (ui32Config == TIMER_CFG_ONE_SHOT_UP) ||
117  (ui32Config == TIMER_CFG_PERIODIC) ||
118  (ui32Config == TIMER_CFG_PERIODIC_UP) ||
119  ((ui32Config & 0xFF000000) == TIMER_CFG_SPLIT_PAIR));
120  ASSERT(((ui32Config & 0xFF000000) != TIMER_CFG_SPLIT_PAIR) ||
121  ((((ui32Config & 0x000000FF) == TIMER_CFG_A_ONE_SHOT) ||
122  ((ui32Config & 0x000000FF) == TIMER_CFG_A_ONE_SHOT_UP) ||
123  ((ui32Config & 0x000000FF) == TIMER_CFG_A_PERIODIC) ||
124  ((ui32Config & 0x000000FF) == TIMER_CFG_A_PERIODIC_UP) ||
125  ((ui32Config & 0x000000FF) == TIMER_CFG_A_CAP_COUNT) ||
126  ((ui32Config & 0x000000FF) == TIMER_CFG_A_CAP_COUNT_UP) ||
127  ((ui32Config & 0x000000FF) == TIMER_CFG_A_CAP_TIME) ||
128  ((ui32Config & 0x000000FF) == TIMER_CFG_A_CAP_TIME_UP) ||
129  ((ui32Config & 0x000000FF) == TIMER_CFG_A_PWM)) &&
130  (((ui32Config & 0x0000FF00) == TIMER_CFG_B_ONE_SHOT) ||
131  ((ui32Config & 0x0000FF00) == TIMER_CFG_B_ONE_SHOT_UP) ||
132  ((ui32Config & 0x0000FF00) == TIMER_CFG_B_PERIODIC) ||
133  ((ui32Config & 0x0000FF00) == TIMER_CFG_B_PERIODIC_UP) ||
134  ((ui32Config & 0x0000FF00) == TIMER_CFG_B_CAP_COUNT) ||
135  ((ui32Config & 0x0000FF00) == TIMER_CFG_B_CAP_COUNT_UP) ||
136  ((ui32Config & 0x0000FF00) == TIMER_CFG_B_CAP_TIME) ||
137  ((ui32Config & 0x0000FF00) == TIMER_CFG_B_CAP_TIME_UP) ||
138  ((ui32Config & 0x0000FF00) == TIMER_CFG_B_PWM))));
139 
140  // Disable the timers.
141  HWREG(ui32Base + GPT_O_CTL) &= ~(GPT_CTL_TAEN | GPT_CTL_TBEN);
142 
143  // Set the global timer configuration.
144  HWREG(ui32Base + GPT_O_CFG) = ui32Config >> 24;
145 
146  // Set the configuration of the A and B timers. Note that the B timer
147  // configuration is ignored by the hardware in 32-bit modes.
148  HWREG(ui32Base + GPT_O_TAMR) = (ui32Config & 0xFF) | GPT_TAMR_TAPWMIE;
149  HWREG(ui32Base + GPT_O_TBMR) =
150  ((ui32Config >> 8) & 0xFF) | GPT_TBMR_TBPWMIE;
151 }
#define TIMER_CFG_SPLIT_PAIR
Definition: timer.h:100
#define TIMER_CFG_A_PWM
Definition: timer.h:109
#define TIMER_CFG_B_ONE_SHOT
Definition: timer.h:110
#define TIMER_CFG_A_ONE_SHOT_UP
Definition: timer.h:102
#define TIMER_CFG_A_CAP_TIME_UP
Definition: timer.h:108
#define TIMER_CFG_PERIODIC_UP
Definition: timer.h:99
#define TIMER_CFG_ONE_SHOT
Definition: timer.h:96
#define TIMER_CFG_A_CAP_COUNT_UP
Definition: timer.h:106
#define TIMER_CFG_B_ONE_SHOT_UP
Definition: timer.h:111
#define TIMER_CFG_B_PWM
Definition: timer.h:118
#define TIMER_CFG_B_CAP_TIME
Definition: timer.h:116
#define TIMER_CFG_ONE_SHOT_UP
Definition: timer.h:97
#define ASSERT(expr)
Definition: debug.h:71
#define TIMER_CFG_A_PERIODIC
Definition: timer.h:103
#define TIMER_CFG_B_CAP_TIME_UP
Definition: timer.h:117
#define TIMER_CFG_B_PERIODIC
Definition: timer.h:112
#define TIMER_CFG_B_CAP_COUNT
Definition: timer.h:114
#define TIMER_CFG_B_CAP_COUNT_UP
Definition: timer.h:115
#define TIMER_CFG_PERIODIC
Definition: timer.h:98
#define TIMER_CFG_A_ONE_SHOT
Definition: timer.h:101
#define TIMER_CFG_A_CAP_COUNT
Definition: timer.h:105
#define TIMER_CFG_A_CAP_TIME
Definition: timer.h:107
#define TIMER_CFG_A_PERIODIC_UP
Definition: timer.h:104
#define TIMER_CFG_B_PERIODIC_UP
Definition: timer.h:113

§ TimerDisable()

static void TimerDisable ( uint32_t  ui32Base,
uint32_t  ui32Timer 
)
inlinestatic

Disables the timer(s).

This function disables operation of the timer module.

Parameters
ui32Baseis the base address of the timer module.
ui32Timerspecifies the timer(s) to disable. Must be one of:
Returns
None
261 {
262  // Check the arguments.
263  ASSERT(TimerBaseValid(ui32Base));
264  ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B) ||
265  (ui32Timer == TIMER_BOTH));
266 
267  // Disable the timer module.
268  HWREG(ui32Base + GPT_O_CTL) &= ~(ui32Timer &
269  (GPT_CTL_TAEN | GPT_CTL_TBEN));
270 }
#define ASSERT(expr)
Definition: debug.h:71
#define TIMER_B
Definition: timer.h:154
#define TIMER_A
Definition: timer.h:153
#define TIMER_BOTH
Definition: timer.h:155
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§ TimerEnable()

static void TimerEnable ( uint32_t  ui32Base,
uint32_t  ui32Timer 
)
inlinestatic

Enables the timer(s).

This function enables operation of the timer module. The timer must be configured before it is enabled.

Parameters
ui32Baseis the base address of the timer module.
ui32Timerspecifies the timer(s) to enable. Must be one of:
Returns
None
234 {
235  // Check the arguments.
236  ASSERT(TimerBaseValid(ui32Base));
237  ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B) ||
238  (ui32Timer == TIMER_BOTH));
239 
240  // Enable the timer(s) module.
241  HWREG(ui32Base + GPT_O_CTL) |= ui32Timer & (GPT_CTL_TAEN | GPT_CTL_TBEN);
242 }
#define ASSERT(expr)
Definition: debug.h:71
#define TIMER_B
Definition: timer.h:154
#define TIMER_A
Definition: timer.h:153
#define TIMER_BOTH
Definition: timer.h:155

§ TimerEventControl()

static void TimerEventControl ( uint32_t  ui32Base,
uint32_t  ui32Timer,
uint32_t  ui32Event 
)
inlinestatic

Controls the event type.

This function configures the signal edge(s) that triggers the timer when in capture mode.

Parameters
ui32Baseis the base address of the timer module.
ui32Timerspecifies the timer(s) to be adjusted; must be one of:
ui32Eventspecifies the type of event; must be one of:
Returns
None
369 {
370  // Check the arguments.
371  ASSERT(TimerBaseValid(ui32Base));
372  ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B) ||
373  (ui32Timer == TIMER_BOTH));
374 
375  // Set the event type.
376  ui32Timer &= GPT_CTL_TAEVENT_M | GPT_CTL_TBEVENT_M;
377  HWREG(ui32Base + GPT_O_CTL) = ((HWREG(ui32Base + GPT_O_CTL) & ~ui32Timer) |
378  (ui32Event & ui32Timer));
379 }
#define ASSERT(expr)
Definition: debug.h:71
#define TIMER_B
Definition: timer.h:154
#define TIMER_A
Definition: timer.h:153
#define TIMER_BOTH
Definition: timer.h:155
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§ TimerIntClear()

static void TimerIntClear ( uint32_t  ui32Base,
uint32_t  ui32IntFlags 
)
inlinestatic

Clears timer interrupt sources.

The specified timer interrupt sources are cleared, so that they no longer assert. This function must be called in the interrupt handler to keep the interrupt from being triggered again immediately upon exit.

Note
Due to write buffers and synchronizers in the system it may take several clock cycles from a register write clearing an event in a module and until the event is actually cleared in the NVIC of the system CPU. It is recommended to clear the event source early in the interrupt service routine (ISR) to allow the event clear to propagate to the NVIC before returning from the ISR. At the same time, an early event clear allows new events of the same type to be pended instead of ignored if the event is cleared later in the ISR. It is the responsibility of the programmer to make sure that enough time has passed before returning from the ISR to avoid false re-triggering of the cleared event. A simple, although not necessarily optimal, way of clearing an event before returning from the ISR is:
  1. Write to clear event (interrupt source). (buffered write)
  2. Dummy read from the event source module. (making sure the write has propagated)
  3. Wait two system CPU clock cycles (user code or two NOPs). (allowing cleared event to propagate through any synchronizers)
Parameters
ui32Baseis the base address of the timer module.
ui32IntFlagsis a bit mask of the interrupt sources to be cleared. The parameter must be the bitwise OR of any combination of the following:
Returns
None
980 {
981  // Check the arguments.
982  ASSERT(TimerBaseValid(ui32Base));
983 
984  // Clear the requested interrupt sources.
985  HWREG(ui32Base + GPT_O_ICLR) = ui32IntFlags;
986 }
#define ASSERT(expr)
Definition: debug.h:71

§ TimerIntDisable()

static void TimerIntDisable ( uint32_t  ui32Base,
uint32_t  ui32IntFlags 
)
inlinestatic

Disables individual timer interrupt sources.

This function disables the indicated timer interrupt sources. Only the sources that are enabled can be reflected to the processor interrupt; disabled sources have no effect on the processor.

Parameters
ui32Baseis the base address of the timer module.
ui32IntFlagsis the bit mask of the interrupt sources to be disabled. The parameter must be the bitwise OR of any combination of the following:
Returns
None
899 {
900  // Check the arguments.
901  ASSERT(TimerBaseValid(ui32Base));
902 
903  // Disable the specified interrupts.
904  HWREG(ui32Base + GPT_O_IMR) &= ~(ui32IntFlags);
905 }
#define ASSERT(expr)
Definition: debug.h:71

§ TimerIntEnable()

static void TimerIntEnable ( uint32_t  ui32Base,
uint32_t  ui32IntFlags 
)
inlinestatic

Enables individual timer interrupt sources.

This function enables the indicated timer interrupt sources. Only the sources that are enabled can be reflected to the processor interrupt; disabled sources have no effect on the processor.

Parameters
ui32Baseis the base address of the timer module.
ui32IntFlagsis the bit mask of the interrupt sources to be enabled. The parameter must be the bitwise OR of any combination of the following:
Returns
None
867 {
868  // Check the arguments.
869  ASSERT(TimerBaseValid(ui32Base));
870 
871  // Enable the specified interrupts.
872  HWREG(ui32Base + GPT_O_IMR) |= ui32IntFlags;
873 }
#define ASSERT(expr)
Definition: debug.h:71

§ TimerIntervalLoadMode()

void TimerIntervalLoadMode ( uint32_t  ui32Base,
uint32_t  ui32Timer,
uint32_t  ui32Mode 
)

Sets the Interval Load mode.

This function controls when the Timer Register and Prescale Snap-shot (if used) are updated.

Timer Register (TAR/TBR) is updated when Interval Load Register (TAILR/TBILR) is written and the Prescale Snap-shot (TAPS/TBPS) is updated when Prescale Register (TAPR/TBPR) is written depending on the mode of operation.

Parameters
ui32Baseis the base address of the timer module.
ui32Timerspecifies the timer(s) to configure; must be one of:
ui32Modesets the mode:
  • TIMER_INTERVALLOAD_NEXTCYCLE : Update Timer Register and Prescale Snap-shot on next clock cycle after writing Interval Load Register or Prescale Register, respectively.
  • TIMER_INTERVALLOAD_TIMEOUT : Update Timer Register and Prescale Snap-shot on next timeout after writing Interval Load Register or Prescale Register, respectively.
Returns
None

Referenced by TimerCcpCombineDisable().

359 {
360  // Check the arguments
361  ASSERT(TimerBaseValid(ui32Base));
362  ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B) || (ui32Timer == TIMER_BOTH));
363  ASSERT((ui32Mode == TIMER_INTERVALLOAD_NEXTCYCLE) || (ui32Mode == TIMER_INTERVALLOAD_TIMEOUT));
364 
365  // Set mode for timer A
366  if(ui32Timer & TIMER_A)
367  {
368  if(ui32Mode == TIMER_INTERVALLOAD_NEXTCYCLE)
369  {
370  HWREG(ui32Base + GPT_O_TAMR) &= ~(GPT_TAMR_TAILD);
371  }
372  else
373  {
374  HWREG(ui32Base + GPT_O_TAMR) |= GPT_TAMR_TAILD;
375  }
376  }
377 
378  // Set mode for timer B
379  if(ui32Timer & TIMER_B)
380  {
381  if(ui32Mode == TIMER_INTERVALLOAD_NEXTCYCLE)
382  {
383  HWREG(ui32Base + GPT_O_TBMR) &= ~(GPT_TBMR_TBILD);
384  }
385  else
386  {
387  HWREG(ui32Base + GPT_O_TBMR) |= GPT_TBMR_TBILD;
388  }
389  }
390 }
#define ASSERT(expr)
Definition: debug.h:71
#define TIMER_B
Definition: timer.h:154
#define TIMER_A
Definition: timer.h:153
#define TIMER_INTERVALLOAD_TIMEOUT
Definition: timer.h:185
#define TIMER_INTERVALLOAD_NEXTCYCLE
Definition: timer.h:184
#define TIMER_BOTH
Definition: timer.h:155

§ TimerIntRegister()

void TimerIntRegister ( uint32_t  ui32Base,
uint32_t  ui32Timer,
void(*)(void)  pfnHandler 
)

Registers an interrupt handler for the timer interrupt in the dynamic interrupt table.

Note
Only use this function if you want to use the dynamic vector table (in SRAM)!

This function registers a function as the interrupt handler for a specific interrupt and enables the corresponding interrupt in the interrupt controller.

Specific timer interrupts must be enabled via TimerIntEnable(). It is the interrupt handler's responsibility to clear the interrupt source via TimerIntClear().

Parameters
ui32Baseis the base address of the timer module.
ui32Timerspecifies the timer(s); must be one of:
pfnHandleris a pointer to the function to be called when the timer interrupt occurs.
Returns
None
See also
IntRegister() for important information about registering interrupt handlers.

Referenced by TimerMatchGet().

241 {
242  uint32_t ui32Int;
243 
244  // Check the arguments.
245  ASSERT(TimerBaseValid(ui32Base));
246  ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B) ||
247  (ui32Timer == TIMER_BOTH));
248 
249  // Get the interrupt number for this timer module.
250  ui32Int = TimerIntNumberGet(ui32Base);
251 
252  // Register an interrupt handler for timer A if requested.
253  if(ui32Timer & TIMER_A)
254  {
255  // Register the interrupt handler.
256  IntRegister(ui32Int, pfnHandler);
257 
258  // Enable the interrupt.
259  IntEnable(ui32Int);
260  }
261 
262  // Register an interrupt handler for timer B if requested.
263  if(ui32Timer & TIMER_B)
264  {
265  // Register the interrupt handler.
266  IntRegister(ui32Int + 1, pfnHandler);
267 
268  // Enable the interrupt.
269  IntEnable(ui32Int + 1);
270  }
271 }
static uint32_t TimerIntNumberGet(uint32_t ui32Base)
Gets the timer interrupt number.
Definition: timer.c:77
#define ASSERT(expr)
Definition: debug.h:71
#define TIMER_B
Definition: timer.h:154
#define TIMER_A
Definition: timer.h:153
#define TIMER_BOTH
Definition: timer.h:155
void IntRegister(uint32_t ui32Interrupt, void(*pfnHandler)(void))
Registers a function as an interrupt handler in the dynamic vector table.
Definition: interrupt.c:151
void IntEnable(uint32_t ui32Interrupt)
Enables an interrupt or system exception.
Definition: interrupt.c:281
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§ TimerIntStatus()

static uint32_t TimerIntStatus ( uint32_t  ui32Base,
bool  bMasked 
)
inlinestatic

Gets the current interrupt status.

This function returns the interrupt status for the timer module. Either the raw interrupt status or the status of interrupts that are allowed to reflect to the processor can be returned.

Parameters
ui32Baseis the base address of the timer module.
bMaskedselects either raw or masked interrupt status:
  • true : Masked interrupt.
  • false : Raw interrupt.
Returns
The current interrupt status, enumerated as a bit field of values:
931 {
932  // Check the arguments.
933  ASSERT(TimerBaseValid(ui32Base));
934 
935  // Return either the interrupt status or the raw interrupt status as
936  // requested.
937  return(bMasked ? HWREG(ui32Base + GPT_O_MIS) :
938  HWREG(ui32Base + GPT_O_RIS));
939 }
#define ASSERT(expr)
Definition: debug.h:71

§ TimerIntUnregister()

void TimerIntUnregister ( uint32_t  ui32Base,
uint32_t  ui32Timer 
)

Unregisters an interrupt handler for the timer interrupt in the dynamic interrupt table.

This function unregisters the handler to be called when a timer interrupt occurs. This function also masks off the interrupt in the interrupt controller so that the interrupt handler is no longer called.

Parameters
ui32Baseis the base address of the timer module.
ui32Timerspecifies the timer(s); must be one of:
Returns
None
See also
IntRegister() for important information about registering interrupt handlers.

Referenced by TimerMatchGet().

280 {
281  uint32_t ui32Int;
282 
283  // Check the arguments.
284  ASSERT(TimerBaseValid(ui32Base));
285  ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B) ||
286  (ui32Timer == TIMER_BOTH));
287 
288  // Get the interrupt number for this timer module.
289  ui32Int = TimerIntNumberGet(ui32Base);
290 
291  // Unregister the interrupt handler for timer A if requested.
292  if(ui32Timer & TIMER_A)
293  {
294  // Disable the interrupt.
295  IntDisable(ui32Int);
296 
297  // Unregister the interrupt handler.
298  IntUnregister(ui32Int);
299  }
300 
301  // Unregister the interrupt handler for timer B if requested.
302  if(ui32Timer & TIMER_B)
303  {
304  // Disable the interrupt.
305  IntDisable(ui32Int + 1);
306 
307  // Unregister the interrupt handler.
308  IntUnregister(ui32Int + 1);
309  }
310 }
static uint32_t TimerIntNumberGet(uint32_t ui32Base)
Gets the timer interrupt number.
Definition: timer.c:77
#define ASSERT(expr)
Definition: debug.h:71
#define TIMER_B
Definition: timer.h:154
#define TIMER_A
Definition: timer.h:153
void IntUnregister(uint32_t ui32Interrupt)
Unregisters an interrupt handler in the dynamic vector table.
Definition: interrupt.c:187
#define TIMER_BOTH
Definition: timer.h:155
void IntDisable(uint32_t ui32Interrupt)
Disables an interrupt or system exception.
Definition: interrupt.c:325
Here is the call graph for this function:

§ TimerLevelControl()

void TimerLevelControl ( uint32_t  ui32Base,
uint32_t  ui32Timer,
bool  bInvert 
)

Controls the output level.

This function configures the PWM output level for the specified timer.

Parameters
ui32Baseis the base address of the timer module.
ui32Timerspecifies the timer(s) to adjust. Must be one of:
bInvertspecifies the output level.
  • true : Timer's output is active low.
  • false : Timer's output is active high.
Returns
None

Referenced by TimerDisable().

160 {
161  // Check the arguments.
162  ASSERT(TimerBaseValid(ui32Base));
163  ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B) ||
164  (ui32Timer == TIMER_BOTH));
165 
166  // Set the output levels as requested.
167  ui32Timer &= GPT_CTL_TAPWML | GPT_CTL_TBPWML;
168  HWREG(ui32Base + GPT_O_CTL) = (bInvert ?
169  (HWREG(ui32Base + GPT_O_CTL) | ui32Timer) :
170  (HWREG(ui32Base + GPT_O_CTL) &
171  ~(ui32Timer)));
172 }
#define ASSERT(expr)
Definition: debug.h:71
#define TIMER_B
Definition: timer.h:154
#define TIMER_A
Definition: timer.h:153
#define TIMER_BOTH
Definition: timer.h:155

§ TimerLoadGet()

static uint32_t TimerLoadGet ( uint32_t  ui32Base,
uint32_t  ui32Timer 
)
inlinestatic

Gets the timer load value.

This function gets the currently programmed interval load value for the specified timer.

Note
This function can be used for both full- and half-width modes of 16/32-bit timers.
Only TIMER_A should be used when the timer is configured for full-width operation.
Parameters
ui32Baseis the base address of the timer module.
ui32Timerspecifies the timer; must be one of:
Returns
Returns the load value for the timer
669 {
670  // Check the arguments.
671  ASSERT(TimerBaseValid(ui32Base));
672  ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B));
673 
674  // Return the appropriate load value.
675  return((ui32Timer == TIMER_A) ? HWREG(ui32Base + GPT_O_TAILR) :
676  HWREG(ui32Base + GPT_O_TBILR));
677 }
#define ASSERT(expr)
Definition: debug.h:71
#define TIMER_B
Definition: timer.h:154
#define TIMER_A
Definition: timer.h:153

§ TimerLoadSet()

static void TimerLoadSet ( uint32_t  ui32Base,
uint32_t  ui32Timer,
uint32_t  ui32Value 
)
inlinestatic

Sets the timer load value.

This function configures the timer load value; if the timer is running then the value is immediately loaded into the timer.

Note
This function can be used for both full- and half-width modes of 16/32-bit timers.
Only TIMER_A should be used when the timer is configured for full-width operation.
Parameters
ui32Baseis the base address of the timer module.
ui32Timerspecifies the timer(s) to adjust; must be one of:
ui32Valueis the load value.
Returns
None
627 {
628  // Check the arguments.
629  ASSERT(TimerBaseValid(ui32Base));
630  ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B) ||
631  (ui32Timer == TIMER_BOTH));
632 
633  // Set the timer A load value if requested.
634  if(ui32Timer & TIMER_A)
635  {
636  HWREG(ui32Base + GPT_O_TAILR) = ui32Value;
637  }
638 
639  // Set the timer B load value if requested.
640  if(ui32Timer & TIMER_B)
641  {
642  HWREG(ui32Base + GPT_O_TBILR) = ui32Value;
643  }
644 }
#define ASSERT(expr)
Definition: debug.h:71
#define TIMER_B
Definition: timer.h:154
#define TIMER_A
Definition: timer.h:153
#define TIMER_BOTH
Definition: timer.h:155

§ TimerMatchGet()

static uint32_t TimerMatchGet ( uint32_t  ui32Base,
uint32_t  ui32Timer 
)
inlinestatic

Gets the timer match value.

This function gets the match value for the specified timer.

Note
This function can be used for both full- and half-width modes of 16/32-bit timers.
Only TIMER_A should be used when the timer is configured for full-width operation.
Parameters
ui32Baseis the base address of the timer module.
ui32Timerspecifies the timer; must be one of:
Returns
Returns the match value for the timer
781 {
782  // Check the arguments.
783  ASSERT(TimerBaseValid(ui32Base));
784  ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B));
785 
786  // Return the appropriate match value.
787  return((ui32Timer == TIMER_A) ? HWREG(ui32Base + GPT_O_TAMATCHR) :
788  HWREG(ui32Base + GPT_O_TBMATCHR));
789 }
#define ASSERT(expr)
Definition: debug.h:71
#define TIMER_B
Definition: timer.h:154
#define TIMER_A
Definition: timer.h:153
Here is the call graph for this function:

§ TimerMatchSet()

static void TimerMatchSet ( uint32_t  ui32Base,
uint32_t  ui32Timer,
uint32_t  ui32Value 
)
inlinestatic

Sets the timer match value.

This function configures the match value for a timer. This value is used in capture count mode to determine when to interrupt the processor and in PWM mode to determine the duty cycle of the output signal. Match interrupts can also be generated in periodic and one-shot modes when the value of the counter matches this register.

Note
This function can be used for both full- and half-width modes of 16/32-bit timers.
Only TIMER_A should be used when the timer is configured for full-width operation.
Parameters
ui32Baseis the base address of the timer module.
ui32Timerspecifies the timer(s) to adjust; must be one of:
ui32Valueis the match value.
Returns
None
739 {
740  // Check the arguments.
741  ASSERT(TimerBaseValid(ui32Base));
742  ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B) ||
743  (ui32Timer == TIMER_BOTH));
744 
745  // Set the timer A match value if requested.
746  if(ui32Timer & TIMER_A)
747  {
748  HWREG(ui32Base + GPT_O_TAMATCHR) = ui32Value;
749  }
750 
751  // Set the timer B match value if requested.
752  if(ui32Timer & TIMER_B)
753  {
754  HWREG(ui32Base + GPT_O_TBMATCHR) = ui32Value;
755  }
756 }
#define ASSERT(expr)
Definition: debug.h:71
#define TIMER_B
Definition: timer.h:154
#define TIMER_A
Definition: timer.h:153
#define TIMER_BOTH
Definition: timer.h:155

§ TimerMatchUpdateMode()

void TimerMatchUpdateMode ( uint32_t  ui32Base,
uint32_t  ui32Timer,
uint32_t  ui32Mode 
)

Sets the Match Register Update mode.

This function controls when the Match Register value and Prescale Register value are applied after writing these registers while a timer is enabled.

Note
If the timer is disabled when setting the update mode the Match Register and Prescale Register values are applied immediately when enabling the timer.
Parameters
ui32Baseis the base address of the timer module.
ui32Timerspecifies the timer(s) to configure; must be one of:
ui32Modesets the mode:
Returns
None

Referenced by TimerCcpCombineDisable().

319 {
320  // Check the arguments
321  ASSERT(TimerBaseValid(ui32Base));
322  ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B) || (ui32Timer == TIMER_BOTH));
323  ASSERT((ui32Mode == TIMER_MATCHUPDATE_NEXTCYCLE) || (ui32Mode == TIMER_MATCHUPDATE_TIMEOUT));
324 
325  // Set mode for timer A
326  if(ui32Timer & TIMER_A)
327  {
328  if(ui32Mode == TIMER_MATCHUPDATE_NEXTCYCLE)
329  {
330  HWREG(ui32Base + GPT_O_TAMR) &= ~(GPT_TAMR_TAMRSU);
331  }
332  else
333  {
334  HWREG(ui32Base + GPT_O_TAMR) |= GPT_TAMR_TAMRSU;
335  }
336  }
337 
338  // Set mode for timer B
339  if(ui32Timer & TIMER_B)
340  {
341  if(ui32Mode == TIMER_MATCHUPDATE_NEXTCYCLE)
342  {
343  HWREG(ui32Base + GPT_O_TBMR) &= ~(GPT_TBMR_TBMRSU);
344  }
345  else
346  {
347  HWREG(ui32Base + GPT_O_TBMR) |= GPT_TBMR_TBMRSU;
348  }
349  }
350 }
#define TIMER_MATCHUPDATE_TIMEOUT
Definition: timer.h:177
#define ASSERT(expr)
Definition: debug.h:71
#define TIMER_B
Definition: timer.h:154
#define TIMER_A
Definition: timer.h:153
#define TIMER_BOTH
Definition: timer.h:155
#define TIMER_MATCHUPDATE_NEXTCYCLE
Definition: timer.h:176

§ TimerPrescaleGet()

static uint32_t TimerPrescaleGet ( uint32_t  ui32Base,
uint32_t  ui32Timer 
)
inlinestatic

Get the timer prescale value.

This function gets the value of the timer clock prescaler. The prescaler is only operational when in half-width mode and is used to extend the range of the half-width timer modes.

When in one-shot or periodic down count modes, ui32Value defines the prescaler for the timer counter. When acting as a true prescaler, the prescaler counts down to 0 before the value in timer registers are incremented.

In all other individual/split modes, ui32Value is a linear extension of the upper range of the timer counter, holding bits 23:16 in the 16-bit modes of the 16/32-bit timer.

Note
Because the prescaler counts down to 0 the timer division ratio equals ui32Value + 1. E.g. a prescale value of 15 divides the timer rate by 16.
Parameters
ui32Baseis the base address of the timer module.
ui32Timerspecifies the timer; must be one of:
Returns
Returns the value of the timer prescaler.
516 {
517  // Check the arguments.
518  ASSERT(TimerBaseValid(ui32Base));
519  ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B) ||
520  (ui32Timer == TIMER_BOTH));
521 
522  // Return the appropriate prescale value.
523  return((ui32Timer == TIMER_A) ? HWREG(ui32Base + GPT_O_TAPR) :
524  HWREG(ui32Base + GPT_O_TBPR));
525 }
#define ASSERT(expr)
Definition: debug.h:71
#define TIMER_B
Definition: timer.h:154
#define TIMER_A
Definition: timer.h:153
#define TIMER_BOTH
Definition: timer.h:155

§ TimerPrescaleMatchGet()

static uint32_t TimerPrescaleMatchGet ( uint32_t  ui32Base,
uint32_t  ui32Timer 
)
inlinestatic

Get the timer prescale match value.

This function gets the value of the input clock prescaler match value. When in a half-width mode that uses the counter match and prescaler, the prescale match effectively extends the range of the match. The prescaler provides the least significant bits when counting down in periodic and one-shot modes; in all other modes, the prescaler provides the most significant bits.

Parameters
ui32Baseis the base address of the timer module.
ui32Timerspecifies the timer; must be one of:
Returns
Returns the value of the timer prescale match.
592 {
593  // Check the arguments.
594  ASSERT(TimerBaseValid(ui32Base));
595  ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B));
596 
597  // Return the appropriate prescale match value.
598  return((ui32Timer == TIMER_A) ? HWREG(ui32Base + GPT_O_TAPMR) :
599  HWREG(ui32Base + GPT_O_TBPMR));
600 }
#define ASSERT(expr)
Definition: debug.h:71
#define TIMER_B
Definition: timer.h:154
#define TIMER_A
Definition: timer.h:153

§ TimerPrescaleMatchSet()

static void TimerPrescaleMatchSet ( uint32_t  ui32Base,
uint32_t  ui32Timer,
uint32_t  ui32Value 
)
inlinestatic

Set the timer prescale match value.

This function configures the value of the input clock prescaler match value. When in a half-width mode that uses the counter match and the prescaler, the prescale match effectively extends the range of the match. The prescaler provides the least significant bits when counting down in periodic and one-shot modes; in all other modes, the prescaler provides the most significant bits.

Parameters
ui32Baseis the base address of the timer module.
ui32Timerspecifies the timer(s) to adjust; must be one of:
ui32Valueis the timer prescale match value which must be between 0 and 255 (both included).
Returns
None
551 {
552  // Check the arguments.
553  ASSERT(TimerBaseValid(ui32Base));
554  ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B) ||
555  (ui32Timer == TIMER_BOTH));
556  ASSERT(ui32Value < 256);
557 
558  // Set the timer A prescale match if requested.
559  if(ui32Timer & TIMER_A)
560  {
561  HWREG(ui32Base + GPT_O_TAPMR) = ui32Value;
562  }
563 
564  // Set the timer B prescale match if requested.
565  if(ui32Timer & TIMER_B)
566  {
567  HWREG(ui32Base + GPT_O_TBPMR) = ui32Value;
568  }
569 }
#define ASSERT(expr)
Definition: debug.h:71
#define TIMER_B
Definition: timer.h:154
#define TIMER_A
Definition: timer.h:153
#define TIMER_BOTH
Definition: timer.h:155

§ TimerPrescaleSet()

static void TimerPrescaleSet ( uint32_t  ui32Base,
uint32_t  ui32Timer,
uint32_t  ui32Value 
)
inlinestatic

Set the timer prescale value.

This function configures the value of the timer clock prescaler. The prescaler is only operational when in half-width mode and is used to extend the range of the half-width timer modes.

When in one-shot or periodic down count modes, ui32Value defines the prescaler for the timer counter. When acting as a true prescaler, the prescaler counts down to 0 before the value in timer registers are incremented.

In all other individual/split modes, ui32Value is a linear extension of the upper range of the timer counter, holding bits 23:16 in the 16-bit modes of the 16/32-bit timer.

Note
Because the prescaler counts down to 0 the timer division ratio equals ui32Value + 1. E.g. a prescale value of 15 divides the timer rate by 16.
Parameters
ui32Baseis the base address of the timer module.
ui32Timerspecifies the timer(s) to adjust; must be one of:
ui32Valueis the timer prescale value which must be between 0 and 255 (both included).
  • 0 : Timer division ratio = 1 (disable prescaling).
  • 1 : Timer division ratio = 2.
  • ...
  • 255 : Timer division ratio = 256.
Returns
None
467 {
468  // Check the arguments.
469  ASSERT(TimerBaseValid(ui32Base));
470  ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B) ||
471  (ui32Timer == TIMER_BOTH));
472  ASSERT(ui32Value < 256);
473 
474  // Set the timer A prescaler if requested.
475  if(ui32Timer & TIMER_A)
476  {
477  HWREG(ui32Base + GPT_O_TAPR) = ui32Value;
478  }
479 
480  // Set the timer B prescaler if requested.
481  if(ui32Timer & TIMER_B)
482  {
483  HWREG(ui32Base + GPT_O_TBPR) = ui32Value;
484  }
485 }
#define ASSERT(expr)
Definition: debug.h:71
#define TIMER_B
Definition: timer.h:154
#define TIMER_A
Definition: timer.h:153
#define TIMER_BOTH
Definition: timer.h:155

§ TimerStallControl()

void TimerStallControl ( uint32_t  ui32Base,
uint32_t  ui32Timer,
bool  bStall 
)

Controls the stall handling.

This function controls the stall response for the specified timer. If the bStall parameter is true, then the timer stops counting if the processor enters debug mode; otherwise the timer keeps running while in debug mode.

Parameters
ui32Baseis the base address of the timer module.
ui32Timerspecifies the timer(s) to be adjusted; must be one of:
bStallspecifies the response to a stall signal.
  • true : Timer stops counting if the processor enters debug mode.
  • false : Timer keeps running if the processor enters debug mode.
Returns
None

Referenced by TimerEventControl().

181 {
182  // Check the arguments.
183  ASSERT(TimerBaseValid(ui32Base));
184  ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B) ||
185  (ui32Timer == TIMER_BOTH));
186 
187  // Set the stall mode.
188  ui32Timer &= GPT_CTL_TASTALL | GPT_CTL_TBSTALL;
189  HWREG(ui32Base + GPT_O_CTL) = (bStall ?
190  (HWREG(ui32Base + GPT_O_CTL) | ui32Timer) :
191  (HWREG(ui32Base + GPT_O_CTL) & ~(ui32Timer)));
192 }
#define ASSERT(expr)
Definition: debug.h:71
#define TIMER_B
Definition: timer.h:154
#define TIMER_A
Definition: timer.h:153
#define TIMER_BOTH
Definition: timer.h:155

§ TimerSynchronize()

static void TimerSynchronize ( uint32_t  ui32Base,
uint32_t  ui32Timers 
)
inlinestatic

Synchronizes the counters in a set of timers.

This function synchronizes the counters in a specified set of timers. When a timer is running in half-width mode, each half can be included or excluded in the synchronization event. When a timer is running in full-width mode, only the A timer can be synchronized (specifying the B timer has no effect).

Parameters
ui32Baseis the base address of the timer module. This parameter must be the base address of Timer0 (in other words, GPT0_BASE).
ui32Timersis the set of timers to synchronize. The parameter is the bitwise OR of any of the following:
Returns
None
1016 {
1017  // Check the arguments.
1018  ASSERT(ui32Base == GPT0_BASE);
1019 
1020  // Synchronize the specified timers.
1021  HWREG(ui32Base + GPT_O_SYNC) = ui32Timers;
1022 }
#define ASSERT(expr)
Definition: debug.h:71

§ TimerValueGet()

static uint32_t TimerValueGet ( uint32_t  ui32Base,
uint32_t  ui32Timer 
)
inlinestatic

Gets the current timer value.

This function reads the current value of the specified timer.

Note
This function can be used for both full- and half-width modes of 16/32-bit timers.
Only TIMER_A should be used when the timer is configured for full-width operation.
Parameters
ui32Baseis the base address of the timer module.
ui32Timerspecifies the timer; must be one of:
Returns
Returns the current value of the timer.
701 {
702  // Check the arguments.
703  ASSERT(TimerBaseValid(ui32Base));
704  ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B));
705 
706  // Return the appropriate timer value.
707  return((ui32Timer == TIMER_A) ? HWREG(ui32Base + GPT_O_TAR) :
708  HWREG(ui32Base + GPT_O_TBR));
709 }
#define ASSERT(expr)
Definition: debug.h:71
#define TIMER_B
Definition: timer.h:154
#define TIMER_A
Definition: timer.h:153

§ TimerWaitOnTriggerControl()

void TimerWaitOnTriggerControl ( uint32_t  ui32Base,
uint32_t  ui32Timer,
bool  bWait 
)

Controls the wait on trigger handling.

This function controls whether or not a timer waits for a trigger input to start counting. When enabled, the previous timer in the trigger chain must count to its timeout in order for this timer to start counting. Refer to the part's data sheet for a description of the trigger chain.

Note
This function should not be used for Timer 0A or Wide Timer 0A.
Parameters
ui32Baseis the base address of the timer module.
ui32Timerspecifies the timer(s) to be adjusted; must be one of:
bWaitspecifies if the timer should wait for a trigger input.
  • true : Wait for trigger.
  • false : Do not wait for trigger.
Returns
None

Referenced by TimerEventControl().

201 {
202  // Check the arguments.
203  ASSERT(TimerBaseValid(ui32Base));
204  ASSERT((ui32Timer == TIMER_A) || (ui32Timer == TIMER_B) ||
205  (ui32Timer == TIMER_BOTH));
206 
207  // Set the wait on trigger mode for timer A.
208  if(ui32Timer & TIMER_A)
209  {
210  if(bWait)
211  {
212  HWREG(ui32Base + GPT_O_TAMR) |= GPT_TAMR_TAWOT;
213  }
214  else
215  {
216  HWREG(ui32Base + GPT_O_TAMR) &= ~(GPT_TAMR_TAWOT);
217  }
218  }
219 
220  // Set the wait on trigger mode for timer B.
221  if(ui32Timer & TIMER_B)
222  {
223  if(bWait)
224  {
225  HWREG(ui32Base + GPT_O_TBMR) |= GPT_TBMR_TBWOT;
226  }
227  else
228  {
229  HWREG(ui32Base + GPT_O_TBMR) &= ~(GPT_TBMR_TBWOT);
230  }
231  }
232 }
#define ASSERT(expr)
Definition: debug.h:71
#define TIMER_B
Definition: timer.h:154
#define TIMER_A
Definition: timer.h:153
#define TIMER_BOTH
Definition: timer.h:155

Macro Definition Documentation

§ TIMER_0A_SYNC

#define TIMER_0A_SYNC   0x00000001

§ TIMER_0B_SYNC

#define TIMER_0B_SYNC   0x00000002

§ TIMER_1A_SYNC

#define TIMER_1A_SYNC   0x00000004

§ TIMER_1B_SYNC

#define TIMER_1B_SYNC   0x00000008

§ TIMER_2A_SYNC

#define TIMER_2A_SYNC   0x00000010

§ TIMER_2B_SYNC

#define TIMER_2B_SYNC   0x00000020

§ TIMER_3A_SYNC

#define TIMER_3A_SYNC   0x00000040

§ TIMER_3B_SYNC

#define TIMER_3B_SYNC   0x00000080

§ TIMER_A

§ TIMER_B

§ TIMER_BOTH

§ TIMER_CAPA_EVENT

#define TIMER_CAPA_EVENT   0x00000004

§ TIMER_CAPA_MATCH

#define TIMER_CAPA_MATCH   0x00000002

§ TIMER_CAPB_EVENT

#define TIMER_CAPB_EVENT   0x00000400

§ TIMER_CAPB_MATCH

#define TIMER_CAPB_MATCH   0x00000200

§ TIMER_CFG_A_CAP_COUNT

#define TIMER_CFG_A_CAP_COUNT   0x00000003

Referenced by TimerConfigure().

§ TIMER_CFG_A_CAP_COUNT_UP

#define TIMER_CFG_A_CAP_COUNT_UP   0x00000013

Referenced by TimerConfigure().

§ TIMER_CFG_A_CAP_TIME

#define TIMER_CFG_A_CAP_TIME   0x00000007

Referenced by TimerConfigure().

§ TIMER_CFG_A_CAP_TIME_UP

#define TIMER_CFG_A_CAP_TIME_UP   0x00000017

Referenced by TimerConfigure().

§ TIMER_CFG_A_ONE_SHOT

#define TIMER_CFG_A_ONE_SHOT   0x00000021

Referenced by TimerConfigure().

§ TIMER_CFG_A_ONE_SHOT_UP

#define TIMER_CFG_A_ONE_SHOT_UP   0x00000031

Referenced by TimerConfigure().

§ TIMER_CFG_A_PERIODIC

#define TIMER_CFG_A_PERIODIC   0x00000022

Referenced by TimerConfigure().

§ TIMER_CFG_A_PERIODIC_UP

#define TIMER_CFG_A_PERIODIC_UP   0x00000032

Referenced by TimerConfigure().

§ TIMER_CFG_A_PWM

#define TIMER_CFG_A_PWM   0x0000000A

Referenced by TimerConfigure().

§ TIMER_CFG_B_CAP_COUNT

#define TIMER_CFG_B_CAP_COUNT   0x00000300

Referenced by TimerConfigure().

§ TIMER_CFG_B_CAP_COUNT_UP

#define TIMER_CFG_B_CAP_COUNT_UP   0x00001300

Referenced by TimerConfigure().

§ TIMER_CFG_B_CAP_TIME

#define TIMER_CFG_B_CAP_TIME   0x00000700

Referenced by TimerConfigure().

§ TIMER_CFG_B_CAP_TIME_UP

#define TIMER_CFG_B_CAP_TIME_UP   0x00001700

Referenced by TimerConfigure().

§ TIMER_CFG_B_ONE_SHOT

#define TIMER_CFG_B_ONE_SHOT   0x00002100

Referenced by TimerConfigure().

§ TIMER_CFG_B_ONE_SHOT_UP

#define TIMER_CFG_B_ONE_SHOT_UP   0x00003100

Referenced by TimerConfigure().

§ TIMER_CFG_B_PERIODIC

#define TIMER_CFG_B_PERIODIC   0x00002200

Referenced by TimerConfigure().

§ TIMER_CFG_B_PERIODIC_UP

#define TIMER_CFG_B_PERIODIC_UP   0x00003200

Referenced by TimerConfigure().

§ TIMER_CFG_B_PWM

#define TIMER_CFG_B_PWM   0x00000A00

Referenced by TimerConfigure().

§ TIMER_CFG_ONE_SHOT

#define TIMER_CFG_ONE_SHOT   0x00000021

Referenced by TimerConfigure().

§ TIMER_CFG_ONE_SHOT_UP

#define TIMER_CFG_ONE_SHOT_UP   0x00000031

Referenced by TimerConfigure().

§ TIMER_CFG_PERIODIC

#define TIMER_CFG_PERIODIC   0x00000022

Referenced by TimerConfigure().

§ TIMER_CFG_PERIODIC_UP

#define TIMER_CFG_PERIODIC_UP   0x00000032

Referenced by TimerConfigure().

§ TIMER_CFG_SPLIT_PAIR

#define TIMER_CFG_SPLIT_PAIR   0x04000000

Referenced by TimerConfigure().

§ TIMER_EVENT_BOTH_EDGES

#define TIMER_EVENT_BOTH_EDGES   0x00000C0C

§ TIMER_EVENT_NEG_EDGE

#define TIMER_EVENT_NEG_EDGE   0x00000404

§ TIMER_EVENT_POS_EDGE

#define TIMER_EVENT_POS_EDGE   0x00000000

§ TIMER_INTERVALLOAD_NEXTCYCLE

#define TIMER_INTERVALLOAD_NEXTCYCLE   0x00000000

Referenced by TimerIntervalLoadMode().

§ TIMER_INTERVALLOAD_TIMEOUT

#define TIMER_INTERVALLOAD_TIMEOUT   0x00000001

Referenced by TimerIntervalLoadMode().

§ TIMER_MATCHUPDATE_NEXTCYCLE

#define TIMER_MATCHUPDATE_NEXTCYCLE   0x00000000

Referenced by TimerMatchUpdateMode().

§ TIMER_MATCHUPDATE_TIMEOUT

#define TIMER_MATCHUPDATE_TIMEOUT   0x00000001

Referenced by TimerMatchUpdateMode().

§ TIMER_TIMA_DMA

#define TIMER_TIMA_DMA   0x00000020

§ TIMER_TIMA_MATCH

#define TIMER_TIMA_MATCH   0x00000010

§ TIMER_TIMA_TIMEOUT

#define TIMER_TIMA_TIMEOUT   0x00000001

§ TIMER_TIMB_DMA

#define TIMER_TIMB_DMA   0x00002000

§ TIMER_TIMB_MATCH

#define TIMER_TIMB_MATCH   0x00000800

§ TIMER_TIMB_TIMEOUT

#define TIMER_TIMB_TIMEOUT   0x00000100