CC26xx Driver Library
Functions
[uart.h] Universal Asynchronous Receiver/Transmitter
Peripherals

Functions

static void UARTParityModeSet (uint32_t ui32Base, uint32_t ui32Parity)
 Sets the type of parity. More...
 
static uint32_t UARTParityModeGet (uint32_t ui32Base)
 Gets the type of parity currently being used. More...
 
static void UARTFIFOLevelSet (uint32_t ui32Base, uint32_t ui32TxLevel, uint32_t ui32RxLevel)
 Sets the FIFO level at which interrupts are generated. More...
 
void UARTFIFOLevelGet (uint32_t ui32Base, uint32_t *pui32TxLevel, uint32_t *pui32RxLevel)
 Gets the FIFO level at which interrupts are generated. More...
 
void UARTConfigSetExpClk (uint32_t ui32Base, uint32_t ui32UARTClk, uint32_t ui32Baud, uint32_t ui32Config)
 Sets the configuration of a UART. More...
 
void UARTConfigGetExpClk (uint32_t ui32Base, uint32_t ui32UARTClk, uint32_t *pui32Baud, uint32_t *pui32Config)
 Gets the current configuration of a UART. More...
 
static void UARTEnable (uint32_t ui32Base)
 Enables transmitting and receiving. More...
 
void UARTDisable (uint32_t ui32Base)
 Disables transmitting and receiving. More...
 
static void UARTFIFOEnable (uint32_t ui32Base)
 Enables the transmit and receive FIFOs. More...
 
static void UARTFIFODisable (uint32_t ui32Base)
 Disables the transmit and receive FIFOs. More...
 
static bool UARTCharsAvail (uint32_t ui32Base)
 Determines if there are any characters in the receive FIFO. More...
 
static bool UARTSpaceAvail (uint32_t ui32Base)
 Determines if there is any space in the transmit FIFO. More...
 
int32_t UARTCharGetNonBlocking (uint32_t ui32Base)
 Receives a character from the specified port. More...
 
int32_t UARTCharGet (uint32_t ui32Base)
 Waits for a character from the specified port. More...
 
bool UARTCharPutNonBlocking (uint32_t ui32Base, uint8_t ui8Data)
 Sends a character to the specified port. More...
 
void UARTCharPut (uint32_t ui32Base, uint8_t ui8Data)
 Waits to send a character from the specified port. More...
 
static bool UARTBusy (uint32_t ui32Base)
 Determines whether the UART transmitter is busy or not. More...
 
static void UARTBreakCtl (uint32_t ui32Base, bool bBreakState)
 Causes a BREAK to be sent. More...
 
void UARTIntRegister (uint32_t ui32Base, void(*pfnHandler)(void))
 Registers an interrupt handler for a UART interrupt in the dynamic interrupt table. More...
 
void UARTIntUnregister (uint32_t ui32Base)
 Unregisters an interrupt handler for a UART interrupt in the dynamic interrupt table. More...
 
static void UARTIntEnable (uint32_t ui32Base, uint32_t ui32IntFlags)
 Enables individual UART interrupt sources. More...
 
static void UARTIntDisable (uint32_t ui32Base, uint32_t ui32IntFlags)
 Disables individual UART interrupt sources. More...
 
static uint32_t UARTIntStatus (uint32_t ui32Base, bool bMasked)
 Gets the current interrupt status. More...
 
static void UARTIntClear (uint32_t ui32Base, uint32_t ui32IntFlags)
 Clears UART interrupt sources. More...
 
static void UARTDMAEnable (uint32_t ui32Base, uint32_t ui32DMAFlags)
 Enable UART DMA operation. More...
 
static void UARTDMADisable (uint32_t ui32Base, uint32_t ui32DMAFlags)
 Disable UART DMA operation. More...
 
static uint32_t UARTRxErrorGet (uint32_t ui32Base)
 Gets current receiver errors. More...
 
static void UARTRxErrorClear (uint32_t ui32Base)
 Clears all reported receiver errors. More...
 
static void UARTHwFlowControlEnable (uint32_t ui32Base)
 Enables hardware flow control for both CTS and RTS. More...
 
static void UARTHwFlowControlDisable (uint32_t ui32Base)
 Disables hardware flow control for both CTS and RTS. More...
 

Detailed Description

Use printf()

DriverLib only supports writing a single character at a time to the UART buffer but it is possible to utilize the library function printf by overriding a few of the functions used by printf with a device specific definition. However, the implementation of printf is compiler specific and requires different functions to be overridden depending on the compiler.

Using printf can increase code size significantly but some compilers provide a highly optimized and configurable implementation suitable for embedded systems which makes the code size increase acceptable for most applications. See the compiler's documentation for details about how to configure the printf library function.

It is required that the application configures and enables the UART module before using printf function.

Code Composer Studio

In Code Composer Studio the functions fputc and fputs must be overridden.

#include <stdio.h>
#include <string.h>
#define PRINTF_UART UART0_BASE
// Override 'fputc' function in order to use printf() to output to UART
int fputc(int _c, register FILE *_fp)
{
UARTCharPut(PRINTF_UART, (uint8_t)_c);
return _c;
}
// Override 'fputs' function in order to use printf() to output to UART
int fputs(const char *_ptr, register FILE *_fp)
{
unsigned int i, len;
len = strlen(_ptr);
for(i=0 ; i<len ; i++)
{
UARTCharPut(PRINTF_UART, (uint8_t)_ptr[i]);
}
return len;
}

IAR

In IAR the function putchar must be overridden.

#include <stdio.h>
#include <string.h>
#define PRINTF_UART UART0_BASE
// Override 'putchar' function in order to use printf() to output to UART.
int putchar(int data)
{
UARTCharPut(PRINTF_UART, (uint8_t)data);
return data;
}

Function Documentation

§ UARTBreakCtl()

static void UARTBreakCtl ( uint32_t  ui32Base,
bool  bBreakState 
)
inlinestatic

Causes a BREAK to be sent.

Note
For proper transmission of a break command, the break must be asserted for at least two complete frames.
Parameters
ui32Baseis the base address of the UART port.
bBreakStatecontrols the output level.
  • true : Asserts a break condition on the UART.
  • false : Removes the break condition.
Returns
None
663 {
664  // Check the arguments.
665  ASSERT(UARTBaseValid(ui32Base));
666 
667  // Set the break condition as requested.
668  HWREG(ui32Base + UART_O_LCRH) =
669  (bBreakState ?
670  (HWREG(ui32Base + UART_O_LCRH) | UART_LCRH_BRK) :
671  (HWREG(ui32Base + UART_O_LCRH) & ~(UART_LCRH_BRK)));
672 }
ASSERT
#define ASSERT(expr)
Definition: debug.h:71
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§ UARTBusy()

static bool UARTBusy ( uint32_t  ui32Base)
inlinestatic

Determines whether the UART transmitter is busy or not.

Allows the caller to determine whether all transmitted bytes have cleared the transmitter hardware. If false is returned, the transmit FIFO is empty and all bits of the last transmitted character, including all stop bits, have left the hardware shift register.

Parameters
ui32Baseis the base address of the UART port.
Returns
Returns status of UART transmitter.
  • true : UART is transmitting.
  • false : All transmissions are complete.
637 {
638  // Check the argument.
639  ASSERT(UARTBaseValid(ui32Base));
640 
641  // Determine if the UART is busy.
642  return((HWREG(ui32Base + UART_O_FR) & UART_FR_BUSY) ?
643  UART_BUSY : UART_IDLE);
644 }
UART_BUSY
#define UART_BUSY
Definition: uart.h:183
ASSERT
#define ASSERT(expr)
Definition: debug.h:71
UART_IDLE
#define UART_IDLE
Definition: uart.h:184

§ UARTCharGet()

int32_t UARTCharGet ( uint32_t  ui32Base)

Waits for a character from the specified port.

This function gets a character from the receive FIFO for the specified port. If there are no characters available, this function waits until a character is received before returning.

Parameters
ui32Baseis the base address of the UART port.
Returns
Returns the character read from the specified port, cast as an int32_t.

Referenced by UARTSpaceAvail().

200 {
201  // Check the arguments.
202  ASSERT(UARTBaseValid(ui32Base));
203 
204  // Wait until a char is available.
205  while(HWREG(ui32Base + UART_O_FR) & UART_FR_RXFE)
206  {
207  }
208 
209  // Now get the character.
210  return(HWREG(ui32Base + UART_O_DR));
211 }
ASSERT
#define ASSERT(expr)
Definition: debug.h:71

§ UARTCharGetNonBlocking()

int32_t UARTCharGetNonBlocking ( uint32_t  ui32Base)

Receives a character from the specified port.

This function gets a character from the receive FIFO for the specified port.

Note
The UARTCharsAvail() function should be called before attempting to call this function.
Parameters
ui32Baseis the base address of the UART port.
Returns
Returns the character read from the specified port, cast as an int32_t. A -1 is returned if there are no characters present in the receive FIFO.
See also
UARTCharsAvail()

Referenced by UARTSpaceAvail().

176 {
177  // Check the arguments.
178  ASSERT(UARTBaseValid(ui32Base));
179 
180  // See if there are any characters in the receive FIFO.
181  if(!(HWREG(ui32Base + UART_O_FR) & UART_FR_RXFE))
182  {
183  // Read and return the next character.
184  return(HWREG(ui32Base + UART_O_DR));
185  }
186  else
187  {
188  // There are no characters, so return a failure.
189  return(-1);
190  }
191 }
ASSERT
#define ASSERT(expr)
Definition: debug.h:71

§ UARTCharPut()

void UARTCharPut ( uint32_t  ui32Base,
uint8_t  ui8Data 
)

Waits to send a character from the specified port.

This function sends the character ui8Data to the transmit FIFO for the specified port. If there is no space available in the transmit FIFO, this function waits until there is space available before returning.

Parameters
ui32Baseis the base address of the UART port.
ui8Datais the character to be transmitted.
Returns
None

Referenced by UARTSpaceAvail().

247 {
248  // Check the arguments.
249  ASSERT(UARTBaseValid(ui32Base));
250 
251  // Wait until space is available.
252  while(HWREG(ui32Base + UART_O_FR) & UART_FR_TXFF)
253  {
254  }
255 
256  // Send the char.
257  HWREG(ui32Base + UART_O_DR) = ui8Data;
258 }
ASSERT
#define ASSERT(expr)
Definition: debug.h:71

§ UARTCharPutNonBlocking()

bool UARTCharPutNonBlocking ( uint32_t  ui32Base,
uint8_t  ui8Data 
)

Sends a character to the specified port.

This function writes the character ui8Data to the transmit FIFO for the specified port. This function does not block, so if there is no space available, then a false is returned, and the application must retry the function later.

Parameters
ui32Baseis the base address of the UART port.
ui8Datais the character to be transmitted.
Returns
Returns status of the character transmit.
  • true : The character was successfully placed in the transmit FIFO.
  • false : There was no space available in the transmit FIFO. Try again later.

Referenced by UARTSpaceAvail().

220 {
221  // Check the arguments.
222  ASSERT(UARTBaseValid(ui32Base));
223 
224  // See if there is space in the transmit FIFO.
225  if(!(HWREG(ui32Base + UART_O_FR) & UART_FR_TXFF))
226  {
227  // Write this character to the transmit FIFO.
228  HWREG(ui32Base + UART_O_DR) = ui8Data;
229 
230  // Success.
231  return(true);
232  }
233  else
234  {
235  // There is no space in the transmit FIFO, so return a failure.
236  return(false);
237  }
238 }
ASSERT
#define ASSERT(expr)
Definition: debug.h:71

§ UARTCharsAvail()

static bool UARTCharsAvail ( uint32_t  ui32Base)
inlinestatic

Determines if there are any characters in the receive FIFO.

This function returns a flag indicating whether or not there is data available in the receive FIFO.

Parameters
ui32Baseis the base address of the UART port.
Returns
Returns status of the receive FIFO.
  • true : There is data in the receive FIFO.
  • false : There is no data in the receive FIFO.
515 {
516  // Check the arguments.
517  ASSERT(UARTBaseValid(ui32Base));
518 
519  // Return the availability of characters.
520  return((HWREG(ui32Base + UART_O_FR) & UART_FR_RXFE) ? false : true);
521 }
ASSERT
#define ASSERT(expr)
Definition: debug.h:71

§ UARTConfigGetExpClk()

void UARTConfigGetExpClk ( uint32_t  ui32Base,
uint32_t  ui32UARTClk,
uint32_t *  pui32Baud,
uint32_t *  pui32Config 
)

Gets the current configuration of a UART.

The baud rate and data format for the UART is determined, given an explicitly provided peripheral clock (hence the ExpClk suffix). The returned baud rate is the actual baud rate; it may not be the exact baud rate requested or an "official" baud rate. The data format returned in pui32Config is enumerated the same as the ui32Config parameter of UARTConfigSetExpClk().

Note
The peripheral clock is not necessarily the same as the processor clock. The frequency of the peripheral clock is set by the system control.
Parameters
ui32Baseis the base address of the UART port.
ui32UARTClkis the rate of the clock supplied to the UART module.
pui32Baudis a pointer to storage for the baud rate.
pui32Configis a pointer to storage for the data format.
Returns
None

Referenced by UARTFIFOLevelSet().

127 {
128  uint32_t ui32Int, ui32Frac;
129 
130  // Check the arguments.
131  ASSERT(UARTBaseValid(ui32Base));
132 
133  // Compute the baud rate.
134  ui32Int = HWREG(ui32Base + UART_O_IBRD);
135  ui32Frac = HWREG(ui32Base + UART_O_FBRD);
136  *pui32Baud = (ui32UARTClk * 4) / ((64 * ui32Int) + ui32Frac);
137 
138  // Get the parity, data length, and number of stop bits.
139  *pui32Config = (HWREG(ui32Base + UART_O_LCRH) &
140  (UART_LCRH_SPS | UART_LCRH_WLEN_M | UART_LCRH_STP2 |
141  UART_LCRH_EPS | UART_LCRH_PEN));
142 }
ASSERT
#define ASSERT(expr)
Definition: debug.h:71

§ UARTConfigSetExpClk()

void UARTConfigSetExpClk ( uint32_t  ui32Base,
uint32_t  ui32UARTClk,
uint32_t  ui32Baud,
uint32_t  ui32Config 
)

Sets the configuration of a UART.

This function configures the UART for operation in the specified data format.

Note
The peripheral clock is not necessarily the same as the processor clock. The frequency of the peripheral clock is set by the system control.
Parameters
ui32Baseis the base address of the UART port.
ui32UARTClkis the rate of the clock supplied to the UART module.
ui32Baudis the desired baud rate.
  • Minimum baud rate: ui32Baud >= ceil(ui32UARTClk / 1,048,559.875)
  • Maximum baud rate: ui32Baud <= floor(ui32UARTClk / 15.875)
ui32Configis the data format for the port. The parameter is the bitwise OR of three values:
Returns
None

Referenced by UARTFIFOLevelSet().

98 {
99  uint32_t ui32Div;
100 
101  // Check the arguments.
102  ASSERT(UARTBaseValid(ui32Base));
103  ASSERT(ui32Baud != 0);
104 
105  // Stop the UART.
106  UARTDisable(ui32Base);
107 
108  // Compute the fractional baud rate divider.
109  ui32Div = (((ui32UARTClk * 8) / ui32Baud) + 1) / 2;
110 
111  // Set the baud rate.
112  HWREG(ui32Base + UART_O_IBRD) = ui32Div / 64;
113  HWREG(ui32Base + UART_O_FBRD) = ui32Div % 64;
114 
115  // Set parity, data length, and number of stop bits.
116  HWREG(ui32Base + UART_O_LCRH) = ui32Config;
117 }
UARTDisable
void UARTDisable(uint32_t ui32Base)
Disables transmitting and receiving.
Definition: uart.c:150
ASSERT
#define ASSERT(expr)
Definition: debug.h:71
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§ UARTDisable()

void UARTDisable ( uint32_t  ui32Base)

Disables transmitting and receiving.

This function clears the UARTEN, TXE, and RXE bits, waits for the end of transmission of the current character, and flushes the transmit FIFO.

Parameters
ui32Baseis the base address of the UART port.
Returns
None

Referenced by UARTConfigSetExpClk(), and UARTEnable().

151 {
152 
153  // Check the arguments.
154  ASSERT(UARTBaseValid(ui32Base));
155 
156  // Wait for end of TX.
157  while(HWREG(ui32Base + UART_O_FR) & UART_FR_BUSY)
158  {
159  }
160 
161  // Disable the FIFO.
162  HWREG(ui32Base + UART_O_LCRH) &= ~(UART_LCRH_FEN);
163 
164  // Disable the UART.
165  HWREG(ui32Base + UART_O_CTL) &= ~(UART_CTL_UARTEN | UART_CTL_TXE |
166  UART_CTL_RXE);
167 }
ASSERT
#define ASSERT(expr)
Definition: debug.h:71

§ UARTDMADisable()

static void UARTDMADisable ( uint32_t  ui32Base,
uint32_t  ui32DMAFlags 
)
inlinestatic

Disable UART DMA operation.

This function is used to disable UART DMA features that were enabled by UARTDMAEnable(). The specified UART DMA features are disabled.

Parameters
ui32Baseis the base address of the UART port.
ui32DMAFlagsis a bit mask of the DMA features to disable. The parameter is the bitwise OR of any of the following values:
  • UART_DMA_RX : Enable DMA for receive.
  • UART_DMA_TX : Enable DMA for transmit.
  • UART_DMA_ERR_RXSTOP : Disable DMA receive on UART error.
Returns
None
925 {
926  // Check the arguments.
927  ASSERT(UARTBaseValid(ui32Base));
928 
929  // Clear the requested bits in the UART DMA control register.
930  HWREG(ui32Base + UART_O_DMACTL) &= ~ui32DMAFlags;
931 }
ASSERT
#define ASSERT(expr)
Definition: debug.h:71

§ UARTDMAEnable()

static void UARTDMAEnable ( uint32_t  ui32Base,
uint32_t  ui32DMAFlags 
)
inlinestatic

Enable UART DMA operation.

The specified UART DMA features are enabled. The UART can be configured to use DMA for transmit or receive, and to disable receive if an error occurs.

Note
The uDMA controller must also be set up before DMA can be used with the UART.
Parameters
ui32Baseis the base address of the UART port.
ui32DMAFlagsis a bit mask of the DMA features to enable. The parameter is the bitwise OR of any of the following values:
  • UART_DMA_RX : Enable DMA for receive.
  • UART_DMA_TX : Enable DMA for transmit.
  • UART_DMA_ERR_RXSTOP : Disable DMA receive on UART error.
Returns
None
898 {
899  // Check the arguments.
900  ASSERT(UARTBaseValid(ui32Base));
901 
902  // Set the requested bits in the UART DMA control register.
903  HWREG(ui32Base + UART_O_DMACTL) |= ui32DMAFlags;
904 }
ASSERT
#define ASSERT(expr)
Definition: debug.h:71

§ UARTEnable()

static void UARTEnable ( uint32_t  ui32Base)
inlinestatic

Enables transmitting and receiving.

This function sets the UARTEN, TXE, and RXE bits, and enables the transmit and receive FIFOs.

Parameters
ui32Baseis the base address of the UART port.
Returns
None
431 {
432  // Check the arguments.
433  ASSERT(UARTBaseValid(ui32Base));
434 
435  // Enable the FIFO.
436  HWREG(ui32Base + UART_O_LCRH) |= UART_LCRH_FEN;
437 
438  // Enable RX, TX, and the UART.
439  HWREG(ui32Base + UART_O_CTL) |= (UART_CTL_UARTEN | UART_CTL_TXE |
440  UART_CTL_RXE);
441 }
ASSERT
#define ASSERT(expr)
Definition: debug.h:71
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§ UARTFIFODisable()

static void UARTFIFODisable ( uint32_t  ui32Base)
inlinestatic

Disables the transmit and receive FIFOs.

This functions disables the transmit and receive FIFOs in the UART.

Parameters
ui32Baseis the base address of the UART port.
Returns
None
491 {
492  // Check the arguments.
493  ASSERT(UARTBaseValid(ui32Base));
494 
495  // Disable the FIFO.
496  HWREG(ui32Base + UART_O_LCRH) &= ~(UART_LCRH_FEN);
497 }
ASSERT
#define ASSERT(expr)
Definition: debug.h:71

§ UARTFIFOEnable()

static void UARTFIFOEnable ( uint32_t  ui32Base)
inlinestatic

Enables the transmit and receive FIFOs.

This functions enables the transmit and receive FIFOs in the UART.

Parameters
ui32Baseis the base address of the UART port.
Returns
None
470 {
471  // Check the arguments.
472  ASSERT(UARTBaseValid(ui32Base));
473 
474  // Enable the FIFO.
475  HWREG(ui32Base + UART_O_LCRH) |= UART_LCRH_FEN;
476 }
ASSERT
#define ASSERT(expr)
Definition: debug.h:71

§ UARTFIFOLevelGet()

void UARTFIFOLevelGet ( uint32_t  ui32Base,
uint32_t *  pui32TxLevel,
uint32_t *  pui32RxLevel 
)

Gets the FIFO level at which interrupts are generated.

This function gets the FIFO level at which transmit and receive interrupts are generated.

Parameters
ui32Baseis the base address of the UART port.
pui32TxLevelis a pointer to storage for the transmit FIFO level, returned as one of:
pui32RxLevelis a pointer to storage for the receive FIFO level, returned as one of:
Returns
None

Referenced by UARTFIFOLevelSet().

76 {
77  uint32_t ui32Temp;
78 
79  // Check the arguments.
80  ASSERT(UARTBaseValid(ui32Base));
81 
82  // Read the FIFO level register.
83  ui32Temp = HWREG(ui32Base + UART_O_IFLS);
84 
85  // Extract the transmit and receive FIFO levels.
86  *pui32TxLevel = ui32Temp & UART_IFLS_TXSEL_M;
87  *pui32RxLevel = ui32Temp & UART_IFLS_RXSEL_M;
88 }
ASSERT
#define ASSERT(expr)
Definition: debug.h:71

§ UARTFIFOLevelSet()

static void UARTFIFOLevelSet ( uint32_t  ui32Base,
uint32_t  ui32TxLevel,
uint32_t  ui32RxLevel 
)
inlinestatic

Sets the FIFO level at which interrupts are generated.

This function sets the FIFO level at which transmit and receive interrupts are generated.

Parameters
ui32Baseis the base address of the UART port.
ui32TxLevelis the transmit FIFO interrupt level, specified as one of:
ui32RxLevelis the receive FIFO interrupt level, specified as one of:
Returns
None
307 {
308  // Check the arguments.
309  ASSERT(UARTBaseValid(ui32Base));
310  ASSERT((ui32TxLevel == UART_FIFO_TX1_8) ||
311  (ui32TxLevel == UART_FIFO_TX2_8) ||
312  (ui32TxLevel == UART_FIFO_TX4_8) ||
313  (ui32TxLevel == UART_FIFO_TX6_8) ||
314  (ui32TxLevel == UART_FIFO_TX7_8));
315  ASSERT((ui32RxLevel == UART_FIFO_RX1_8) ||
316  (ui32RxLevel == UART_FIFO_RX2_8) ||
317  (ui32RxLevel == UART_FIFO_RX4_8) ||
318  (ui32RxLevel == UART_FIFO_RX6_8) ||
319  (ui32RxLevel == UART_FIFO_RX7_8));
320 
321  // Set the FIFO interrupt levels.
322  HWREG(ui32Base + UART_O_IFLS) = ui32TxLevel | ui32RxLevel;
323 }
UART_FIFO_RX2_8
#define UART_FIFO_RX2_8
Definition: uart.h:154
UART_FIFO_TX7_8
#define UART_FIFO_TX7_8
Definition: uart.h:145
UART_FIFO_RX6_8
#define UART_FIFO_RX6_8
Definition: uart.h:156
UART_FIFO_RX7_8
#define UART_FIFO_RX7_8
Definition: uart.h:157
ASSERT
#define ASSERT(expr)
Definition: debug.h:71
UART_FIFO_TX6_8
#define UART_FIFO_TX6_8
Definition: uart.h:144
UART_FIFO_TX4_8
#define UART_FIFO_TX4_8
Definition: uart.h:143
UART_FIFO_TX1_8
#define UART_FIFO_TX1_8
Definition: uart.h:141
UART_FIFO_RX4_8
#define UART_FIFO_RX4_8
Definition: uart.h:155
UART_FIFO_RX1_8
#define UART_FIFO_RX1_8
Definition: uart.h:153
UART_FIFO_TX2_8
#define UART_FIFO_TX2_8
Definition: uart.h:142
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§ UARTHwFlowControlDisable()

static void UARTHwFlowControlDisable ( uint32_t  ui32Base)
inlinestatic

Disables hardware flow control for both CTS and RTS.

Hardware flow control is disabled by default.

Parameters
ui32Baseis the base address of the UART port.
Returns
None
1020 {
1021  // Check the arguments.
1022  ASSERT( UARTBaseValid( ui32Base ));
1023 
1024  HWREG( ui32Base + UART_O_CTL ) &= ~( UART_CTL_CTSEN | UART_CTL_RTSEN );
1025 }
ASSERT
#define ASSERT(expr)
Definition: debug.h:71

§ UARTHwFlowControlEnable()

static void UARTHwFlowControlEnable ( uint32_t  ui32Base)
inlinestatic

Enables hardware flow control for both CTS and RTS.

Hardware flow control is disabled by default.

Parameters
ui32Baseis the base address of the UART port.
Returns
None
1000 {
1001  // Check the arguments.
1002  ASSERT( UARTBaseValid( ui32Base ));
1003 
1004  HWREG( ui32Base + UART_O_CTL ) |= ( UART_CTL_CTSEN | UART_CTL_RTSEN );
1005 }
ASSERT
#define ASSERT(expr)
Definition: debug.h:71

§ UARTIntClear()

static void UARTIntClear ( uint32_t  ui32Base,
uint32_t  ui32IntFlags 
)
inlinestatic

Clears UART interrupt sources.

The specified UART interrupt sources are cleared, so that they no longer assert. This function must be called in the interrupt handler to keep the interrupt from being recognized again immediately upon exit.

Note
Due to write buffers and synchronizers in the system it may take several clock cycles from a register write clearing an event in a module and until the event is actually cleared in the NVIC of the system CPU. It is recommended to clear the event source early in the interrupt service routine (ISR) to allow the event clear to propagate to the NVIC before returning from the ISR. At the same time, an early event clear allows new events of the same type to be pended instead of ignored if the event is cleared later in the ISR. It is the responsibility of the programmer to make sure that enough time has passed before returning from the ISR to avoid false re-triggering of the cleared event. A simple, although not necessarily optimal, way of clearing an event before returning from the ISR is:
  1. Write to clear event (interrupt source). (buffered write)
  2. Dummy read from the event source module. (making sure the write has propagated)
  3. Wait two system CPU clock cycles (user code or two NOPs). (allowing cleared event to propagate through any synchronizers)
Parameters
ui32Baseis the base address of the UART port.
ui32IntFlagsis a bit mask of the interrupt sources to be cleared.
Returns
None
867 {
868  // Check the arguments
869  ASSERT(UARTBaseValid(ui32Base));
870 
871  // Clear the requested interrupt sources
872  HWREG(ui32Base + UART_O_ICR) = ui32IntFlags;
873 }
ASSERT
#define ASSERT(expr)
Definition: debug.h:71

§ UARTIntDisable()

static void UARTIntDisable ( uint32_t  ui32Base,
uint32_t  ui32IntFlags 
)
inlinestatic

Disables individual UART interrupt sources.

This function disables the indicated UART interrupt sources. Only the sources that are enabled can be reflected to the processor interrupt; disabled sources have no effect on the processor.

Parameters
ui32Baseis the base address of the UART port.
ui32IntFlagsis the bit mask of the interrupt sources to be disabled.
Returns
None
776 {
777  // Check the arguments.
778  ASSERT(UARTBaseValid(ui32Base));
779 
780  // Disable the specified interrupts.
781  HWREG(ui32Base + UART_O_IMSC) &= ~(ui32IntFlags);
782 }
ASSERT
#define ASSERT(expr)
Definition: debug.h:71

§ UARTIntEnable()

static void UARTIntEnable ( uint32_t  ui32Base,
uint32_t  ui32IntFlags 
)
inlinestatic

Enables individual UART interrupt sources.

This function enables the indicated UART interrupt sources. Only the sources that are enabled can be reflected to the processor interrupt; disabled sources have no effect on the processor.

Parameters
ui32Baseis the base address of the UART port.
ui32IntFlagsis the bit mask of the interrupt sources to be enabled. The parameter is the bitwise OR of any of the following:
Returns
None
743 {
744  // Check the arguments.
745  ASSERT(UARTBaseValid(ui32Base));
746 
747  // Enable the specified interrupts.
748  HWREG(ui32Base + UART_O_IMSC) |= ui32IntFlags;
749 }
ASSERT
#define ASSERT(expr)
Definition: debug.h:71

§ UARTIntRegister()

void UARTIntRegister ( uint32_t  ui32Base,
void(*)(void)  pfnHandler 
)

Registers an interrupt handler for a UART interrupt in the dynamic interrupt table.

Note
Only use this function if you want to use the dynamic vector table (in SRAM)!

This function registers a function as the interrupt handler for a specific interrupt and enables the corresponding interrupt in the interrupt controller.

Specific UART interrupts must be enabled via UARTIntEnable(). It is the interrupt handler's responsibility to clear the interrupt source.

Parameters
ui32Baseis the base address of the UART module.
pfnHandleris a pointer to the function to be called when the UART interrupt occurs.
Returns
None
See also
IntRegister() for important information about registering interrupt handlers.

Referenced by UARTBreakCtl().

267 {
268  // Check the arguments.
269  ASSERT(UARTBaseValid(ui32Base));
270 
271  // Register and enable the interrupt handler.
272  // (Doing the '& 0xFFFF' to catch both buffered and unbuffered offsets)
273  if (( ui32Base & 0xFFFF ) == ( UART0_BASE & 0xFFFF ))
274  {
275  IntRegister(INT_UART0_COMB, pfnHandler);
276  IntEnable(INT_UART0_COMB);
277  }
278  else
279  {
280  IntRegister(INT_UART1_COMB, pfnHandler);
281  IntEnable(INT_UART1_COMB);
282  }
283 }
ASSERT
#define ASSERT(expr)
Definition: debug.h:71
IntRegister
void IntRegister(uint32_t ui32Interrupt, void(*pfnHandler)(void))
Registers a function as an interrupt handler in the dynamic vector table.
Definition: interrupt.c:151
IntEnable
void IntEnable(uint32_t ui32Interrupt)
Enables an interrupt or system exception.
Definition: interrupt.c:281
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§ UARTIntStatus()

static uint32_t UARTIntStatus ( uint32_t  ui32Base,
bool  bMasked 
)
inlinestatic

Gets the current interrupt status.

This function returns the interrupt status for the specified UART. Either the raw interrupt status or the status of interrupts that are allowed to reflect to the processor can be returned.

Parameters
ui32Baseis the base address of the UART port.
bMaskedselects either raw or masked interrupt.
  • true : Masked interrupt status is required.
  • false : Raw interrupt status is required.
Returns
Returns the current interrupt status, enumerated as a bit field of:
811 {
812  // Check the arguments.
813  ASSERT(UARTBaseValid(ui32Base));
814 
815  // Return either the interrupt status or the raw interrupt status as
816  // requested.
817  if(bMasked)
818  {
819  return(HWREG(ui32Base + UART_O_MIS));
820  }
821  else
822  {
823  return(HWREG(ui32Base + UART_O_RIS));
824  }
825 }
ASSERT
#define ASSERT(expr)
Definition: debug.h:71

§ UARTIntUnregister()

void UARTIntUnregister ( uint32_t  ui32Base)

Unregisters an interrupt handler for a UART interrupt in the dynamic interrupt table.

This function does the actual unregistering of the interrupt handler. It clears the handler to be called when a UART interrupt occurs. This function also masks off the interrupt in the interrupt controller so that the interrupt handler no longer is called.

Parameters
ui32Baseis the base address of the UART module.
Returns
None
See also
IntRegister() for important information about registering interrupt handlers.

Referenced by UARTBreakCtl().

292 {
293  // Check the arguments.
294  ASSERT(UARTBaseValid(ui32Base));
295 
296  // Disable and unregister the interrupt.
297  // (Doing the '& 0xFFFF' to catch both buffered and unbuffered offsets)
298  if (( ui32Base & 0xFFFF ) == ( UART0_BASE & 0xFFFF ))
299  {
300  IntDisable(INT_UART0_COMB);
301  IntUnregister(INT_UART0_COMB);
302  }
303  else
304  {
305  IntDisable(INT_UART1_COMB);
306  IntUnregister(INT_UART1_COMB);
307  }
308 }
ASSERT
#define ASSERT(expr)
Definition: debug.h:71
IntUnregister
void IntUnregister(uint32_t ui32Interrupt)
Unregisters an interrupt handler in the dynamic vector table.
Definition: interrupt.c:187
IntDisable
void IntDisable(uint32_t ui32Interrupt)
Disables an interrupt or system exception.
Definition: interrupt.c:325
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§ UARTParityModeGet()

static uint32_t UARTParityModeGet ( uint32_t  ui32Base)
inlinestatic

Gets the type of parity currently being used.

This function gets the type of parity used for transmitting data and expected when receiving data.

Parameters
ui32Baseis the base address of the UART port.
Returns
Returns the current parity settings, specified as one of:
271 {
272  // Check the arguments.
273  ASSERT(UARTBaseValid(ui32Base));
274 
275  // Return the current parity setting
276  return(HWREG(ui32Base + UART_O_LCRH) &
277  (UART_LCRH_SPS | UART_LCRH_EPS | UART_LCRH_PEN));
278 }
ASSERT
#define ASSERT(expr)
Definition: debug.h:71

§ UARTParityModeSet()

static void UARTParityModeSet ( uint32_t  ui32Base,
uint32_t  ui32Parity 
)
inlinestatic

Sets the type of parity.

This function sets the type of parity to use for transmitting and expect when receiving.

Parameters
ui32Baseis the base address of the UART port.
ui32Parityspecifies the type of parity to use. The last two allow direct control of the parity bit; it is always either one or zero based on the mode.
Returns
None
237 {
238  // Check the arguments.
239  ASSERT(UARTBaseValid(ui32Base));
240  ASSERT((ui32Parity == UART_CONFIG_PAR_NONE) ||
241  (ui32Parity == UART_CONFIG_PAR_EVEN) ||
242  (ui32Parity == UART_CONFIG_PAR_ODD) ||
243  (ui32Parity == UART_CONFIG_PAR_ONE) ||
244  (ui32Parity == UART_CONFIG_PAR_ZERO));
245 
246  // Set the parity mode.
247  HWREG(ui32Base + UART_O_LCRH) = ((HWREG(ui32Base + UART_O_LCRH) &
248  ~(UART_LCRH_SPS | UART_LCRH_EPS |
249  UART_LCRH_PEN)) | ui32Parity);
250 }
UART_CONFIG_PAR_ODD
#define UART_CONFIG_PAR_ODD
Definition: uart.h:131
UART_CONFIG_PAR_EVEN
#define UART_CONFIG_PAR_EVEN
Definition: uart.h:130
ASSERT
#define ASSERT(expr)
Definition: debug.h:71
UART_CONFIG_PAR_NONE
#define UART_CONFIG_PAR_NONE
Definition: uart.h:129
UART_CONFIG_PAR_ZERO
#define UART_CONFIG_PAR_ZERO
Definition: uart.h:133
UART_CONFIG_PAR_ONE
#define UART_CONFIG_PAR_ONE
Definition: uart.h:132

§ UARTRxErrorClear()

static void UARTRxErrorClear ( uint32_t  ui32Base)
inlinestatic

Clears all reported receiver errors.

This function is used to clear all receiver error conditions reported via UARTRxErrorGet(). If using the overrun, framing error, parity error or break interrupts, this function must be called after clearing the interrupt to ensure that later errors of the same type trigger another interrupt.

Parameters
ui32Baseis the base address of the UART port.
Returns
None
978 {
979  // Check the arguments.
980  ASSERT(UARTBaseValid(ui32Base));
981 
982  // Any write to the Error Clear Register will clear all bits which are
983  // currently set.
984  HWREG(ui32Base + UART_O_ECR) = 0;
985 }
ASSERT
#define ASSERT(expr)
Definition: debug.h:71

§ UARTRxErrorGet()

static uint32_t UARTRxErrorGet ( uint32_t  ui32Base)
inlinestatic

Gets current receiver errors.

This function returns the current state of each of the 4 receiver error sources. The returned errors are equivalent to the four error bits returned via the previous call to UARTCharGet() or UARTCharGetNonBlocking() with the exception that the overrun error is set immediately the overrun occurs rather than when a character is next read.

Parameters
ui32Baseis the base address of the UART port.
Returns
Returns a bitwise OR combination of the receiver error flags:
954 {
955  // Check the arguments.
956  ASSERT(UARTBaseValid(ui32Base));
957 
958  // Return the current value of the receive status register.
959  return(HWREG(ui32Base + UART_O_RSR) & 0x0000000F);
960 }
ASSERT
#define ASSERT(expr)
Definition: debug.h:71

§ UARTSpaceAvail()

static bool UARTSpaceAvail ( uint32_t  ui32Base)
inlinestatic

Determines if there is any space in the transmit FIFO.

This function returns a flag indicating whether or not there is space available in the transmit FIFO.

Parameters
ui32Baseis the base address of the UART port.
Returns
Returns status of the transmit FIFO.
  • true : There is space available in the transmit FIFO.
  • false : There is no space available in the transmit FIFO.
539 {
540  // Check the arguments.
541  ASSERT(UARTBaseValid(ui32Base));
542 
543  // Return the availability of space.
544  return((HWREG(ui32Base + UART_O_FR) & UART_FR_TXFF) ? false : true);
545 }
ASSERT
#define ASSERT(expr)
Definition: debug.h:71
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Macro Definition Documentation

§ UART_BUSY

#define UART_BUSY   0x00000001

Referenced by UARTBusy().

§ UART_CONFIG_PAR_EVEN

#define UART_CONFIG_PAR_EVEN   0x00000006

Referenced by UARTParityModeSet().

§ UART_CONFIG_PAR_MASK

#define UART_CONFIG_PAR_MASK   0x00000086

§ UART_CONFIG_PAR_NONE

#define UART_CONFIG_PAR_NONE   0x00000000

Referenced by UARTParityModeSet().

§ UART_CONFIG_PAR_ODD

#define UART_CONFIG_PAR_ODD   0x00000002

Referenced by UARTParityModeSet().

§ UART_CONFIG_PAR_ONE

#define UART_CONFIG_PAR_ONE   0x00000082

Referenced by UARTParityModeSet().

§ UART_CONFIG_PAR_ZERO

#define UART_CONFIG_PAR_ZERO   0x00000086

Referenced by UARTParityModeSet().

§ UART_CONFIG_STOP_MASK

#define UART_CONFIG_STOP_MASK   0x00000008

§ UART_CONFIG_STOP_ONE

#define UART_CONFIG_STOP_ONE   0x00000000

§ UART_CONFIG_STOP_TWO

#define UART_CONFIG_STOP_TWO   0x00000008

§ UART_CONFIG_WLEN_5

#define UART_CONFIG_WLEN_5   0x00000000

§ UART_CONFIG_WLEN_6

#define UART_CONFIG_WLEN_6   0x00000020

§ UART_CONFIG_WLEN_7

#define UART_CONFIG_WLEN_7   0x00000040

§ UART_CONFIG_WLEN_8

#define UART_CONFIG_WLEN_8   0x00000060

§ UART_CONFIG_WLEN_MASK

#define UART_CONFIG_WLEN_MASK   0x00000060

§ UART_DMA_ERR_RXSTOP

#define UART_DMA_ERR_RXSTOP   0x00000004

§ UART_DMA_RX

#define UART_DMA_RX   0x00000001

§ UART_DMA_TX

#define UART_DMA_TX   0x00000002

§ UART_FIFO_RX1_8

#define UART_FIFO_RX1_8   0x00000000

Referenced by UARTFIFOLevelSet().

§ UART_FIFO_RX2_8

#define UART_FIFO_RX2_8   0x00000008

Referenced by UARTFIFOLevelSet().

§ UART_FIFO_RX4_8

#define UART_FIFO_RX4_8   0x00000010

Referenced by UARTFIFOLevelSet().

§ UART_FIFO_RX6_8

#define UART_FIFO_RX6_8   0x00000018

Referenced by UARTFIFOLevelSet().

§ UART_FIFO_RX7_8

#define UART_FIFO_RX7_8   0x00000020

Referenced by UARTFIFOLevelSet().

§ UART_FIFO_TX1_8

#define UART_FIFO_TX1_8   0x00000000

Referenced by UARTFIFOLevelSet().

§ UART_FIFO_TX2_8

#define UART_FIFO_TX2_8   0x00000001

Referenced by UARTFIFOLevelSet().

§ UART_FIFO_TX4_8

#define UART_FIFO_TX4_8   0x00000002

Referenced by UARTFIFOLevelSet().

§ UART_FIFO_TX6_8

#define UART_FIFO_TX6_8   0x00000003

Referenced by UARTFIFOLevelSet().

§ UART_FIFO_TX7_8

#define UART_FIFO_TX7_8   0x00000004

Referenced by UARTFIFOLevelSet().

§ UART_IDLE

#define UART_IDLE   0x00000000

Referenced by UARTBusy().

§ UART_INT_BE

#define UART_INT_BE   ( UART_IMSC_BEIM )

§ UART_INT_CTS

#define UART_INT_CTS   ( UART_IMSC_CTSMIM )

§ UART_INT_EOT

#define UART_INT_EOT   ( UART_IMSC_EOTIM )

§ UART_INT_FE

#define UART_INT_FE   ( UART_IMSC_FEIM )

§ UART_INT_OE

#define UART_INT_OE   ( UART_IMSC_OEIM )

§ UART_INT_PE

#define UART_INT_PE   ( UART_IMSC_PEIM )

§ UART_INT_RT

#define UART_INT_RT   ( UART_IMSC_RTIM )

§ UART_INT_RX

#define UART_INT_RX   ( UART_IMSC_RXIM )

§ UART_INT_TX

#define UART_INT_TX   ( UART_IMSC_TXIM )

§ UART_RXERROR_BREAK

#define UART_RXERROR_BREAK   0x00000004

§ UART_RXERROR_FRAMING

#define UART_RXERROR_FRAMING   0x00000001

§ UART_RXERROR_OVERRUN

#define UART_RXERROR_OVERRUN   0x00000008

§ UART_RXERROR_PARITY

#define UART_RXERROR_PARITY   0x00000002