CC26xx Driver Library
[udma.h] Micro Direct Memory Access

Data Structures

struct  tDMAControlTable
 A structure that defines an entry in the channel control table. More...
 

Functions

static void uDMAEnable (uint32_t ui32Base)
 Enables the uDMA controller for use. More...
 
static void uDMADisable (uint32_t ui32Base)
 Disables the uDMA controller for use. More...
 
static uint32_t uDMAErrorStatusGet (uint32_t ui32Base)
 Gets the uDMA error status. More...
 
static void uDMAErrorStatusClear (uint32_t ui32Base)
 Clears the uDMA error interrupt. More...
 
static void uDMAChannelEnable (uint32_t ui32Base, uint32_t ui32ChannelNum)
 Enables a uDMA channel for operation. More...
 
static void uDMAChannelDisable (uint32_t ui32Base, uint32_t ui32ChannelNum)
 Disables a uDMA channel for operation. More...
 
static bool uDMAChannelIsEnabled (uint32_t ui32Base, uint32_t ui32ChannelNum)
 Checks if a uDMA channel is enabled for operation. More...
 
static void uDMAControlBaseSet (uint32_t ui32Base, void *pControlTable)
 Sets the base address for the channel control table. More...
 
static void * uDMAControlBaseGet (uint32_t ui32Base)
 Gets the base address for the channel control table. More...
 
static void * uDMAControlAlternateBaseGet (uint32_t ui32Base)
 Gets the base address for the channel control table alternate structures. More...
 
static void uDMAChannelRequest (uint32_t ui32Base, uint32_t ui32ChannelNum)
 Requests a uDMA channel to start a transfer. More...
 
void uDMAChannelAttributeEnable (uint32_t ui32Base, uint32_t ui32ChannelNum, uint32_t ui32Attr)
 Enables attributes of a uDMA channel. More...
 
void uDMAChannelAttributeDisable (uint32_t ui32Base, uint32_t ui32ChannelNum, uint32_t ui32Attr)
 Disables attributes of an uDMA channel. More...
 
uint32_t uDMAChannelAttributeGet (uint32_t ui32Base, uint32_t ui32ChannelNum)
 Gets the enabled attributes of a uDMA channel. More...
 
void uDMAChannelControlSet (uint32_t ui32Base, uint32_t ui32ChannelStructIndex, uint32_t ui32Control)
 Sets the control parameters for a uDMA channel control structure. More...
 
void uDMAChannelTransferSet (uint32_t ui32Base, uint32_t ui32ChannelStructIndex, uint32_t ui32Mode, void *pvSrcAddr, void *pvDstAddr, uint32_t ui32TransferSize)
 Sets the transfer parameters for a uDMA channel control structure. More...
 
void uDMAChannelScatterGatherSet (uint32_t ui32Base, uint32_t ui32ChannelNum, uint32_t ui32TaskCount, void *pvTaskList, uint32_t ui32IsPeriphSG)
 Configures a uDMA channel for scatter-gather mode. More...
 
uint32_t uDMAChannelSizeGet (uint32_t ui32Base, uint32_t ui32ChannelStructIndex)
 Gets the current transfer size for a uDMA channel control structure. More...
 
uint32_t uDMAChannelModeGet (uint32_t ui32Base, uint32_t ui32ChannelStructIndex)
 Gets the transfer mode for a uDMA channel control structure. More...
 
static void uDMAIntRegister (uint32_t ui32Base, uint32_t ui32IntChannel, void(*pfnHandler)(void))
 Registers an interrupt handler for the uDMA controller in the dynamic interrupt table. More...
 
static void uDMAIntUnregister (uint32_t ui32Base, uint32_t ui32IntChannel)
 Unregisters an interrupt handler for the uDMA controller in the dynamic interrupt table. More...
 
static void uDMAIntClear (uint32_t ui32Base, uint32_t ui32ChanMask)
 Clears uDMA interrupt done status. More...
 
static uint32_t uDMAIntStatus (uint32_t ui32Base)
 Get the uDMA interrupt status. More...
 
static void uDMAIntSwEventEnable (uint32_t ui32Base, uint32_t ui32IntChannel)
 Enable interrupt on software event driven uDMA transfers. More...
 
static void uDMAIntSwEventDisable (uint32_t ui32Base, uint32_t ui32IntChannel)
 Disable interrupt on software event driven uDMA transfers. More...
 
static uint32_t uDMAGetStatus (uint32_t ui32Base)
 Return the status of the uDMA module. More...
 
static void uDMAChannelPrioritySet (uint32_t ui32Base, uint32_t ui32ChannelNum)
 Set the priority of a uDMA channel. More...
 
static bool uDMAChannelPriorityGet (uint32_t ui32Base, uint32_t ui32ChannelNum)
 Get the priority of a uDMA channel. More...
 
static void uDMAChannelPriorityClear (uint32_t ui32Base, uint32_t ui32ChannelNum)
 Clear the priority of a uDMA channel. More...
 

Detailed Description

Function Documentation

§ uDMAChannelAttributeDisable()

void uDMAChannelAttributeDisable ( uint32_t  ui32Base,
uint32_t  ui32ChannelNum,
uint32_t  ui32Attr 
)

Disables attributes of an uDMA channel.

This function is used to disable attributes of a uDMA channel.

Parameters
ui32Baseis the base address of the uDMA port.
ui32ChannelNumis the channel to configure.
ui32Attris a combination of attributes for the channel. The parameter is the bitwise OR of any of the following:
  • UDMA_ATTR_USEBURST is used to restrict transfers to use only a burst mode.
  • UDMA_ATTR_ALTSELECT is used to select the alternate control structure for this channel (it is very unlikely that this flag should be used).
  • UDMA_ATTR_HIGH_PRIORITY is used to set this channel to high priority.
  • UDMA_ATTR_REQMASK is used to mask the hardware request signal from the peripheral for this channel.
Returns
None

Referenced by uDMAChannelRequest().

113 {
114  // Check the arguments.
115  ASSERT(uDMABaseValid(ui32Base));
116  ASSERT(ui32ChannelNum < UDMA_NUM_CHANNELS);
119 
120  // Clear the useburst bit for this channel if set in ui32Attr.
121  if(ui32Attr & UDMA_ATTR_USEBURST)
122  {
123  HWREG(ui32Base + UDMA_O_CLEARBURST) = 1 << ui32ChannelNum;
124  }
125 
126  // Clear the alternate control select bit for this channel, if set in
127  // ululAttr.
128  if(ui32Attr & UDMA_ATTR_ALTSELECT)
129  {
130  HWREG(ui32Base + UDMA_O_CLEARCHNLPRIALT) = 1 << ui32ChannelNum;
131  }
132 
133  // Clear the high priority bit for this channel, if set in ui32Attr.
134  if(ui32Attr & UDMA_ATTR_HIGH_PRIORITY)
135  {
136  HWREG(ui32Base + UDMA_O_CLEARCHNLPRIORITY) = 1 << ui32ChannelNum;
137  }
138 
139  // Clear the request mask bit for this channel, if set in ui32Attr.
140  if(ui32Attr & UDMA_ATTR_REQMASK)
141  {
142  HWREG(ui32Base + UDMA_O_CLEARREQMASK) = 1 << ui32ChannelNum;
143  }
144 }
#define UDMA_NUM_CHANNELS
Definition: udma.h:205
#define UDMA_ATTR_HIGH_PRIORITY
Definition: udma.h:223
#define UDMA_ATTR_REQMASK
Definition: udma.h:224
#define UDMA_ATTR_USEBURST
Definition: udma.h:221
#define ASSERT(expr)
Definition: debug.h:71
#define UDMA_ATTR_ALTSELECT
Definition: udma.h:222

§ uDMAChannelAttributeEnable()

void uDMAChannelAttributeEnable ( uint32_t  ui32Base,
uint32_t  ui32ChannelNum,
uint32_t  ui32Attr 
)

Enables attributes of a uDMA channel.

This function is used to enable attributes of a uDMA channel.

Parameters
ui32Baseis the base address of the uDMA port.
ui32ChannelNumis the channel to configure.
ui32Attris a combination of attributes for the channel. The parameter is the bitwise OR of any of the following:
  • UDMA_ATTR_USEBURST is used to restrict transfers to use only a burst mode.
  • UDMA_ATTR_ALTSELECT is used to select the alternate control structure for this channel (it is very unlikely that this flag should be used).
  • UDMA_ATTR_HIGH_PRIORITY is used to set this channel to high priority.
  • UDMA_ATTR_REQMASK is used to mask the hardware request signal from the peripheral for this channel.
Returns
None

Referenced by uDMAChannelRequest().

72 {
73  // Check the arguments.
74  ASSERT(uDMABaseValid(ui32Base));
75  ASSERT(ui32ChannelNum < UDMA_NUM_CHANNELS);
78 
79  // Set the useburst bit for this channel if set in ui32Attr.
80  if(ui32Attr & UDMA_ATTR_USEBURST)
81  {
82  HWREG(ui32Base + UDMA_O_SETBURST) = 1 << ui32ChannelNum;
83  }
84 
85  // Set the alternate control select bit for this channel,
86  // if set in ui32Attr.
87  if(ui32Attr & UDMA_ATTR_ALTSELECT)
88  {
89  HWREG(ui32Base + UDMA_O_SETCHNLPRIALT) = 1 << ui32ChannelNum;
90  }
91 
92  // Set the high priority bit for this channel, if set in ui32Attr.
93  if(ui32Attr & UDMA_ATTR_HIGH_PRIORITY)
94  {
95  HWREG(ui32Base + UDMA_O_SETCHNLPRIORITY) = 1 << ui32ChannelNum;
96  }
97 
98  // Set the request mask bit for this channel, if set in ui32Attr.
99  if(ui32Attr & UDMA_ATTR_REQMASK)
100  {
101  HWREG(ui32Base + UDMA_O_SETREQMASK) = 1 << ui32ChannelNum;
102  }
103 }
#define UDMA_NUM_CHANNELS
Definition: udma.h:205
#define UDMA_ATTR_HIGH_PRIORITY
Definition: udma.h:223
#define UDMA_ATTR_REQMASK
Definition: udma.h:224
#define UDMA_ATTR_USEBURST
Definition: udma.h:221
#define ASSERT(expr)
Definition: debug.h:71
#define UDMA_ATTR_ALTSELECT
Definition: udma.h:222

§ uDMAChannelAttributeGet()

uint32_t uDMAChannelAttributeGet ( uint32_t  ui32Base,
uint32_t  ui32ChannelNum 
)

Gets the enabled attributes of a uDMA channel.

This function returns a combination of flags representing the attributes of the uDMA channel.

Parameters
ui32Baseis the base address of the uDMA port.
ui32ChannelNumis the channel to configure.
Returns
Returns the bitwise OR of the attributes of the uDMA channel, which can be any of the following:
  • UDMA_ATTR_USEBURST is used to restrict transfers to use only a burst mode.
  • UDMA_ATTR_ALTSELECT is used to select the alternate control structure for this channel (it is very unlikely that this flag should be used).
  • UDMA_ATTR_HIGH_PRIORITY is used to set this channel to high priority.
  • UDMA_ATTR_REQMASK is used to mask the hardware request signal from the peripheral for this channel.

Referenced by uDMAChannelRequest().

153 {
154  uint32_t ui32Attr = 0;
155 
156  // Check the arguments.
157  ASSERT(uDMABaseValid(ui32Base));
158  ASSERT(ui32ChannelNum < UDMA_NUM_CHANNELS);
159 
160  // Check to see if useburst bit is set for this channel.
161  if(HWREG(ui32Base + UDMA_O_SETBURST) & (1 << ui32ChannelNum))
162  {
163  ui32Attr |= UDMA_ATTR_USEBURST;
164  }
165 
166  // Check to see if the alternate control bit is set for this channel.
167  if(HWREG(ui32Base + UDMA_O_SETCHNLPRIALT) & (1 << ui32ChannelNum))
168  {
169  ui32Attr |= UDMA_ATTR_ALTSELECT;
170  }
171 
172  // Check to see if the high priority bit is set for this channel.
173  if(HWREG(ui32Base + UDMA_O_SETCHNLPRIORITY) & (1 << ui32ChannelNum))
174  {
175  ui32Attr |= UDMA_ATTR_HIGH_PRIORITY;
176  }
177 
178  // Check to see if the request mask bit is set for this channel.
179  if(HWREG(ui32Base + UDMA_O_SETREQMASK) & (1 << ui32ChannelNum))
180  {
181  ui32Attr |= UDMA_ATTR_REQMASK;
182  }
183 
184  // Return the configuration flags.
185  return(ui32Attr);
186 }
#define UDMA_NUM_CHANNELS
Definition: udma.h:205
#define UDMA_ATTR_HIGH_PRIORITY
Definition: udma.h:223
#define UDMA_ATTR_REQMASK
Definition: udma.h:224
#define UDMA_ATTR_USEBURST
Definition: udma.h:221
#define ASSERT(expr)
Definition: debug.h:71
#define UDMA_ATTR_ALTSELECT
Definition: udma.h:222

§ uDMAChannelControlSet()

void uDMAChannelControlSet ( uint32_t  ui32Base,
uint32_t  ui32ChannelStructIndex,
uint32_t  ui32Control 
)

Sets the control parameters for a uDMA channel control structure.

This function is used to set control parameters for a uDMA transfer. These are typically parameters that are not changed often.

Note
The address increment cannot be smaller than the data size.
Parameters
ui32Baseis the base address of the uDMA port.
ui32ChannelStructIndexis the bitwise OR of the uDMA channel number and:
ui32Controlis the bitwise OR of five values:
Returns
None

Referenced by uDMAChannelRequest().

196 {
197  tDMAControlTable *pControlTable;
198 
199  // Check the arguments.
200  ASSERT(uDMABaseValid(ui32Base));
201  ASSERT(ui32ChannelStructIndex < (UDMA_NUM_CHANNELS * 2));
202  ASSERT(HWREG(ui32Base + UDMA_O_CTRL) != 0);
203 
204  // Get the base address of the control table.
205  pControlTable = (tDMAControlTable *)HWREG(ui32Base + UDMA_O_CTRL);
206 
207  // Get the current control word value and mask off the fields to be
208  // changed, then OR in the new settings.
209  pControlTable[ui32ChannelStructIndex].ui32Control =
210  ((pControlTable[ui32ChannelStructIndex].ui32Control &
211  ~(UDMA_DST_INC_M |
213  UDMA_SIZE_M |
214  UDMA_ARB_M |
216  ui32Control);
217 }
#define UDMA_NUM_CHANNELS
Definition: udma.h:205
#define UDMA_ARB_M
Definition: udma.h:277
#define UDMA_SRC_INC_M
Definition: udma.h:259
#define UDMA_DST_INC_M
Definition: udma.h:253
#define ASSERT(expr)
Definition: debug.h:71
volatile uint32_t ui32Control
The channel control mode.
Definition: udma.h:105
#define UDMA_NEXT_USEBURST
Definition: udma.h:279
A structure that defines an entry in the channel control table.
Definition: udma.h:101
#define UDMA_SIZE_M
Definition: udma.h:264

§ uDMAChannelDisable()

static void uDMAChannelDisable ( uint32_t  ui32Base,
uint32_t  ui32ChannelNum 
)
inlinestatic

Disables a uDMA channel for operation.

This function disables a specific uDMA channel. Once disabled, a channel will not respond to uDMA transfer requests until re-enabled via uDMAChannelEnable().

Parameters
ui32Baseis the base address of the uDMA port.
ui32ChannelNumis the channel number to disable.
Returns
None.
483 {
484  // Check the arguments.
485  ASSERT(uDMABaseValid(ui32Base));
486  ASSERT(ui32ChannelNum < UDMA_NUM_CHANNELS);
487 
488  // Set the bit for this channel in the enable clear register.
489  HWREG(ui32Base + UDMA_O_CLEARCHANNELEN) = 1 << ui32ChannelNum;
490 }
#define UDMA_NUM_CHANNELS
Definition: udma.h:205
#define ASSERT(expr)
Definition: debug.h:71

§ uDMAChannelEnable()

static void uDMAChannelEnable ( uint32_t  ui32Base,
uint32_t  ui32ChannelNum 
)
inlinestatic

Enables a uDMA channel for operation.

This function enables a specific uDMA channel for use. This function must be used to enable a channel before it can be used to perform a uDMA transfer.

When a uDMA transfer is completed, the channel will be automatically disabled by the uDMA controller. Therefore, this function should be called prior to starting up any new transfer.

Parameters
ui32Baseis the base address of the uDMA port.
ui32ChannelNumis the channel number to enable.
Returns
None
458 {
459  // Check the arguments.
460  ASSERT(uDMABaseValid(ui32Base));
461  ASSERT(ui32ChannelNum < UDMA_NUM_CHANNELS);
462 
463  // Set the bit for this channel in the enable set register.
464  HWREG(ui32Base + UDMA_O_SETCHANNELEN) = 1 << ui32ChannelNum;
465 }
#define UDMA_NUM_CHANNELS
Definition: udma.h:205
#define ASSERT(expr)
Definition: debug.h:71

§ uDMAChannelIsEnabled()

static bool uDMAChannelIsEnabled ( uint32_t  ui32Base,
uint32_t  ui32ChannelNum 
)
inlinestatic

Checks if a uDMA channel is enabled for operation.

This function checks to see if a specific uDMA channel is enabled. This can be used to check the status of a transfer, since the channel will be automatically disabled at the end of a transfer.

Parameters
ui32Baseis the base address of the uDMA port.
ui32ChannelNumis the channel number to check.
Returns
Returns status of uDMA channel.
  • true : Channel is enabled.
  • false : Disabled.
510 {
511  // Check the arguments.
512  ASSERT(uDMABaseValid(ui32Base));
513  ASSERT(ui32ChannelNum < UDMA_NUM_CHANNELS);
514 
515  // AND the specified channel bit with the enable register, and return the
516  // result.
517  return((HWREG(ui32Base + UDMA_O_SETCHANNELEN) & (1 << ui32ChannelNum)) ?
518  true : false);
519 }
#define UDMA_NUM_CHANNELS
Definition: udma.h:205
#define ASSERT(expr)
Definition: debug.h:71

§ uDMAChannelModeGet()

uint32_t uDMAChannelModeGet ( uint32_t  ui32Base,
uint32_t  ui32ChannelStructIndex 
)

Gets the transfer mode for a uDMA channel control structure.

This function is used to get the transfer mode for the uDMA channel. It can be used to query the status of a transfer on a channel. When the transfer is complete the mode will be UDMA_MODE_STOP.

Parameters
ui32Baseis the base address of the uDMA port.
ui32ChannelStructIndexis the bitwise OR of the uDMA channel number and:
Returns
Returns the transfer mode of the specified channel and control structure, which will be one of the following values:

Referenced by uDMAChannelRequest().

421 {
422  tDMAControlTable *pControlTable;
423  uint32_t ui32Control;
424 
425  // Check the arguments.
426  ASSERT(uDMABaseValid(ui32Base));
427  ASSERT(ui32ChannelStructIndex < (UDMA_NUM_CHANNELS * 2));
428  ASSERT(HWREG(ui32Base + UDMA_O_CTRL) != 0);
429 
430  // Get the base address of the control table.
431  pControlTable = (tDMAControlTable *)HWREG(ui32Base + UDMA_O_CTRL);
432 
433  // Get the current control word value and mask off all but the mode field.
434  ui32Control = (pControlTable[ui32ChannelStructIndex].ui32Control &
435  UDMA_MODE_M);
436 
437  // Check if scatter/gather mode, and if so, mask off the alt bit.
438  if(((ui32Control & ~UDMA_MODE_ALT_SELECT) == UDMA_MODE_MEM_SCATTER_GATHER) ||
440  {
441  ui32Control &= ~UDMA_MODE_ALT_SELECT;
442  }
443 
444  // Return the mode to the caller.
445  return(ui32Control);
446 }
#define UDMA_NUM_CHANNELS
Definition: udma.h:205
#define UDMA_MODE_MEM_SCATTER_GATHER
Definition: udma.h:237
#define UDMA_MODE_ALT_SELECT
Definition: udma.h:242
#define UDMA_MODE_PER_SCATTER_GATHER
Definition: udma.h:239
#define UDMA_MODE_M
Definition: udma.h:241
#define ASSERT(expr)
Definition: debug.h:71
volatile uint32_t ui32Control
The channel control mode.
Definition: udma.h:105
A structure that defines an entry in the channel control table.
Definition: udma.h:101

§ uDMAChannelPriorityClear()

static void uDMAChannelPriorityClear ( uint32_t  ui32Base,
uint32_t  ui32ChannelNum 
)
inlinestatic

Clear the priority of a uDMA channel.

Note
Writing 0 to a bit has no effect on the priority. To set a channel priority to high use uDMAChannelPrioritySet().
Parameters
ui32Baseis the base address of the uDMA port.
ui32ChannelNumThe uDMA channel to clear the priority for.
Returns
None
1172 {
1173  // Check the arguments.
1174  ASSERT(uDMABaseValid(ui32Base));
1175  ASSERT(ui32ChannelNum < UDMA_NUM_CHANNELS);
1176 
1177  // Clear the channel priority.
1178  HWREG(ui32Base + UDMA_O_CLEARCHNLPRIORITY) = 1 << ui32ChannelNum;
1179 }
#define UDMA_NUM_CHANNELS
Definition: udma.h:205
#define ASSERT(expr)
Definition: debug.h:71

§ uDMAChannelPriorityGet()

static bool uDMAChannelPriorityGet ( uint32_t  ui32Base,
uint32_t  ui32ChannelNum 
)
inlinestatic

Get the priority of a uDMA channel.

Parameters
ui32Baseis the base address of the uDMA port.
ui32ChannelNumThe uDMA channel to get the priority for.
Returns
Returns one of:
1147 {
1148  // Check the arguments.
1149  ASSERT(uDMABaseValid(ui32Base));
1150  ASSERT(ui32ChannelNum < UDMA_NUM_CHANNELS);
1151 
1152  // Return the channel priority.
1153  return(HWREG(ui32Base + UDMA_O_SETCHNLPRIORITY) & (1 << ui32ChannelNum) ?
1155 }
#define UDMA_NUM_CHANNELS
Definition: udma.h:205
#define UDMA_PRIORITY_LOW
Definition: udma.h:212
#define ASSERT(expr)
Definition: debug.h:71
#define UDMA_PRIORITY_HIGH
Definition: udma.h:213

§ uDMAChannelPrioritySet()

static void uDMAChannelPrioritySet ( uint32_t  ui32Base,
uint32_t  ui32ChannelNum 
)
inlinestatic

Set the priority of a uDMA channel.

Note
Writing 0 to a bit has no effect on the priority. To reset a channel priority to the default value use uDMAChannelPriorityClear().
Parameters
ui32Baseis the base address of the uDMA port.
ui32ChannelNumis uDMA channel to set the priority for.
Returns
None
1124 {
1125  // Check the arguments.
1126  ASSERT(uDMABaseValid(ui32Base));
1127  ASSERT(ui32ChannelNum < UDMA_NUM_CHANNELS);
1128 
1129  // Set the channel priority to high.
1130  HWREG(ui32Base + UDMA_O_SETCHNLPRIORITY) = 1 << ui32ChannelNum;
1131 }
#define UDMA_NUM_CHANNELS
Definition: udma.h:205
#define ASSERT(expr)
Definition: debug.h:71

§ uDMAChannelRequest()

static void uDMAChannelRequest ( uint32_t  ui32Base,
uint32_t  ui32ChannelNum 
)
inlinestatic

Requests a uDMA channel to start a transfer.

This function allows software to request a uDMA channel to begin a transfer. This could be used for performing a memory to memory transfer, or if for some reason a transfer needs to be initiated by software instead of the peripheral associated with that channel.

Note
If the channel is a software channel and interrupts are used, then the completion will be signaled on the uDMA dedicated interrupt. If a peripheral channel is used, then the completion will be signaled on the peripheral's interrupt.
Parameters
ui32Baseis the base address of the uDMA port.
ui32ChannelNumis the channel number on which to request a uDMA transfer.
Returns
None.
633 {
634  // Check the arguments.
635  ASSERT(uDMABaseValid(ui32Base));
636  ASSERT(ui32ChannelNum < UDMA_NUM_CHANNELS);
637 
638  // Set the bit for this channel in the software uDMA request register.
639  HWREG(ui32Base + UDMA_O_SOFTREQ) = 1 << ui32ChannelNum;
640 }
#define UDMA_NUM_CHANNELS
Definition: udma.h:205
#define ASSERT(expr)
Definition: debug.h:71
Here is the call graph for this function:

§ uDMAChannelScatterGatherSet()

void uDMAChannelScatterGatherSet ( uint32_t  ui32Base,
uint32_t  ui32ChannelNum,
uint32_t  ui32TaskCount,
void *  pvTaskList,
uint32_t  ui32IsPeriphSG 
)

Configures a uDMA channel for scatter-gather mode.

This function is used to configure a channel for scatter-gather mode. The caller must have already set up a task list, and pass a pointer to the start of the task list as the pvTaskList parameter.

The ui32TaskCount parameter is the count of tasks in the task list, not the size of the task list.

The flag bIsPeriphSG should be used to indicate if the scatter-gather should be configured for a peripheral or memory scatter-gather operation.

Parameters
ui32Baseis the base address of the uDMA port.
ui32ChannelNumis the uDMA channel number.
ui32TaskCountis the number of scatter-gather tasks to execute.
pvTaskListis a pointer to the beginning of the scatter-gather task list.
ui32IsPeriphSGis a flag to indicate it is a peripheral scatter-gather transfer (else it will be memory scatter-gather transfer)
Returns
None
See also
uDMATaskStructEntry()

Referenced by uDMAChannelRequest().

326 {
327  tDMAControlTable *pControlTable;
328  tDMAControlTable *pTaskTable;
329 
330  // Check the parameters.
331  ASSERT(uDMABaseValid(ui32Base));
332  ASSERT(ui32ChannelNum < UDMA_NUM_CHANNELS);
333  ASSERT(HWREG(ui32Base + UDMA_O_CTRL) != 0);
334  ASSERT(pvTaskList != 0);
335  ASSERT(ui32TaskCount <= UDMA_XFER_SIZE_MAX);
336  ASSERT(ui32TaskCount != 0);
337 
338  // Get the base address of the control table.
339  pControlTable = (tDMAControlTable *)HWREG(ui32Base + UDMA_O_CTRL);
340 
341  // Get a handy pointer to the task list.
342  pTaskTable = (tDMAControlTable *)pvTaskList;
343 
344  // Compute the ending address for the source pointer. This will be the
345  // last element of the last task in the task table.
346  pControlTable[ui32ChannelNum].pvSrcEndAddr =
347  &pTaskTable[ui32TaskCount - 1].ui32Spare;
348 
349  // Compute the ending address for the destination pointer. This will be
350  // the end of the alternate structure for this channel.
351  pControlTable[ui32ChannelNum].pvDstEndAddr =
352  &pControlTable[ui32ChannelNum | UDMA_ALT_SELECT].ui32Spare;
353 
354  // Compute the control word. Most configurable items are fixed for
355  // scatter-gather. Item and increment sizes are all 32-bit and arb
356  // size must be 4. The count is the number of items in the task list
357  // times 4 (4 words per task).
358  pControlTable[ui32ChannelNum].ui32Control =
361  (((ui32TaskCount * 4) - 1) << UDMA_XFER_SIZE_S) |
362  (ui32IsPeriphSG ? UDMA_MODE_PER_SCATTER_GATHER :
364 
365  // Scatter-gather operations can leave the alt bit set. So if doing
366  // back to back scatter-gather transfers, the second attempt may not
367  // work correctly because the alt bit is set. Therefore, clear the
368  // alt bit here to ensure that it is always cleared before a new SG
369  // transfer is started.
370  HWREG(ui32Base + UDMA_O_CLEARCHNLPRIALT) = 1 << ui32ChannelNum;
371 
372 }
#define UDMA_ARB_4
Definition: udma.h:268
#define UDMA_NUM_CHANNELS
Definition: udma.h:205
volatile void * pvSrcEndAddr
The ending source address of the data transfer.
Definition: udma.h:103
#define UDMA_MODE_MEM_SCATTER_GATHER
Definition: udma.h:237
#define UDMA_MODE_PER_SCATTER_GATHER
Definition: udma.h:239
#define UDMA_SRC_INC_32
Definition: udma.h:257
volatile uint32_t ui32Spare
An unused location.
Definition: udma.h:106
#define ASSERT(expr)
Definition: debug.h:71
#define UDMA_SIZE_32
Definition: udma.h:263
#define UDMA_XFER_SIZE_S
Definition: udma.h:282
volatile uint32_t ui32Control
The channel control mode.
Definition: udma.h:105
volatile void * pvDstEndAddr
The ending destination address of the data transfer.
Definition: udma.h:104
#define UDMA_DST_INC_32
Definition: udma.h:251
A structure that defines an entry in the channel control table.
Definition: udma.h:101
#define UDMA_XFER_SIZE_MAX
Definition: udma.h:280
#define UDMA_ALT_SELECT
Definition: udma.h:319

§ uDMAChannelSizeGet()

uint32_t uDMAChannelSizeGet ( uint32_t  ui32Base,
uint32_t  ui32ChannelStructIndex 
)

Gets the current transfer size for a uDMA channel control structure.

This function is used to get the uDMA transfer size for a channel. The transfer size is the number of items to transfer, where the size of an item might be 8, 16, or 32 bits. If a partial transfer has already occurred, then the number of remaining items will be returned. If the transfer is complete, then 0 will be returned.

Parameters
ui32Baseis the base address of the uDMA port.
ui32ChannelStructIndexis the bitwise OR of the uDMA channel number and:
Returns
Returns the number of items remaining to transfer.

Referenced by uDMAChannelRequest().

381 {
382  tDMAControlTable *pControlTable;
383  uint32_t ui32Control;
384 
385  // Check the arguments.
386  ASSERT(uDMABaseValid(ui32Base));
387  ASSERT(ui32ChannelStructIndex < (UDMA_NUM_CHANNELS * 2));
388  ASSERT(HWREG(ui32Base + UDMA_O_CTRL) != 0);
389 
390  // Get the base address of the control table.
391  pControlTable = (tDMAControlTable *)HWREG(ui32Base + UDMA_O_CTRL);
392 
393  // Get the current control word value and mask off all but the size field
394  // and the mode field.
395  ui32Control = (pControlTable[ui32ChannelStructIndex].ui32Control &
397 
398  // If the size field and mode field are 0 then the transfer is finished
399  // and there are no more items to transfer.
400  if(ui32Control == 0)
401  {
402  return(0);
403  }
404 
405  // Otherwise, if either the size field or more field is non-zero, then
406  // not all the items have been transferred.
407  else
408  {
409  // Shift the size field and add one, then return to user.
410  return((ui32Control >> UDMA_XFER_SIZE_S) + 1);
411  }
412 }
#define UDMA_NUM_CHANNELS
Definition: udma.h:205
#define UDMA_XFER_SIZE_M
Definition: udma.h:281
#define UDMA_MODE_M
Definition: udma.h:241
#define ASSERT(expr)
Definition: debug.h:71
#define UDMA_XFER_SIZE_S
Definition: udma.h:282
volatile uint32_t ui32Control
The channel control mode.
Definition: udma.h:105
A structure that defines an entry in the channel control table.
Definition: udma.h:101

§ uDMAChannelTransferSet()

void uDMAChannelTransferSet ( uint32_t  ui32Base,
uint32_t  ui32ChannelStructIndex,
uint32_t  ui32Mode,
void *  pvSrcAddr,
void *  pvDstAddr,
uint32_t  ui32TransferSize 
)

Sets the transfer parameters for a uDMA channel control structure.

This function is used to set the parameters for a uDMA transfer. These are typically parameters that are changed often. The function uDMAChannelControlSet() MUST be called at least once for this channel prior to calling this function.

The pvSrcAddr and pvDstAddr parameters are pointers to the first location of the data to be transferred. These addresses should be aligned according to the item size. The compiler will take care of this if the pointers are pointing to storage of the appropriate data type.

The two scatter/gather modes, MEMORY and PERIPHERAL, are actually different depending on whether the primary or alternate control structure is selected. This function will look for the UDMA_PRI_SELECT and UDMA_ALT_SELECT flag along with the channel number and will set the scatter/gather mode as appropriate for the primary or alternate control structure.

The channel must also be enabled using uDMAChannelEnable() after calling this function. The transfer will not begin until the channel has been set up and enabled. Note that the channel is automatically disabled after the transfer is completed, meaning that uDMAChannelEnable() must be called again after setting up the next transfer.

Note
Great care must be taken to not modify a channel control structure that is in use or else the results will be unpredictable, including the possibility of undesired data transfers to or from memory or peripherals. For BASIC and AUTO modes, it is safe to make changes when the channel is disabled, or the uDMAChannelModeGet() returns UDMA_MODE_STOP. For PINGPONG or one of the SCATTER_GATHER modes, it is safe to modify the primary or alternate control structure only when the other is being used. The uDMAChannelModeGet() function will return UDMA_MODE_STOP when a channel control structure is inactive and safe to modify.
Parameters
ui32Baseis the base address of the uDMA port.
ui32ChannelStructIndexis the bitwise OR of the uDMA channel number and:
ui32Modeis the type of uDMA transfer. The parameter should be one of the following values:
  • UDMA_MODE_STOP : Stops the uDMA transfer. The controller sets the mode to this value at the end of a transfer.
  • UDMA_MODE_BASIC : Perform a basic transfer based on request.
  • UDMA_MODE_AUTO to perform a transfer that will always complete once started even if request is removed.
  • UDMA_MODE_PINGPONG : Set up a transfer that switches between the primary and alternate control structures for the channel. This allows use of ping-pong buffering for uDMA transfers.
  • UDMA_MODE_MEM_SCATTER_GATHER : Set up a memory scatter-gather transfer.
  • UDMA_MODE_PER_SCATTER_GATHER : Set up a peripheral scatter-gather transfer.
pvSrcAddris the source address for the transfer.
pvDstAddris the destination address for the transfer.
ui32TransferSizeis the number of data items to transfer (NOT bytes).
Returns
None

Referenced by uDMAChannelRequest().

228 {
229  tDMAControlTable *pControlTable;
230  uint32_t ui32Control;
231  uint32_t ui32Inc;
232  uint32_t ui32BufferBytes;
233 
234  // Check the arguments.
235  ASSERT(uDMABaseValid(ui32Base));
236  ASSERT(ui32ChannelStructIndex < (UDMA_NUM_CHANNELS * 2));
237  ASSERT(HWREG(ui32Base + UDMA_O_CTRL) != 0);
239  ASSERT((uint32_t)pvSrcAddr >= SRAM_BASE);
240  ASSERT((uint32_t)pvDstAddr >= SRAM_BASE);
241  ASSERT((ui32TransferSize != 0) && (ui32TransferSize <= UDMA_XFER_SIZE_MAX));
242 
243  // Get the base address of the control table.
244  pControlTable = (tDMAControlTable *)HWREG(ui32Base + UDMA_O_CTRL);
245 
246  // Get the current control word value and mask off the mode and size
247  // fields.
248  ui32Control = (pControlTable[ui32ChannelStructIndex].ui32Control &
250 
251  // Adjust the mode if the alt control structure is selected.
252  if(ui32ChannelStructIndex & UDMA_ALT_SELECT)
253  {
254  if((ui32Mode == UDMA_MODE_MEM_SCATTER_GATHER) ||
255  (ui32Mode == UDMA_MODE_PER_SCATTER_GATHER))
256  {
257  ui32Mode |= UDMA_MODE_ALT_SELECT;
258  }
259  }
260 
261  // Set the transfer size and mode in the control word (but don't write the
262  // control word yet as it could kick off a transfer).
263  ui32Control |= ui32Mode | ((ui32TransferSize - 1) << UDMA_XFER_SIZE_S);
264 
265  // Get the address increment value for the source, from the control word.
266  ui32Inc = (ui32Control & UDMA_SRC_INC_M);
267 
268  // Compute the ending source address of the transfer. If the source
269  // increment is set to none, then the ending address is the same as the
270  // beginning.
271  if(ui32Inc != UDMA_SRC_INC_NONE)
272  {
273  ui32Inc = ui32Inc >> UDMA_SRC_INC_S;
274  ui32BufferBytes = ui32TransferSize << ui32Inc;
275  pvSrcAddr = (void *)((uint32_t)pvSrcAddr + ui32BufferBytes - (1 << ui32Inc));
276  }
277 
278  // Load the source ending address into the control block.
279  pControlTable[ui32ChannelStructIndex].pvSrcEndAddr = pvSrcAddr;
280 
281  // Get the address increment value for the destination, from the control
282  // word.
283  ui32Inc = ui32Control & UDMA_DST_INC_M;
284 
285  // Compute the ending destination address of the transfer. If the
286  // destination increment is set to none, then the ending address is the
287  // same as the beginning.
288  if(ui32Inc != UDMA_DST_INC_NONE)
289  {
290  // There is a special case if this is setting up a scatter-gather
291  // transfer. The destination pointer needs to point to the end of
292  // the alternate structure for this channel instead of calculating
293  // the end of the buffer in the normal way.
294  if((ui32Mode == UDMA_MODE_MEM_SCATTER_GATHER) ||
295  (ui32Mode == UDMA_MODE_PER_SCATTER_GATHER))
296  {
297  pvDstAddr =
298  (void *)&pControlTable[ui32ChannelStructIndex |
299  UDMA_ALT_SELECT].ui32Spare;
300  }
301  // Not a scatter-gather transfer, calculate end pointer normally.
302  else
303  {
304  ui32Inc = ui32Inc >> UDMA_DST_INC_S;
305  ui32BufferBytes = ui32TransferSize << ui32Inc;
306  pvDstAddr = (void *)((uint32_t)pvDstAddr + ui32BufferBytes - 1);
307  }
308  }
309 
310  // Load the destination ending address into the control block.
311  pControlTable[ui32ChannelStructIndex].pvDstEndAddr = pvDstAddr;
312 
313  // Write the new control word value.
314  pControlTable[ui32ChannelStructIndex].ui32Control = ui32Control;
315 }
#define UDMA_NUM_CHANNELS
Definition: udma.h:205
volatile void * pvSrcEndAddr
The ending source address of the data transfer.
Definition: udma.h:103
#define UDMA_SRC_INC_M
Definition: udma.h:259
#define UDMA_DST_INC_S
Definition: udma.h:254
#define UDMA_MODE_MEM_SCATTER_GATHER
Definition: udma.h:237
#define UDMA_MODE_ALT_SELECT
Definition: udma.h:242
#define UDMA_XFER_SIZE_M
Definition: udma.h:281
#define UDMA_SRC_INC_NONE
Definition: udma.h:258
#define UDMA_MODE_PER_SCATTER_GATHER
Definition: udma.h:239
#define UDMA_MODE_M
Definition: udma.h:241
#define UDMA_DST_INC_NONE
Definition: udma.h:252
#define UDMA_DST_INC_M
Definition: udma.h:253
#define ASSERT(expr)
Definition: debug.h:71
#define UDMA_XFER_SIZE_S
Definition: udma.h:282
volatile uint32_t ui32Control
The channel control mode.
Definition: udma.h:105
volatile void * pvDstEndAddr
The ending destination address of the data transfer.
Definition: udma.h:104
A structure that defines an entry in the channel control table.
Definition: udma.h:101
#define UDMA_XFER_SIZE_MAX
Definition: udma.h:280
#define UDMA_SRC_INC_S
Definition: udma.h:260
#define UDMA_ALT_SELECT
Definition: udma.h:319

§ uDMAControlAlternateBaseGet()

static void* uDMAControlAlternateBaseGet ( uint32_t  ui32Base)
inlinestatic

Gets the base address for the channel control table alternate structures.

This function gets the base address of the second half of the channel control table that holds the alternate control structures for each channel.

Parameters
ui32Baseis the base address of the uDMA port.
Returns
Returns a pointer to the base address of the second half of the channel control table.
601 {
602  // Check the arguments.
603  ASSERT(uDMABaseValid(ui32Base));
604 
605  // Read the current value of the control base register, and return it to
606  // the caller.
607  return((void *)HWREG(ui32Base + UDMA_O_ALTCTRL));
608 }
#define ASSERT(expr)
Definition: debug.h:71

§ uDMAControlBaseGet()

static void* uDMAControlBaseGet ( uint32_t  ui32Base)
inlinestatic

Gets the base address for the channel control table.

This function gets the base address of the channel control table. This table resides in system memory and holds control information for each uDMA channel.

Parameters
ui32Baseis the base address of the uDMA port.
Returns
Returns a pointer to the base address of the channel control table.
577 {
578  // Check the arguments.
579 
580  ASSERT(uDMABaseValid(ui32Base));
581  // Read the current value of the control base register, and return it to
582  // the caller.
583  return((void *)HWREG(ui32Base + UDMA_O_CTRL));
584 }
#define ASSERT(expr)
Definition: debug.h:71

§ uDMAControlBaseSet()

static void uDMAControlBaseSet ( uint32_t  ui32Base,
void *  pControlTable 
)
inlinestatic

Sets the base address for the channel control table.

This function sets the base address of the channel control table. This table resides in system memory and holds control information for each uDMA channel. The table must be aligned on a 1024 byte boundary. The base address must be set before any of the channel functions can be used. Setting the base address of the primary control table will automatically set the address for the alternate control table as the next memory location after the primary control table.

The size of the channel control table depends on the number of uDMA channels, and which transfer modes are used. Refer to the introductory text and the microcontroller datasheet for more information about the channel control table.

Note
This register cannot be read when the controller is in the reset state.
Parameters
ui32Baseis the base address of the uDMA port.
pControlTableis a pointer to the 1024 byte aligned base address of the uDMA channel control table. The address must be an absolute address in system memory space.
Returns
None
551 {
552  // Check the arguments.
553  ASSERT(uDMABaseValid(ui32Base));
554  ASSERT(((uint32_t)pControlTable & ~0x3FF) ==
555  (uint32_t)pControlTable);
556  ASSERT((uint32_t)pControlTable >= SRAM_BASE);
557 
558  // Program the base address into the register.
559  HWREG(ui32Base + UDMA_O_CTRL) = (uint32_t)pControlTable;
560 }
#define ASSERT(expr)
Definition: debug.h:71

§ uDMADisable()

static void uDMADisable ( uint32_t  ui32Base)
inlinestatic

Disables the uDMA controller for use.

This function disables the uDMA controller. Once disabled, the uDMA controller will not operate until re-enabled with uDMAEnable().

Parameters
ui32Baseis the base address of the uDMA port.
Returns
None.
385 {
386  // Check the arguments.
387  ASSERT(uDMABaseValid(ui32Base));
388 
389  // Clear the master enable bit in the config register.
390  HWREG(ui32Base + UDMA_O_CFG) = 0;
391 }
#define ASSERT(expr)
Definition: debug.h:71

§ uDMAEnable()

static void uDMAEnable ( uint32_t  ui32Base)
inlinestatic

Enables the uDMA controller for use.

This function enables the uDMA controller. The uDMA controller must be enabled before it can be configured and used.

Parameters
ui32Baseis the base address of the uDMA port.
Returns
None
363 {
364  // Check the arguments.
365  ASSERT(uDMABaseValid(ui32Base));
366 
367  // Set the master enable bit in the config register.
368  HWREG(ui32Base + UDMA_O_CFG) = UDMA_CFG_MASTERENABLE;
369 }
#define ASSERT(expr)
Definition: debug.h:71

§ uDMAErrorStatusClear()

static void uDMAErrorStatusClear ( uint32_t  ui32Base)
inlinestatic

Clears the uDMA error interrupt.

This function clears a pending uDMA error interrupt. It should be called from within the uDMA error interrupt handler to clear the interrupt.

Parameters
ui32Baseis the base address of the uDMA port.
Returns
None
430 {
431  // Check the arguments.
432  ASSERT(uDMABaseValid(ui32Base));
433 
434  // Clear the uDMA error interrupt.
435  HWREG(ui32Base + UDMA_O_ERROR) = UDMA_ERROR_STATUS;
436 }
#define ASSERT(expr)
Definition: debug.h:71

§ uDMAErrorStatusGet()

static uint32_t uDMAErrorStatusGet ( uint32_t  ui32Base)
inlinestatic

Gets the uDMA error status.

This function returns the uDMA error status. It should be called from within the uDMA error interrupt handler to determine if a uDMA error occurred.

Parameters
ui32Baseis the base address of the uDMA port.
Returns
Returns non-zero if a uDMA error is pending.
408 {
409  // Check the arguments.
410  ASSERT(uDMABaseValid(ui32Base));
411 
412  // Return the uDMA error status.
413  return(HWREG(ui32Base + UDMA_O_ERROR));
414 }
#define ASSERT(expr)
Definition: debug.h:71

§ uDMAGetStatus()

static uint32_t uDMAGetStatus ( uint32_t  ui32Base)
inlinestatic

Return the status of the uDMA module.

Note
This status register cannot be read when the controller is in the reset state.
Parameters
ui32Baseis the base address of the uDMA port.
Returns
Current status of the uDMA module.
1101 {
1102  // Check the arguments.
1103  ASSERT(uDMABaseValid(ui32Base));
1104 
1105  // Read and return the status register.
1106  return HWREG(ui32Base + UDMA_O_STATUS);
1107 }
#define ASSERT(expr)
Definition: debug.h:71

§ uDMAIntClear()

static void uDMAIntClear ( uint32_t  ui32Base,
uint32_t  ui32ChanMask 
)
inlinestatic

Clears uDMA interrupt done status.

Clears bits in the uDMA interrupt status register according to which bits are set in ui32ChanMask. There is one bit for each channel. If a a bit is set in ui32ChanMask, then that corresponding channel's interrupt status will be cleared (if it was set).

Parameters
ui32Baseis the base address of the uDMA port.
ui32ChanMaskis a 32-bit mask with one bit for each uDMA channel.
Returns
None
1001 {
1002  // Check the arguments.
1003  ASSERT(uDMABaseValid(ui32Base));
1004 
1005  // Clear the requested bits in the uDMA interrupt status register.
1006  HWREG(ui32Base + UDMA_O_REQDONE) = ui32ChanMask;
1007 }
#define ASSERT(expr)
Definition: debug.h:71

§ uDMAIntRegister()

static void uDMAIntRegister ( uint32_t  ui32Base,
uint32_t  ui32IntChannel,
void(*)(void)  pfnHandler 
)
inlinestatic

Registers an interrupt handler for the uDMA controller in the dynamic interrupt table.

Note
Only use this function if you want to use the dynamic vector table (in SRAM)!

This function registers a function as the interrupt handler for a specific interrupt and enables the corresponding interrupt in the interrupt controller.

Note
The interrupt handler for uDMA is for transfer completion when the software channel is used, and for error interrupts. The interrupts for each peripheral channel are handled through the individual peripheral interrupt handlers.
Parameters
ui32Baseis the base address of the uDMA module.
ui32IntChannelspecifies which uDMA interrupt is to be registered.
  • INT_DMA_DONE_COMB : Register an interrupt handler to process interrupts from the uDMA software channel.
  • INT_DMA_ERR : Register an interrupt handler to process uDMA error interrupts.
pfnHandleris a pointer to the function to be called when the interrupt is activated.
Returns
None
See also
IntRegister() for important information about registering interrupt handlers.
937 {
938  // Check the arguments.
939  ASSERT(uDMABaseValid(ui32Base));
940  ASSERT(pfnHandler);
941  ASSERT((ui32IntChannel == INT_DMA_DONE_COMB) || (ui32IntChannel == INT_DMA_ERR));
942 
943  // Register the interrupt handler.
944  IntRegister(ui32IntChannel, pfnHandler);
945 
946  // Enable the memory management fault.
947  IntEnable(ui32IntChannel);
948 }
#define ASSERT(expr)
Definition: debug.h:71
void IntRegister(uint32_t ui32Interrupt, void(*pfnHandler)(void))
Registers a function as an interrupt handler in the dynamic vector table.
Definition: interrupt.c:151
void IntEnable(uint32_t ui32Interrupt)
Enables an interrupt or system exception.
Definition: interrupt.c:281
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§ uDMAIntStatus()

static uint32_t uDMAIntStatus ( uint32_t  ui32Base)
inlinestatic

Get the uDMA interrupt status.

This function returns the interrupt status for the specified UDMA. This function does not differentiate between software or hardware activated interrupts.

Parameters
ui32Baseis the base address of the uDMA port.
Returns
None
1024 {
1025  // Check the arguments.
1026  ASSERT(uDMABaseValid(ui32Base));
1027 
1028  // Return the uDMA interrupt status register.
1029  return (HWREG(ui32Base + UDMA_O_REQDONE));
1030 }
#define ASSERT(expr)
Definition: debug.h:71

§ uDMAIntSwEventDisable()

static void uDMAIntSwEventDisable ( uint32_t  ui32Base,
uint32_t  ui32IntChannel 
)
inlinestatic

Disable interrupt on software event driven uDMA transfers.

This register disables the blocking of the uDMA status signals propagation to the hardware peripheral connected to the uDMA on the ui32IntChannel.

Parameters
ui32Baseis the base address of the uDMA port.
ui32IntChannelidentifies which uDMA interrupt to disable software interrupts for.
Returns
None
See also
uDMAIntSwEventEnable()
1079 {
1080  // Check the arguments.
1081  ASSERT(uDMABaseValid(ui32Base));
1082  ASSERT(ui32IntChannel < UDMA_NUM_CHANNELS);
1083 
1084  // Disable the SW channel.
1085  HWREGBITW(ui32Base + UDMA_O_DONEMASK, ui32IntChannel) = 0;
1086 }
#define UDMA_NUM_CHANNELS
Definition: udma.h:205
#define ASSERT(expr)
Definition: debug.h:71

§ uDMAIntSwEventEnable()

static void uDMAIntSwEventEnable ( uint32_t  ui32Base,
uint32_t  ui32IntChannel 
)
inlinestatic

Enable interrupt on software event driven uDMA transfers.

Note
The main purpose of this function is to prevent propagation of uDMA status signals to a peripheral, if a peripheral and a software event is sharing the uDMA channel. If it is desired to initiate a transfer by writing to a register inside the uDMA (this means a software driven channel), then the uDMA status signals propagation need to be blocked to the hardware peripherals.
Parameters
ui32Baseis the base address of the uDMA port.
ui32IntChannelidentifies which uDMA interrupt to enable software interrupts for.
Returns
None
1052 {
1053  // Check the arguments.
1054  ASSERT(uDMABaseValid(ui32Base));
1055  ASSERT(ui32IntChannel < UDMA_NUM_CHANNELS);
1056 
1057  // Enable the channel.
1058  HWREGBITW(ui32Base + UDMA_O_DONEMASK, ui32IntChannel) = 1;
1059 }
#define UDMA_NUM_CHANNELS
Definition: udma.h:205
#define ASSERT(expr)
Definition: debug.h:71

§ uDMAIntUnregister()

static void uDMAIntUnregister ( uint32_t  ui32Base,
uint32_t  ui32IntChannel 
)
inlinestatic

Unregisters an interrupt handler for the uDMA controller in the dynamic interrupt table.

This function will disable and clear the handler to be called for the specified uDMA interrupt.

Parameters
ui32Baseis the base address of the uDMA module.
ui32IntChannelspecifies which uDMA interrupt to unregister.
  • INT_DMA_DONE_COMB : Register an interrupt handler to process interrupts from the uDMA software channel.
  • INT_DMA_ERR : Register an interrupt handler to process uDMA error interrupts.
Returns
None
See also
IntRegister() for important information about registering interrupt handlers.
972 {
973  // Check the arguments.
974  ASSERT(uDMABaseValid(ui32Base));
975  ASSERT((ui32IntChannel == INT_DMA_DONE_COMB) || (ui32IntChannel == INT_DMA_ERR));
976 
977  // Disable the interrupt.
978  IntDisable(ui32IntChannel);
979 
980  // Unregister the interrupt handler.
981  IntUnregister(ui32IntChannel);
982 }
#define ASSERT(expr)
Definition: debug.h:71
void IntUnregister(uint32_t ui32Interrupt)
Unregisters an interrupt handler in the dynamic vector table.
Definition: interrupt.c:187
void IntDisable(uint32_t ui32Interrupt)
Disables an interrupt or system exception.
Definition: interrupt.c:325
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Macro Definition Documentation

§ UDMA_ALT_SELECT

#define UDMA_ALT_SELECT   0x00000020

§ UDMA_ARB_1

#define UDMA_ARB_1   0x00000000

§ UDMA_ARB_1024

#define UDMA_ARB_1024   0x00028000

§ UDMA_ARB_128

#define UDMA_ARB_128   0x0001c000

§ UDMA_ARB_16

#define UDMA_ARB_16   0x00010000

§ UDMA_ARB_2

#define UDMA_ARB_2   0x00004000

§ UDMA_ARB_256

#define UDMA_ARB_256   0x00020000

§ UDMA_ARB_32

#define UDMA_ARB_32   0x00014000

§ UDMA_ARB_4

#define UDMA_ARB_4   0x00008000

§ UDMA_ARB_512

#define UDMA_ARB_512   0x00024000

§ UDMA_ARB_64

#define UDMA_ARB_64   0x00018000

§ UDMA_ARB_8

#define UDMA_ARB_8   0x0000c000

§ UDMA_ARB_M

#define UDMA_ARB_M   0x0003C000

Referenced by uDMAChannelControlSet().

§ UDMA_ARB_S

#define UDMA_ARB_S   14

§ UDMA_ATTR_ALL

#define UDMA_ATTR_ALL   0x0000000F

§ UDMA_ATTR_ALTSELECT

#define UDMA_ATTR_ALTSELECT   0x00000002

§ UDMA_ATTR_HIGH_PRIORITY

#define UDMA_ATTR_HIGH_PRIORITY   0x00000004

§ UDMA_ATTR_REQMASK

#define UDMA_ATTR_REQMASK   0x00000008

§ UDMA_ATTR_USEBURST

#define UDMA_ATTR_USEBURST   0x00000001

§ UDMA_CHAN_AON_PROG2

#define UDMA_CHAN_AON_PROG2   13

§ UDMA_CHAN_AON_RTC

#define UDMA_CHAN_AON_RTC   15

§ UDMA_CHAN_AUX_ADC

#define UDMA_CHAN_AUX_ADC   7

§ UDMA_CHAN_AUX_SW

#define UDMA_CHAN_AUX_SW   8

§ UDMA_CHAN_DMA_PROG

#define UDMA_CHAN_DMA_PROG   14

§ UDMA_CHAN_SSI0_RX

#define UDMA_CHAN_SSI0_RX   3

§ UDMA_CHAN_SSI0_TX

#define UDMA_CHAN_SSI0_TX   4

§ UDMA_CHAN_SSI1_RX

#define UDMA_CHAN_SSI1_RX   16

§ UDMA_CHAN_SSI1_TX

#define UDMA_CHAN_SSI1_TX   17

§ UDMA_CHAN_SW_EVT0

#define UDMA_CHAN_SW_EVT0   0

§ UDMA_CHAN_SW_EVT1

#define UDMA_CHAN_SW_EVT1   18

§ UDMA_CHAN_SW_EVT2

#define UDMA_CHAN_SW_EVT2   19

§ UDMA_CHAN_SW_EVT3

#define UDMA_CHAN_SW_EVT3   20

§ UDMA_CHAN_TIMER0_A

#define UDMA_CHAN_TIMER0_A   9

§ UDMA_CHAN_TIMER0_B

#define UDMA_CHAN_TIMER0_B   10

§ UDMA_CHAN_TIMER1_A

#define UDMA_CHAN_TIMER1_A   11

§ UDMA_CHAN_TIMER1_B

#define UDMA_CHAN_TIMER1_B   12

§ UDMA_CHAN_UART0_RX

#define UDMA_CHAN_UART0_RX   1

§ UDMA_CHAN_UART0_TX

#define UDMA_CHAN_UART0_TX   2

§ UDMA_CHAN_UART1_RX

#define UDMA_CHAN_UART1_RX   5

§ UDMA_CHAN_UART1_TX

#define UDMA_CHAN_UART1_TX   6

§ UDMA_DST_INC_16

#define UDMA_DST_INC_16   0x40000000

§ UDMA_DST_INC_32

#define UDMA_DST_INC_32   0x80000000

§ UDMA_DST_INC_8

#define UDMA_DST_INC_8   0x00000000

§ UDMA_DST_INC_M

#define UDMA_DST_INC_M   0xC0000000

§ UDMA_DST_INC_NONE

#define UDMA_DST_INC_NONE   0xC0000000

Referenced by uDMAChannelTransferSet().

§ UDMA_DST_INC_S

#define UDMA_DST_INC_S   30

Referenced by uDMAChannelTransferSet().

§ UDMA_MODE_ALT_SELECT

#define UDMA_MODE_ALT_SELECT   0x00000001

§ UDMA_MODE_AUTO

#define UDMA_MODE_AUTO   0x00000002

§ UDMA_MODE_BASIC

#define UDMA_MODE_BASIC   0x00000001

§ UDMA_MODE_M

#define UDMA_MODE_M   0x00000007

§ UDMA_MODE_MEM_SCATTER_GATHER

#define UDMA_MODE_MEM_SCATTER_GATHER   0x00000004

§ UDMA_MODE_PER_SCATTER_GATHER

#define UDMA_MODE_PER_SCATTER_GATHER   0x00000006

§ UDMA_MODE_PINGPONG

#define UDMA_MODE_PINGPONG   0x00000003

§ UDMA_MODE_STOP

#define UDMA_MODE_STOP   0x00000000

§ UDMA_NEXT_USEBURST

#define UDMA_NEXT_USEBURST   0x00000008

Referenced by uDMAChannelControlSet().

§ UDMA_NUM_CHANNELS

§ UDMA_PRI_SELECT

#define UDMA_PRI_SELECT   0x00000000

§ UDMA_PRIORITY_HIGH

#define UDMA_PRIORITY_HIGH   0x00000001

Referenced by uDMAChannelPriorityGet().

§ UDMA_PRIORITY_LOW

#define UDMA_PRIORITY_LOW   0x00000000

Referenced by uDMAChannelPriorityGet().

§ UDMA_SIZE_16

#define UDMA_SIZE_16   0x11000000

§ UDMA_SIZE_32

#define UDMA_SIZE_32   0x22000000

§ UDMA_SIZE_8

#define UDMA_SIZE_8   0x00000000

§ UDMA_SIZE_M

#define UDMA_SIZE_M   0x33000000

Referenced by uDMAChannelControlSet().

§ UDMA_SIZE_S

#define UDMA_SIZE_S   24

§ UDMA_SRC_INC_16

#define UDMA_SRC_INC_16   0x04000000

§ UDMA_SRC_INC_32

#define UDMA_SRC_INC_32   0x08000000

§ UDMA_SRC_INC_8

#define UDMA_SRC_INC_8   0x00000000

§ UDMA_SRC_INC_M

#define UDMA_SRC_INC_M   0x0C000000

§ UDMA_SRC_INC_NONE

#define UDMA_SRC_INC_NONE   0x0c000000

Referenced by uDMAChannelTransferSet().

§ UDMA_SRC_INC_S

#define UDMA_SRC_INC_S   26

Referenced by uDMAChannelTransferSet().

§ UDMA_XFER_SIZE_M

#define UDMA_XFER_SIZE_M   0x00003FF0

§ UDMA_XFER_SIZE_MAX

#define UDMA_XFER_SIZE_MAX   1024

§ UDMA_XFER_SIZE_S

#define UDMA_XFER_SIZE_S   4

§ uDMATaskStructEntry

#define uDMATaskStructEntry (   ui32TransferCount,
  ui32ItemSize,
  ui32SrcIncrement,
  pvSrcAddr,
  ui32DstIncrement,
  pvDstAddr,
  ui32ArbSize,
  ui32Mode 
)
Value:
{ \
(((ui32SrcIncrement) == UDMA_SRC_INC_NONE) ? (pvSrcAddr) : \
((void *)(&((uint8_t *)(pvSrcAddr))[((ui32TransferCount) << \
((ui32SrcIncrement) >> 26)) - 1]))), \
(((ui32DstIncrement) == UDMA_DST_INC_NONE) ? (pvDstAddr) : \
((void *)(&((uint8_t *)(pvDstAddr))[((ui32TransferCount) << \
((ui32DstIncrement) >> 30)) - 1]))), \
(ui32SrcIncrement) | (ui32DstIncrement) | (ui32ItemSize) | \
(ui32ArbSize) | (((ui32TransferCount) - 1) << 4) | \
((((ui32Mode) == UDMA_MODE_MEM_SCATTER_GATHER) || \
((ui32Mode) == UDMA_MODE_PER_SCATTER_GATHER)) ? \
(ui32Mode) | UDMA_MODE_ALT_SELECT : (ui32Mode)), 0 \
}
#define UDMA_MODE_MEM_SCATTER_GATHER
Definition: udma.h:237
#define UDMA_MODE_ALT_SELECT
Definition: udma.h:242
#define UDMA_SRC_INC_NONE
Definition: udma.h:258
#define UDMA_MODE_PER_SCATTER_GATHER
Definition: udma.h:239
#define UDMA_DST_INC_NONE
Definition: udma.h:252

A helper macro for building scatter-gather task table entries.

This macro is intended to be used to help populate a table of uDMA tasks for a scatter-gather transfer. This macro will calculate the values for the fields of a task structure entry based on the input parameters.

There are specific requirements for the values of each parameter. No checking is done so it is up to the caller to ensure that correct values are used for the parameters.

This macro is intended to be used to initialize individual entries of a structure of tDMAControlTable type, like this:

  tDMAControlTable MyTaskList[] =
  {
      uDMATaskStructEntry(Task1Count, UDMA_SIZE_8,
                          UDMA_SRC_INC_8, MySourceBuf,
                          UDMA_DST_INC_8, MyDestBuf,
                          UDMA_ARB_8, UDMA_MODE_MEM_SCATTER_GATHER),
      uDMATaskStructEntry(Task2Count, ... ),
  }
Parameters
ui32TransferCountis the count of items to transfer for this task. It must be in the range 1-1024.
ui32ItemSizeis the bit size of the items to transfer for this task. It must be one of:
ui32SrcIncrementis the bit size increment for source data. It must be one of:
pvSrcAddris the starting address of the data to transfer.
ui32DstIncrementis the bit size increment for destination data. It must be one of:
pvDstAddris the starting address of the destination data.
ui32ArbSizeis the arbitration size to use for the transfer task. This is used to select the arbitration size in powers of 2, from 1 to 1024. It must be one of:
ui32Modeis the transfer mode for this task. Note that normally all tasks will be one of the scatter-gather modes while the last task is a task list will be AUTO or BASIC. It must be one of:
Returns
None (this is not a function)