Terms and Definitions

General Terms and Acronyms

CCFG
Customer Configuration

Customer Configuration is set by the application and contains configuration parameters for the ROM boot code, device hardware, and device firmware. It contains lock-bits on the last page of flash. You can read more in the Customer Configuration section in the CC23xx SimpleLink Wireless MCU Technical Reference Manual.

CCS
Code Composer Studio

An integrated development environment to develop applications for Texas Instruments embedded processors. Download: Code Composer Studio

FreeRTOS

A free, open source Real Time Operating System(RTOS).

eRPC
Embedded Remote Procedure Call

An open source Remote Procedure Call (RPC) system for multichip embedded systems and heterogeneous multicore SoCs.

GCC
GNU Compiler Collection

A compiler system produced by the GNU Project, which support various programming languages such as C and C++.

IAR

Refers to IAR Systems’ IAR Embedded Workbench, which is an integrated development environment used for building and debugging embedded applications.

MCU
Microcontroller Unit

A small computer on a single integrated circuit.

NVS
Non-Volatile Storage

Storage of data in non-volatile memory (NVM). NVM retains saved data during power cycles. In the context of CC23xx devices, NVM either refers to the internal flash or some external flash.

ROM
Read-only Memory

Type of non-volatile memory used in computers. Once data is written to ROM, the data cannot be removed and can only be read.

RTSC
Real Time Software Components

A toolset for creating reusable code, used by TI-RTOS. See RTSC and RTSC-Pedia.

SWD
Serial Wired Debug

It is a 2-pin debug interface defined by Arm. See ARM_SWD_PROTOCOL for more information.

SysConfig
System Configuration Tool

SysConfig is a graphical interface for configuring software projects. Configuration files, C source files and header files are generated based on the parameters configured in the SysConfig dashboard. See Get started with SysConfig.

TI-CLANG
TI Arm Clang Compiler Toolchain

The TI Arm Clang Compiler Toolchain (tiarmclang) is the next generation TI Arm compiler, replacing the previous TI Arm Compiler Tools (armcl). You can use the tiarmclang compiler toolchain to build applications from C, C++, and/or assembly source files to be loaded and run on one of the Cortex-M or Cortex-R Arm processors that are supported by the toolchain. You can find more information here.

VIMS
Versatile Instruction Memory System

A system control module that handles access to the device memory areas from the CPU and system bus. You can read more in the CC23xx SimpleLink Wireless MCU Technical Reference Manual.

.bss

Block started by symbol. This memory section usually contains uninitialized variables including the task stacks.

Real-Time Operating System (RTOS) Terms and Acronyms

HWI
Hardware Interrupts

A FreeRTOS hardware interrupt.

Idle Task

A FreeRTOS default task that is executes when no other higher priority thread needs to run.

ROV
Runtime Object View

A FreeRTOS kernel plugin for CCS and IAR to view a target’s instrumentation data.

RTC
Real-Time Clock

An accurate computer clock which keeps track of the current time.

RTOS
Real Time Operating System

An operating system intended to serve applications with real-time requirements.

SWI
Software Interrupts

A FreeRTOS software interrupt.

TI-RTOS
Texas Instruments Real Time Operating System

An RTOS developed by TI for TI microcontrollers.

Bluetooth Low Energy Terms and Acronyms

Anchor Point

In Bluetooth Low Energy, it means the start of a connection event.

API
Application-program interface

Refers to the function call.

BLE
Bluetooth Low Energy

Wireless protocol.

BR
Basic Rate

Transmitter characterstic supported by Bluetooth.

BR/EDR
Basic Rate/Enhanced Data Rate

Transmitter characterstic supported by Bluetooth.

CCCD
Client Characteristic Configuration Descriptor

An optional characteristic descriptor that defines how the characteristic may be configured by a specific client.

CI
Coding Indication

Bit field in every BLE packet sent on LE Coded PHY that indicates the coding of the PDU (S=2 or S=8).

CSRK
Connection Signature Resolving Key

A key exchanged during Phase 3 of the bonding process. It is a 128-bit key used to sign data and verify signatures on the receiving device.

Device Address

A 48-bit value used to identify a device. A device address can be public, random static, or random private.

FEC
Forward Error Correction

Error correction used to improve the sensitivity in the LE Coded PHY.

FAL (formerly known as White List)
Filter Accept List

Formerly White List. A filter policy in the Controller’s Link Layer that can prevent unwanted link layer events from waking up the host.

GAP
Generic Access Profile

Defines how each different Bluetooth Low Energy states should be accessed.

GFSK
Gaussian Frequency-Shift Keying

A type of FSK modulation which uses a Gaussian filter to shape the pulses before they are modulated.

HCI
Host Controller Interface

A transport layer between host and the controller, here we refer typically UART.

IA
Identity Address

A Resolvable Private Address that is resolvable with an Identity Resolving Key yields an Identity Address.

IRK
Identity Resolving Key

A key exchanged during Phase 3 of the bonding process. A Resolving List contains a local and a peer Identity Resolving Key as well as an Identity Address.

ISM
Industrial, Scientific, and Medical,

Here we often refer it to ISM radio band which means the radio spectrum reserved for industrial, scientific and medical applications.

L2CAP

The protocol defines how packet segmentaion, reassembly and multiplexing.

LE
Low Energy

Bluetooth Low Energy.

The link budget is the ratio between the Tx power and the Rx sensitivity level.

LL

A Bluetooth Low Energy stack layer in on the controller side.

LTK
Long Term Key

A term defined by the Bluetooth Core Specifications Version 5.3 referring to the key used for encypted connections.

MD
More data

A bit field in Bluetooth Low Energy which indicates there are more data coming in during specific connection event.

Multi-path fading

When the radio signal is not only received via the direct path, but also via reflections off nearby objects. The direct and reflected paths may interfere constructively or destructively

PHY
Physical layer

The physical layer is the lowest layer of the Bluetooth protocol stack. It configures the physical parameters of the radio transmission and reception. It determines how a bit (and its value) are represented over the air.

PDU
Protocol Data Unit

A packet or message.

RL
Resolving List

A Link Layer maintained table of one or more entries of a local and peer Identity Resolving Key associated to an Identity Address.

RPA
Resolvable Private Address

A resolvable address is one that can be resolved given that the device has an Identity Resolving Key. By resolving a Resolvable Private Address one can determine its Identity Address.

RPAO
Resolvable Private Address Only

A required GATT characteristic called “Resolvable Private Address Only” that is used with Network Privacy Mode.

SCA
Sleep Clock Accuracy

Sleep clock accuracy determines the average timing of the BLE activities, which should drift less than or equal to +/-500ppm.

SNV
Simple Non-Volatile storage

An abstraction layer used by the BLE5-Stack for reading and writing to non volatile memory. The GAPBondMgr layer of stack uses SNV to store keys. This region can also be used by the user.

SPSM
Simplified Protocol/Service Multiplexer

The SPSM field is two octets in length. SPSM values are separated into two ranges. Values in the first range are assigned by the Bluetooth SIG and indicate protocols. Values in the second range are dynamically allocated and used in conjunction with services defined in the GATT server.

NPI Terms and Acronyms

AIND
Asynchronous Indication

An asynchronously received NPI message sent from the network processor to the host / application processor.

AP
Application Processor

An processor that implements the customer application as well the serial command interface to communicate with a network processor.

AREQ
Asynchronous Request

An asynchronously received NPI message sent from the host / application processor to the network processor.

FCS
Frame Check Sequence

An error-detecting code added to a frame

NP
Network Processor

A device that contains the wireless protocol stack as well as RF hardware. Stack functionality is exposed via a serial interface.

NPI
Network Processor Interface

Abstraction level above serial interface for sending / receiving data power management, and data parsing

MRDY
Controller (Master) Ready

GPIO pin that indicates the state of the controller

SOF
Start of Frame

A specific known byte specifying the beginning of a frame

SRDY
Peripheral (Slave) Ready

GPIO pin that indicates the state of the peripheral

SREQ
Synchronous Request

A blocking NPI request that expects an ((SRESP))

SRESP
Synchronous Response

A response to a ((SREQ))

UNPI
Unified ((NPI))

NPI usage except for with HostTest

Over-the-Air Download (OAD) Terms and Acronyms

BIM
Boot Image Manager

A bootloader that runs after the device’s ROM startup code. The BIM is responsible for analyzing the image header of all images and determining the most suitable image to run. Once the BIM has found the proper image, it will jump to it’s program entry.

CRC
Cyclic Redundancy Check

An error-detecting code used to check the integrity of blocks of data.

ECDSA
Elliptic Curve Digital Signature Algorithm

A variant of the Digital Signature Algorithm (DSA) which uses elliptic curve cryptography.

Factory Image

The factory image is a “golden” image that resides in external flash as a fail-safe mechanism.

HIB
Halt In Boot

A mechanism in CC23xx to ensure that the external emulator can take control of the device before it executes any application code.

OAD
Over-the-Air Download

The process of performing a device firmware update over the air.

OAD Target

The device whose firmware is being upgraded over the air. This is assumed to be a CC26xx or CC13xx device running the TI protocol-specific transport for OAD.

OAD Distributor

The device responsible for accepting an OAD enabled image from the compiler and transferring it over the air to the OAD Target.