fcl_foc_cpu.h
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1 //#############################################################################
2 // FILE: fcl_foc_cpu.h
3 // TITLE: Header file to be shared between example and library for CPU data.
4 //
5 // Group: C2000
6 // Target Family: F2837x/F2838x/F28004x/F28002x
7 //
8 //#############################################################################
9 // $TI Release: $
10 // $Release Date: $
11 // $Copyright: $
12 //#############################################################################
13 
14 #ifndef FCL_FOC_CPU_H
15 #define FCL_FOC_CPU_H
16 
17 //
18 // Include project specific include files.
19 //
20 #include <math.h>
21 
22 #include "stdbool.h"
23 #include "stdint.h"
24 
25 #if defined(F2837x_DEVICE) || defined(F28004x_DEVICE)
26 #include "F28x_Project.h"
27 #else
28 #include "f28x_project.h"
29 #endif
30 
31 #include "device.h"
32 #include "f28x_bmsk.h"
33 
34 #include "fcl_enum.h"
35 #include "fcl_cmplx_ctrl.h"
36 
37 #include "qep_defs.h"
38 
39 //===============================================
40 // peripheral headers used in library
41 #include "epwm.h"
42 #include "eqep.h"
43 
44 #include "rampgen.h" // Include header for the RAMPGEN object
45 #include "rmp_cntl.h" // Include header for the RMPCNTL object
46 #include "ipark.h" // Include header for the IPARK object
47 #include "clarke.h"
48 #include "park.h"
49 #include "speed_fr.h"
50 #include "svgen.h"
51 #include "pi.h" // Include header for the PI object
52 #include "pid_grando.h"
53 
54 // DCL Library header files
55 #include "DCLF32.h"
56 
57 #if(SPD_CNTLR == SPD_NLPID_CNTLR)
58 #include "DCL_NLPID.h"
59 #endif
60 
61 #include "motor_drive_settings.h"
62 #include "motor_drive_user.h"
63 
64 #ifndef PI
65 #define PI 3.14159265358979
66 #endif
67 
68 //
69 // typedefs
70 //
71 //
73 
74 typedef struct _FCL_Parameters_t_
75 {
76  float32_t carrierMid; // Mid point value of carrier count
77  float32_t adcPPBScale; // ADC conversion scale to pu
78  float32_t cmidsqrt3; // internal variable
79 
80  float32_t tSamp; // sampling time
81  float32_t Rd; // Motor resistance in D axis
82  float32_t Rq; // Motor resistance in Q axis
83  float32_t Ld; // Motor inductance in D axis
84  float32_t Lq; // Motor inductance in Q axis
85  float32_t Vbase; // Base voltage for the controller
86  float32_t Ibase; // Base current for the controller
87  float32_t invZbase; // Inverter Base voltage for the controller
88  float32_t wccD; // D axis current controller bandwidth
89  float32_t wccQ; // Q axis current controller bandwidth
90  float32_t Vdcbus; // DC bus voltage
91  float32_t BemfK; // Motor Bemf constant
92  float32_t Wbase; // Controller base frequency (Motor) in rad/sec
93 } FCL_Parameters_t;
94 
95 #define FCL_PARS_DEFAULTS { \
96  0, /* carrierMid */ \
97  0, /* adcPPBScale */ \
98  0, /* cmidsqrt3 */ \
99  0, /* tSamp */ \
100  0, /* Rd */ \
101  0, /* Rq */ \
102  0, /* Ld */ \
103  0, /* Lq */ \
104  0, /* Vbase */ \
105  0, /* Ibase */ \
106  0, /* wccD */ \
107  0, /* wccQ */ \
108  0, /* Vdcbus */ \
109  0, /* BemfK */ \
110  0 /* Wbase */ \
111 }
112 
113 #if(SPD_CNTLR == SPD_PID_CNTLR)
114 //
115 // Default values for motor variables
116 //
117 #define MOTOR_DEFAULTS { \
118  0, /* posCntr */ \
119  5000, /* posCntrMax */ \
120  0.001, /* posSlewRate */ \
121  \
122  (float32_t)(M_BASE_FREQ), /* baseFreq */ \
123  (float32_t)(M_POLES/2.0), /* polePairs */ \
124  (float32_t)(0.25/M_ENC_SLOTS), /* posMechScaler */ \
125  \
126  (0.001 / M_ISR_FREQUENCY), /* Ts */ \
127  0.0, /* maxModIndex */ \
128  \
129  M_MAXIMUM_VOLTAGE, /* voltageLimit */ \
130  M_MAXIMUM_CURRENT, /* currentLimit */ \
131  (M_STARTUP_FREQ/M_BASE_FREQ), /* speedRefStart */ \
132  (M_MAXIMUM_FREQ/M_BASE_FREQ), /* speedRefMax */ \
133  0.0, /* IdRefSet */ \
134  0.0, /* IqRefSet */ \
135  \
136  0.0, /* IdRefPrev */ \
137  0.0, /* IqRefPrev */ \
138  0.0, /* IdRefError */ \
139  0.0, /* IqRefError */ \
140  0.0, /* IdRefDelta */ \
141  0.0, /* IqRefDelta */ \
142  \
143  0.0, /* ctrlIdRef */ \
144  0.0, /* ctrlIqRef */ \
145  0.0, /* ctrlSpeedRef */ \
146  0.0, /* ctrlPosRef */ \
147  \
148  0.05, /* IdRef_start */ \
149  0.0, /* IdRef_run */ \
150  0.0, /* IdRef */ \
151  0.05, /* IqRef_start */ \
152  0.0, /* IqRef */ \
153  \
154  0.1, /* speedRef */ \
155  0.0, /* positionRef */ \
156  0.02, /* lsw1Speed */ \
157  \
158  0, /* offset_currentAs */ \
159  0, /* offset_currentBs */ \
160  0, /* offset_currentCs */ \
161  \
162  0, /* currentAs */ \
163  0, /* currentBs */ \
164  0, /* currentCs */ \
165  \
166  0, /* currentScale */ \
167  0, /* voltageScale */ \
168  0, /* adcScale */ \
169  \
170  0.0, /* posElecTheta */ \
171  0.0, /* posMechTheta */ \
172  0.0, /* speedWe */ \
173  0.0, /* speedWePrev */ \
174  0.0, /* pangle */ \
175  \
176  0.0, /* ctrlSpdOut */ \
177  0.0, /* ctrlPosOut */ \
178  \
179  0.0, /* Vdcbus */ \
180  0.0, /* VdcbusMax */ \
181  0.0, /* VdcbusMin */ \
182  \
183  M_U_PWM_BASE, /* *pwmBaseU */ \
184  M_V_PWM_BASE, /* *pwmBaseV */ \
185  M_W_PWM_BASE, /* *pwmBaseW */ \
186  M_IW_ADC_BASE, /* *adcBaseW */ \
187  \
188  (uint32_t *)(M_U_PWM_BASE + EPWM_O_CMPA), /* *pwmCompA */ \
189  (uint32_t *)(M_V_PWM_BASE + EPWM_O_CMPA), /* *pwmCompB */ \
190  (uint32_t *)(M_W_PWM_BASE + EPWM_O_CMPA), /* *pwmCompC */ \
191  \
192  (M_IU_ADCRESULT_BASE + M_IU_ADC_PPB_NUM + ADC_O_PPB1RESULT), /* curA_PPBRESULT */ \
193  (M_IV_ADCRESULT_BASE + M_IV_ADC_PPB_NUM + ADC_O_PPB1RESULT), /* curB_PPBRESULT */ \
194  (M_IW_ADCRESULT_BASE + M_IW_ADC_PPB_NUM + ADC_O_PPB1RESULT), /* curC_PPBRESULT */ \
195  (M_VDC_ADCRESULT_BASE + M_VDC_ADC_PPB_NUM + ADC_O_PPB1RESULT), /* volDC_PPBRESULT */ \
196  \
197  (union ADCINTFLG_REG *)(M_IW_ADC_BASE + ADC_INTFLG_ADCINT1), /* *ptrADCIntFlag */ \
198  (struct EQEP_REGS *)(M_QEP_BASE), /* *ptrQEP */ \
199  \
200  RAMPGEN_DEFAULTS, /* rg */ \
201  RMPCNTL_DEFAULTS, /* rc */ \
202  CLARKE_DEFAULTS, /* clarke */ \
203  PARK_DEFAULTS, /* park */ \
204  IPARK_DEFAULTS, /* ipark */ \
205  SVGEN_DEFAULTS, /* svgen */ \
206  \
207  SPEED_MEAS_QEP_DEFAULTS, /* speed */ \
208  \
209  {PID_TERM_DEFAULTS, PID_PARAM_DEFAULTS, PID_DATA_DEFAULTS}, /* pid_spd */ \
210  PI_CONTROLLER_DEFAULTS, /* pi_pos */ \
211  \
212  FCL_CMPLXCTRL_DEFAULTS, /* cmplx_D */ \
213  FCL_CMPLXCTRL_DEFAULTS, /* cmplx_Q */ \
214  FCL_PARS_DEFAULTS, /* FCL_params */ \
215  \
216  0, /* isrTicker */ \
217  \
218  0.0, /* fclUpdateLatency_us */ \
219  0.0, /* focExecutionTime_us */ \
220  \
221  0, /* fclClrCntr */ \
222  0, /* fclCycleCountMax */ \
223  0, /* fclCycleCount */ \
224  \
225  0, /* focClrCntr */ \
226  0, /* focCycleCountMax */ \
227  0, /* focCycleCount */ \
228  \
229  0, /* lsw2EntryFlag */ \
230  0, /* offsetDoneFlag */ \
231  \
232  M_EN_GATE_GPIO, /* drvEnableGateGPIO */ \
233  M_nFAULT_GPIO, /* drvFaultTripGPIO */ \
234  M_CLR_FAULT_GPIO, /* drvClearFaultGPIO */ \
235  \
236  10, /* speedLoopPrescaler */ \
237  1, /* speedLoopCount */ \
238  0, /* alignCntr */ \
239  2000, /* alignCnt */ \
240  2, /* posPtrMax */ \
241  0, /* posPtr */ \
242  \
243  2048 + 6.0*4096/M_ADC_SCALE_CURRENT, /* currentThreshHi */ \
244  2048 - 6.0*4096/M_ADC_SCALE_CURRENT, /* currentThreshLo */ \
245  2048 + 36.0*4096/M_ADC_SCALE_VOLATGE, /* voltageThreshHi */ \
246  \
247  0, /* faultStatusFlag */ \
248  0, /* faultStatusPrev */ \
249  0, /* faultTimesCount */ \
250  0, /* clearFaultFlag */ \
251  0, /* enableSpeedLoop */ \
252  \
253  PWW_CMP_CTR_ZERO, /* pwmUpdateMode */ \
254  CTRL_STOP, /* ctrlStateCom */ \
255  CTRL_STOP, /* ctrlStateUse */ \
256  CTRL_STOP, /* ctrlStateFdb */ \
257  ENC_ALIGNMENT /* lsw */ \
258 }
259 #endif // (SPD_CNTLR == SPD_PID_CNTLR)
260 
261 #if(SPD_CNTLR == SPD_DCL_CNTLR)
262 //
263 // Default values for motor variables
264 //
265 #define MOTOR_DEFAULTS { \
266  0, /* posCntr */ \
267  5000, /* posCntrMax */ \
268  0.001, /* posSlewRate */ \
269  \
270  (float32_t)M_BASE_FREQ, /* baseFreq */ \
271  (float32_t)(M_POLES/2.0), /* polePairs */ \
272  (float32_t)(0.25/M_ENC_SLOTS), /* posMechScaler */ \
273  \
274  (0.001 / M_ISR_FREQUENCY), /* Ts */ \
275  0.0, /* maxModIndex */ \
276  \
277  M_MAXIMUM_VOLTAGE, /* voltageLimit */ \
278  M_MAXIMUM_CURRENT, /* currentLimit */ \
279  (M_STARTUP_FREQ/M_BASE_FREQ), /* speedRefStart */ \
280  (M_MAXIMUM_FREQ/M_BASE_FREQ), /* speedRefMax */ \
281  0.0, /* IdRefSet */ \
282  0.0, /* IqRefSet */ \
283  \
284  0.0, /* IdRefPrev */ \
285  0.0, /* IqRefPrev */ \
286  0.0, /* IdRefError */ \
287  0.0, /* IqRefError */ \
288  0.0, /* IdRefDelta */ \
289  0.0, /* IqRefDelta */ \
290  \
291  0.0, /* ctrlIdRef */ \
292  0.0, /* ctrlIqRef */ \
293  0.0, /* ctrlSpeedRef */ \
294  0.0, /* ctrlPosRef */ \
295  \
296  0.05, /* IdRef_start */ \
297  0.0, /* IdRef_run */ \
298  0.0, /* IdRef */ \
299  0.05, /* IqRef_start */ \
300  0.0, /* IqRef */ \
301  \
302  0.1, /* speedRef */ \
303  0.0, /* positionRef */ \
304  0.02, /* lsw1Speed */ \
305  \
306  0, /* offset_currentAs */ \
307  0, /* offset_currentBs */ \
308  0, /* offset_currentCs */ \
309  \
310  0, /* currentAs */ \
311  0, /* currentBs */ \
312  0, /* currentCs */ \
313  \
314  0, /* currentScale */ \
315  0, /* voltageScale */ \
316  0, /* adcScale */ \
317  \
318  0.0, /* posElecTheta */ \
319  0.0, /* posMechTheta */ \
320  0.0, /* speedWe */ \
321  0.0, /* speedWePrev */ \
322  0.0, /* pangle */ \
323  \
324  0.0, /* ctrlSpdOut */ \
325  0.0, /* ctrlPosOut */ \
326  \
327  0.0, /* Vdcbus */ \
328  0.0, /* VdcbusMax */ \
329  0.0, /* VdcbusMin */ \
330  \
331  M_U_PWM_BASE, /* *pwmBaseU */ \
332  M_V_PWM_BASE, /* *pwmBaseV */ \
333  M_W_PWM_BASE, /* *pwmBaseW */ \
334  M_IW_ADC_BASE, /* *adcBaseW */ \
335  \
336  (uint32_t *)(M_U_PWM_BASE + EPWM_O_CMPA), /* *pwmCompA */ \
337  (uint32_t *)(M_V_PWM_BASE + EPWM_O_CMPA), /* *pwmCompB */ \
338  (uint32_t *)(M_W_PWM_BASE + EPWM_O_CMPA), /* *pwmCompC */ \
339  \
340  (M_IU_ADCRESULT_BASE + M_IU_ADC_PPB_NUM + ADC_O_PPB1RESULT), /* curA_PPBRESULT */ \
341  (M_IV_ADCRESULT_BASE + M_IV_ADC_PPB_NUM + ADC_O_PPB1RESULT), /* curB_PPBRESULT */ \
342  (M_IW_ADCRESULT_BASE + M_IW_ADC_PPB_NUM + ADC_O_PPB1RESULT), /* curC_PPBRESULT */ \
343  (M_VDC_ADCRESULT_BASE + M_VDC_ADC_PPB_NUM + ADC_O_PPB1RESULT), /* volDC_PPBRESULT */ \
344  \
345  (union ADCINTFLG_REG *)(M_IW_ADC_BASE + ADC_INTFLG_ADCINT1), /* *ptrADCIntFlag */ \
346  (struct EQEP_REGS *)(M_QEP_BASE), /* *ptrQEP */ \
347  \
348  RAMPGEN_DEFAULTS, /* rg */ \
349  RMPCNTL_DEFAULTS, /* rc */ \
350  CLARKE_DEFAULTS, /* clarke */ \
351  PARK_DEFAULTS, /* park */ \
352  IPARK_DEFAULTS, /* ipark */ \
353  SVGEN_DEFAULTS, /* svgen */ \
354  \
355  SPEED_MEAS_QEP_DEFAULTS, /* speed */ \
356  \
357  PI_DEFAULTS, /* dcl_spd */ \
358  PI_DEFAULTS, /* dcl_pos */ \
359  \
360  FCL_CMPLXCTRL_DEFAULTS, /* cmplx_D */ \
361  FCL_CMPLXCTRL_DEFAULTS, /* cmplx_Q */ \
362  FCL_PARS_DEFAULTS, /* FCL_params */ \
363  \
364  0, /* isrTicker */ \
365  \
366  0.0, /* fclUpdateLatency_us */ \
367  0.0, /* focExecutionTime_us */ \
368  \
369  0, /* fclClrCntr */ \
370  0, /* fclCycleCountMax */ \
371  0, /* fclCycleCount */ \
372  \
373  0, /* focClrCntr */ \
374  0, /* focCycleCountMax */ \
375  0, /* focCycleCount */ \
376  \
377  0, /* lsw2EntryFlag */ \
378  0, /* offsetDoneFlag */ \
379  \
380  M_EN_GATE_GPIO, /* drvEnableGateGPIO */ \
381  M_nFAULT_GPIO, /* drvFaultTripGPIO */ \
382  M_CLR_FAULT_GPIO, /* drvClearFaultGPIO */ \
383  \
384  10, /* speedLoopPrescaler */ \
385  1, /* speedLoopCount */ \
386  0, /* alignCntr */ \
387  2000, /* alignCnt */ \
388  2, /* posPtrMax */ \
389  0, /* posPtr */ \
390  \
391  2048 + 6.0*4096/M_ADC_SCALE_CURRENT, /* currentThreshHi */ \
392  2048 - 6.0*4096/M_ADC_SCALE_CURRENT, /* currentThreshLo */ \
393  2048 + 36.0*4096/M_ADC_SCALE_VOLATGE, /* voltageThreshHi */ \
394  \
395  0, /* faultStatusFlag */ \
396  0, /* faultStatusPrev */ \
397  0, /* faultTimesCount */ \
398  0, /* clearFaultFlag */ \
399  0, /* enableSpeedLoop */ \
400  \
401  PWW_CMP_CTR_ZERO, /* pwmUpdateMode */ \
402  CTRL_STOP, /* ctrlStateCom */ \
403  CTRL_STOP, /* ctrlStateUse */ \
404  CTRL_STOP, /* ctrlStateFdb */ \
405  ENC_ALIGNMENT /* lsw */ \
406 }
407 #endif // (SPD_CNTLR == SPD_DCL_CNTLR)
408 
409 #if(SPD_CNTLR == SPD_NLPID_CNTLR)
410 //
411 // Default values for motor variables
412 //
413 #define MOTOR_DEFAULTS { \
414  0, /* posCntr */ \
415  5000, /* posCntrMax */ \
416  0.001, /* posSlewRate */ \
417  \
418  (float32_t)M_BASE_FREQ, /* baseFreq */ \
419  (float32_t)(M_POLES/2.0), /* polePairs */ \
420  (float32_t)(0.25/M_ENC_SLOTS), /* posMechScaler */ \
421  \
422  (0.001 / M_ISR_FREQUENCY), /* Ts */ \
423  0.0, /* maxModIndex */ \
424  \
425  M_MAXIMUM_VOLTAGE, /* voltageLimit */ \
426  M_MAXIMUM_CURRENT, /* currentLimit */ \
427  (M_STARTUP_FREQ/M_BASE_FREQ), /* speedRefStart */ \
428  (M_MAXIMUM_FREQ/M_BASE_FREQ), /* speedRefMax */ \
429  0.0, /* IdRefSet */ \
430  0.0, /* IqRefSet */ \
431  \
432  0.0, /* IdRefPrev */ \
433  0.0, /* IqRefPrev */ \
434  0.0, /* IdRefError */ \
435  0.0, /* IqRefError */ \
436  0.0, /* IdRefDelta */ \
437  0.0, /* IqRefDelta */ \
438  \
439  0.0, /* ctrlIdRef */ \
440  0.0, /* ctrlIqRef */ \
441  0.0, /* ctrlSpeedRef */ \
442  0.0, /* ctrlPosRef */ \
443  \
444  0.05, /* IdRef_start */ \
445  0.0, /* IdRef_run */ \
446  0.0, /* IdRef */ \
447  0.05, /* IqRef_start */ \
448  0.0, /* IqRef */ \
449  \
450  0.1, /* speedRef */ \
451  0.0, /* positionRef */ \
452  0.02, /* lsw1Speed */ \
453  \
454  0, /* offset_currentAs */ \
455  0, /* offset_currentBs */ \
456  0, /* offset_currentCs */ \
457  \
458  0, /* currentAs */ \
459  0, /* currentBs */ \
460  0, /* currentCs */ \
461  \
462  0, /* currentScale */ \
463  0, /* voltageScale */ \
464  0, /* adcScale */ \
465  \
466  0.0, /* posElecTheta */ \
467  0.0, /* posMechTheta */ \
468  0.0, /* speedWe */ \
469  0.0, /* speedWePrev */ \
470  0.0, /* pangle */ \
471  \
472  0.0, /* ctrlSpdOut */ \
473  0.0, /* ctrlPosOut */ \
474  \
475  0.0, /* Vdcbus */ \
476  0.0, /* VdcbusMax */ \
477  0.0, /* VdcbusMin */ \
478  \
479  M_U_PWM_BASE, /* *pwmBaseU */ \
480  M_V_PWM_BASE, /* *pwmBaseV */ \
481  M_W_PWM_BASE, /* *pwmBaseW */ \
482  M_IW_ADC_BASE, /* *adcBaseW */ \
483  \
484  (uint32_t *)(M_U_PWM_BASE + EPWM_O_CMPA), /* *pwmCompA */ \
485  (uint32_t *)(M_V_PWM_BASE + EPWM_O_CMPA), /* *pwmCompB */ \
486  (uint32_t *)(M_W_PWM_BASE + EPWM_O_CMPA), /* *pwmCompC */ \
487  \
488  (M_IU_ADCRESULT_BASE + M_IU_ADC_PPB_NUM + ADC_O_PPB1RESULT), /* curA_PPBRESULT */ \
489  (M_IV_ADCRESULT_BASE + M_IV_ADC_PPB_NUM + ADC_O_PPB1RESULT), /* curB_PPBRESULT */ \
490  (M_IW_ADCRESULT_BASE + M_IW_ADC_PPB_NUM + ADC_O_PPB1RESULT), /* curC_PPBRESULT */ \
491  (M_VDC_ADCRESULT_BASE + M_VDC_ADC_PPB_NUM + ADC_O_PPB1RESULT), /* volDC_PPBRESULT */ \
492  \
493  (union ADCINTFLG_REG *)(M_IW_ADC_BASE + ADC_INTFLG_ADCINT1), /* *ptrADCIntFlag */ \
494  (struct EQEP_REGS *)(M_QEP_BASE), /* *ptrQEP */ \
495  \
496  RAMPGEN_DEFAULTS, /* rg */ \
497  RMPCNTL_DEFAULTS, /* rc */ \
498  CLARKE_DEFAULTS, /* clarke */ \
499  PARK_DEFAULTS, /* park */ \
500  IPARK_DEFAULTS, /* ipark */ \
501  SVGEN_DEFAULTS, /* svgen */ \
502  \
503  SPEED_MEAS_QEP_DEFAULTS, /* speed */ \
504  \
505  NLPID_DEFAULTS, /* nlpid_spd */ \
506  \
507  NLPID_DEFAULTS, /* nlpid_pos */ \
508  \
509  FCL_CMPLXCTRL_DEFAULTS, /* cmplx_D */ \
510  FCL_CMPLXCTRL_DEFAULTS, /* cmplx_Q */ \
511  FCL_PARS_DEFAULTS, /* FCL_params */ \
512  \
513  0, /* isrTicker */ \
514  \
515  0.0, /* fclUpdateLatency_us */ \
516  0.0, /* focExecutionTime_us */ \
517  \
518  0, /* fclClrCntr */ \
519  0, /* fclCycleCountMax */ \
520  0, /* fclCycleCount */ \
521  \
522  0, /* focClrCntr */ \
523  0, /* focCycleCountMax */ \
524  0, /* focCycleCount */ \
525  \
526  0, /* lsw2EntryFlag */ \
527  0, /* offsetDoneFlag */ \
528  \
529  M_EN_GATE_GPIO, /* drvEnableGateGPIO */ \
530  M_nFAULT_GPIO, /* drvFaultTripGPIO */ \
531  M_CLR_FAULT_GPIO, /* drvClearFaultGPIO */ \
532  \
533  10, /* speedLoopPrescaler */ \
534  1, /* speedLoopCount */ \
535  0, /* alignCntr */ \
536  2000, /* alignCnt */ \
537  2, /* posPtrMax */ \
538  0, /* posPtr */ \
539  \
540  2048 + 6.0*4096/M_ADC_SCALE_CURRENT, /* currentThreshHi */ \
541  2048 - 6.0*4096/M_ADC_SCALE_CURRENT, /* currentThreshLo */ \
542  2048 + 36.0*4096/M_ADC_SCALE_VOLATGE, /* voltageThreshHi */ \
543  \
544  0, /* faultStatusFlag */ \
545  0, /* faultStatusPrev */ \
546  0, /* faultTimesCount */ \
547  0, /* clearFaultFlag */ \
548  0, /* enableSpeedLoop */ \
549  \
550  PWW_CMP_CTR_ZERO, /* pwmUpdateMode */ \
551  MOTORS_STOP, /* motorStateCom */ \
552  MOTORS_STOP, /* motorStateUse */ \
553  MOTORS_STOP, /* motorStateFdb */ \
554  ENC_ALIGNMENT /* lsw */ \
555 }
556 #endif // (SPD_CNTLR == SPD_NLPI_CNTLR)
557 
558 //
560 //
561 typedef struct _MOTOR_Vars_t_
562 {
563  uint32_t posCntr;
564  uint32_t posCntrMax;
565  float32_t posSlewRate;
566 
567  float32_t baseFreq;
568  float32_t polePairs;
569  float32_t posMechScaler; // Parameter: 0.9999/total count
570 
571  float32_t Ts; // Samping period (sec)
572  float32_t maxModIndex; // Maximum module index
573 
574  float32_t voltageLimit; // limit voltage
575  float32_t currentLimit; // limit current
576  float32_t speedRefStart; // startup reference speed
577  float32_t speedRefMax; // maximum reference speed
578  float32_t IdRefSet; // Id reference setting (pu)
579  float32_t IqRefSet; // Iq reference setting (pu)
580 
581  float32_t IdRefPrev; // Id reference previous setting (pu)
582  float32_t IqRefPrev; // Iq reference previous setting (pu)
583  float32_t IdRefError; // Id reference error (pu)
584  float32_t IqRefError; // Iq reference error (pu)
585  float32_t IdRefDelta; // Id reference delta (pu)
586  float32_t IqRefDelta; // Iq reference delta (pu)
587 
588  float32_t ctrlIdRef; // Id reference (pu) to controller
589  float32_t ctrlIqRef; // Iq reference (pu) to controller
590  float32_t ctrlSpeedRef; // Speed reference (pu) to controller
591  float32_t ctrlPosRef; // Position reference (pu) to controller
592 
593  float32_t IdRef_start; // Id reference (pu) for startup
594  float32_t IdRef_run; // Id reference (pu) for running
595  float32_t IdRef; // Id reference (pu)
596 
597  float32_t IqRef_start; // Iq reference (pu) for startup
598  float32_t IqRef; // Iq reference (pu)
599 
600  float32_t speedRef; // For Closed Loop tests
601  float32_t positionRef; // For Position Loop tests
602  float32_t lsw1Speed; // initial force rotation speed in search
603  // of QEP index pulse
604 
605  float32_t offset_currentAs; // offset in current A fbk channel
606  float32_t offset_currentBs; // offset in current B fbk channel
607  float32_t offset_currentCs; // offset in current C fbk channel
608 
609  float32_t currentAs; // phase A
610  float32_t currentBs; // phase B
611  float32_t currentCs; // phase C
612 
613  float32_t currentScale; // current scaling cofficient
614  float32_t voltageScale; // voltage scaling cofficient
615  float32_t adcScale; // ADC scale for current and voltage
616 
617  float32_t posElecTheta;
618  float32_t posMechTheta;
619  float32_t speedWe;
620  float32_t speedWePrev;
621  float32_t pangle; // rotor angle
622 
623  float32_t ctrlSpdOut; // the output of controller
624  float32_t ctrlPosOut; // the output of controller
625 
626  float32_t Vdcbus; // DC bus voltage
627  float32_t VdcbusMax; // Maximum DC bus voltage
628  float32_t VdcbusMin; // Minimum DC bus voltage
629 
630  uint32_t pwmBaseU;
631  uint32_t pwmBaseV;
632  uint32_t pwmBaseW;
633  uint32_t adcBaseW;
634 
635  volatile uint32_t *pwmCompA;
636  volatile uint32_t *pwmCompB;
637  volatile uint32_t *pwmCompC;
638 
639  volatile uint32_t curA_PPBRESULT;
640  volatile uint32_t curB_PPBRESULT;
641  volatile uint32_t curC_PPBRESULT;
642  volatile uint32_t volDC_PPBRESULT;
643 
644  volatile union ADCINTFLG_REG *pADCIntFlag;
645  volatile struct EQEP_REGS *pQEPRegs; // Aligned to lower 16-bits
646 
647  RAMPGEN rg; // a ramp generator to simulate an Angle
648  RMPCNTL rc; // ramp control
649  CLARKE clarke; // clarke transform
650  PARK park; // park transform
651  IPARK ipark; // inv park transform
652  SVGEN svgen;
653 
654  SPEED_MEAS_QEP speed;
655 
656 #if(SPD_CNTLR == SPD_PID_CNTLR)
657  PID_CONTROLLER pid_spd;
658  PI_CONTROLLER pi_pos;
659 #endif // (SPD_CNTLR == SPD_PID_CNTLR)
660 
661 #if(SPD_CNTLR == SPD_DCL_CNTLR)
662  DCL_PI dcl_spd;
663  DCL_PI dcl_pos;
664 #endif // (SPD_CNTLR == SPD_DCL_CNTLR)
665 
666 #if(SPD_CNTLR == SPD_NLPID_CNTLR)
667  DCL_NLPID nlpid_spd;
668  DCL_NLPID nlpid_pos;
669 #endif // (SPD_CNTLR == SPD_NLPI_CNTLR)
670 
671  FCL_cmplxCtrl_t cmplx_Id;
672  FCL_cmplxCtrl_t cmplx_Iq;
673  FCL_Parameters_t FCL_params;
674 
675  uint32_t isrTicker;
676 
677  float32_t fclUpdateLatency_us; // PWM update latency since sampling
678  float32_t focExecutionTime_us; // FOC execution time since sampling
679 
680  uint16_t fclClrCntr;
681  uint16_t fclCycleCountMax;
682  uint16_t fclCycleCount; // FCL Latency variable
683 
684  uint16_t focClrCntr;
685  uint16_t focCycleCountMax;
686  uint16_t focCycleCount; // FOC execution time variable
687 
688  uint16_t lsw2EntryFlag;
689  uint16_t offsetDoneFlag;
690 
691  uint16_t drvEnableGateGPIO;
692  uint16_t drvFaultTripGPIO;
693  uint16_t drvClearFaultGPIO;
694 
695  uint16_t speedLoopPrescaler; // Speed loop pre scalar
696  uint16_t speedLoopCount; // Speed loop counter
697  uint16_t alignCntr;
698  uint16_t alignCnt;
699  uint16_t posPtrMax;
700  uint16_t posPtr;
701 
702  uint16_t currentThreshHi;
703  uint16_t currentThreshLo;
704  uint16_t voltageThreshHi;
705 
706  uint16_t faultStatusFlag; // motor fault status
707  uint16_t faultStatusPrev; // motor fault status
708  uint16_t faultTimesCount; // motor fault times counter
709  uint16_t clearFaultFlag;
710 
711  uint16_t enableSpeedLoop;
712 
713  PWMUpdateMode_e pwmUpdateMode;
714  CtrlState_e ctrlStateCom;
715  CtrlState_e ctrlStateUse;
716  CtrlState_e ctrlStateFdb;
717  ENC_Status_e lsw;
718 } MOTOR_Vars_t;
719 
720 extern MOTOR_Vars_t motorVars;
721 
722 // ****************************************************************************
723 //
724 // functions
725 //
726 
727 extern uint32_t FCL_getSwVersion(void);
728 
729 extern void FCL_initPWM(MOTOR_Vars_t *pMotor,
730  const uint32_t pwmBaseU,
731  const uint32_t pwmBaseV,
732  const uint32_t pwmBaseW);
733 
734 extern void FCL_initQEP(MOTOR_Vars_t *pMotor,
735  const uint32_t qepBaseA);
736 
737 extern void FCL_initADC_2In(MOTOR_Vars_t *pMotor, uint32_t adcBaseW,
738  const uint32_t adcResultBaseV, ADC_PPBNumber adcV_PPBNum,
739  const uint32_t adcResultBaseW, ADC_PPBNumber adcW_PPBNum);
740 
741 extern void FCL_initADC_3In(MOTOR_Vars_t *pMotor, uint32_t adcBaseW,
742  const uint32_t adcResultBaseU, ADC_PPBNumber adcU_PPBNum,
743  const uint32_t adcResultBaseV, ADC_PPBNumber adcV_PPBNum,
744  const uint32_t adcResultBaseW, ADC_PPBNumber adcW_PPBNum);
745 
746 //
747 // static inline functions will be put in header files
748 //
749 static inline void FCL_readCount(MOTOR_Vars_t *pMotor)
750 {
751  pMotor->fclCycleCount = EPWM_getTimeBaseCounterValue(pMotor->pwmBaseU);
752 
753  return;
754 }
755 
756 //
757 // This function is called to reset the FCL variables and is useful when user
758 // wants to stop the motor and restart the motor
759 //
760 static inline void FCL_resetController(MOTOR_Vars_t *pMotor)
761 {
762  pMotor->cmplx_Id.ref = 0.0;
763  pMotor->cmplx_Id.carryOver = 0;
764  pMotor->cmplx_Id.out = 0;
765  pMotor->cmplx_Id.carryOver = 0;
766  pMotor->cmplx_Id.err = 0;
767  pMotor->cmplx_Id.xErr = 0;
768 
769  pMotor->cmplx_Iq.ref = 0.0;
770  pMotor->cmplx_Iq.carryOver = 0;
771  pMotor->cmplx_Iq.out = 0;
772  pMotor->cmplx_Iq.carryOver = 0;
773  pMotor->cmplx_Iq.err = 0;
774  pMotor->cmplx_Iq.xErr = 0;
775 
776  pMotor->speedWePrev = 0;
777 
778  return;
779 }
780 
781 //
782 // CURRENT PI CONTROLLER ROUTINES
783 //
784 static inline void FCL_runPI(FCL_cmplxCtrl_t *pPI)
785 {
786  pPI->out += (pPI->err * pPI->Kerr) + pPI->carryOver;
787  pPI->out = __fsat(pPI->out, pPI->Umax, pPI->Umin);
788 
789  return;
790 }
791 
792 //
793 // Complex control in Fast Current Loop
794 //
795 static inline void FCL_runCCSyn(FCL_cmplxCtrl_t *pId, FCL_cmplxCtrl_t *pIq)
796 {
797  float32_t errTemp;
798 
799  errTemp = pId->err * pId->cosWTs - pIq->err * pId->sinWTs;
800  pId->out += pId->kDirect * errTemp + pId->carryOver;
801  pId->out = __fsat(pId->out, pId->Umax, pId->Umin);
802 
803  errTemp = pIq->err * pIq->cosWTs + pId->err * pIq->sinWTs;
804  pIq->out += pIq->kDirect * errTemp + pIq->carryOver;
805  pIq->out = __fsat(pIq->out, pIq->Umax, pIq->Umin);
806 
807  return;
808 }
809 
810 //-----------------------------------------------------------------------------
811 // PI CONTROL ROUTINES
812 //-----------------------------------------------------------------------------
813 //
814 // FCL PI controller
815 //
816 static inline void FCL_runPICtrl(MOTOR_Vars_t *pMotor)
817 {
818  register float32_t clarke1Alpha, clarke1Beta;
819  register float32_t park1Sine, park1Cosine;
820  SVGEN svgen2;
821 
822  park1Sine = __sinpuf32(pMotor->pangle);
823  park1Cosine = __cospuf32(pMotor->pangle);
824 
825  //
826  // CLARKE transformation
827  //
828 #if(DRIVER_MODULE == BITFIELD_MODE)
829  while(pMotor->pADCIntFlag->bit.ADCINT1 == 0);
830 #else
831  while(ADC_getInterruptStatus(pMotor->adcBaseW, ADC_INT_NUMBER1) == 0);
832 #endif
833 
834  clarke1Alpha = (float32_t)((int16_t)HWREGH(pMotor->curA_PPBRESULT) *
835  pMotor->FCL_params.adcPPBScale);
836  clarke1Beta = ((clarke1Alpha +
837  (2.0F * ((float32_t)((int16_t)HWREGH(pMotor->curB_PPBRESULT))
838  * pMotor->FCL_params.adcPPBScale))) * ONEbySQRT3);
839 
840  //
841  // PARK Transformation
842  //
843  pMotor->cmplx_Iq.err = pMotor->cmplx_Iq.ref -
844  ((clarke1Beta * park1Cosine) - (clarke1Alpha * park1Sine));
845 
846  pMotor->cmplx_Id.err = pMotor->cmplx_Id.ref -
847  ((clarke1Alpha * park1Cosine) + (clarke1Beta * park1Sine));
848 
849  //
850  // PI controllers for Id and Iq
851  //
852  FCL_runPI(&pMotor->cmplx_Iq); // Iq loop - PI controller - CPU
853  FCL_runPI(&pMotor->cmplx_Id); // Id loop - PI controller - CPU
854 
855  //
856  // Inverse Park Transformation
857  //
858  svgen2.Ualpha = ((pMotor->cmplx_Id.out * park1Cosine) -
859  (pMotor->cmplx_Iq.out * park1Sine)) * pMotor->FCL_params.carrierMid;
860 
861  svgen2.Ubeta = ((pMotor->cmplx_Iq.out * park1Cosine) +
862  (pMotor->cmplx_Id.out * park1Sine)) * pMotor->FCL_params.cmidsqrt3;
863 
864  //
865  // PWM pulse width time calculation
866  //
867  svgen2.Tb = (svgen2.Ubeta - svgen2.Ualpha) / 2;
868  svgen2.Tc = svgen2.Tb - svgen2.Ubeta;
869 
870  svgen2.tmp2 = __fmax(__fmax(svgen2.Ualpha, svgen2.Tc), svgen2.Tb);
871  svgen2.tmp2 += __fmin(__fmin(svgen2.Ualpha, svgen2.Tc), svgen2.Tb);
872  svgen2.tmp1 = pMotor->FCL_params.carrierMid - (svgen2.tmp2 / 2);
873 
874  //
875  // PWM updates
876  //
877  *(pMotor->pwmCompA) = (uint32_t)(svgen2.Tc + svgen2.tmp1);
878  *(pMotor->pwmCompB) = (uint32_t)(svgen2.Ualpha + svgen2.tmp1);
879  *(pMotor->pwmCompC) = (uint32_t)(svgen2.Tb + svgen2.tmp1);
880 
881  FCL_readCount(pMotor);
882 
883  return;
884 }
885 
886 //
887 // Wrap up function to be called by the user app after end of current loop
888 //
889 static inline void FCL_runPICtrlWrap(MOTOR_Vars_t *pMotor)
890 {
891  float32_t Vbase = pMotor->FCL_params.Vdcbus * (1.15f / 2.0f);
892  float32_t invZbase = pMotor->FCL_params.Ibase / Vbase;
893 
894  //
895  // To save CPU cycles and speed up calcn, carry over math is done within
896  // this wrap function and .CarryOver carries it to the next iteration
897  // Bemf calc is rolled in to the Q calcs as the speed and flux does not
898  // change much between iterations - equation tweaked to fit here
899  //
900 
901  //
902  // Update PI ID parameters
903  //
904  float32_t wccXinvZb = invZbase * pMotor->FCL_params.wccD;
905 
906  pMotor->cmplx_Id.Kp = pMotor->FCL_params.Ld * wccXinvZb;
907  pMotor->cmplx_Id.Ki = pMotor->FCL_params.Rd * wccXinvZb *
908  pMotor->FCL_params.tSamp;
909 
910  float32_t Ki_rev = pMotor->cmplx_Id.Ki / 2;
911  pMotor->cmplx_Id.Kerr = Ki_rev + pMotor->cmplx_Id.Kp;
912  pMotor->cmplx_Id.KerrOld = Ki_rev - pMotor->cmplx_Id.Kp;
913 
914  pMotor->cmplx_Id.carryOver =
915  pMotor->cmplx_Id.err * pMotor->cmplx_Id.KerrOld;
916 
917  // Update PI IQ parameters
918  wccXinvZb = invZbase * pMotor->FCL_params.wccQ;
919 
920  pMotor->cmplx_Iq.Kp = pMotor->FCL_params.Lq * wccXinvZb;
921  pMotor->cmplx_Iq.Ki = pMotor->FCL_params.Rq * wccXinvZb *
922  pMotor->FCL_params.tSamp;
923 
924  Ki_rev = pMotor->cmplx_Iq.Ki / 2;
925 
926  pMotor->cmplx_Iq.Kerr = Ki_rev + pMotor->cmplx_Iq.Kp;
927  pMotor->cmplx_Iq.KerrOld = Ki_rev - pMotor->cmplx_Iq.Kp;
928 
929  pMotor->cmplx_Iq.carryOver =
930  (pMotor->cmplx_Iq.err * pMotor->cmplx_Iq.KerrOld) +
931  (pMotor->FCL_params.BemfK * (pMotor->speedWe - pMotor->speedWePrev));
932 
933  pMotor->speedWePrev = pMotor->speedWe;
934 
935  //
936  // to pass on the id and iq current feedback back to user,
937  // update them in the wrap function
938  //
939  pMotor->cmplx_Id.fbk = pMotor->cmplx_Id.ref - pMotor->cmplx_Id.err;
940  pMotor->cmplx_Iq.fbk = pMotor->cmplx_Iq.ref - pMotor->cmplx_Iq.err;
941 
942  return;
943 }
944 
945 //-----------------------------------------------------------------------------
946 // COMPLEX CONTROL ROUTINES
947 //-----------------------------------------------------------------------------
948 //
949 // FCL complex controller
950 //
951 static inline void FCL_runComplexCtrl(MOTOR_Vars_t *pMotor)
952 {
953  register float32_t clarke1Alpha, clarke1Beta;
954  register float32_t park1Sine, park1Cosine;
955  SVGEN svgen2;
956 
957  park1Sine = __sinpuf32(pMotor->pangle);
958  park1Cosine = __cospuf32(pMotor->pangle);
959 
960  //
961  // CLARKE transformation
962  //
963 #if(DRIVER_MODULE == BITFIELD_MODE)
964  while(pMotor->pADCIntFlag->bit.ADCINT1 == 0);
965 #else
966  while(ADC_getInterruptStatus(pMotor->adcBaseW, ADC_INT_NUMBER1) == 0);
967 #endif
968 
969  clarke1Alpha = (float32_t)((int16_t)HWREGH(pMotor->curA_PPBRESULT) *
970  pMotor->FCL_params.adcPPBScale);
971 
972  clarke1Beta = ((clarke1Alpha +
973  (2.0F * ((float32_t)((int16_t)HWREGH(pMotor->curB_PPBRESULT))
974  * pMotor->FCL_params.adcPPBScale))) *ONEbySQRT3);
975 
976  //
977  // PARK Transformation
978  //
979  pMotor->cmplx_Iq.err = pMotor->cmplx_Iq.ref -
980  ((clarke1Beta * park1Cosine) - (clarke1Alpha * park1Sine));
981 
982  pMotor->cmplx_Id.err = pMotor->cmplx_Id.ref -
983  ((clarke1Alpha * park1Cosine) + (clarke1Beta * park1Sine));
984 
985  //
986  // Complex digital controllers for Id and Iq
987  //
988  FCL_runCCSyn(&pMotor->cmplx_Id, &pMotor->cmplx_Iq);
989 
990  //
991  // Inverse Park Transformation
992  //
993  svgen2.Ualpha = ((pMotor->cmplx_Id.out * park1Cosine) -
994  (pMotor->cmplx_Iq.out * park1Sine)) * pMotor->FCL_params.carrierMid;
995 
996  svgen2.Ubeta = ((pMotor->cmplx_Iq.out * park1Cosine) +
997  (pMotor->cmplx_Id.out * park1Sine)) * pMotor->FCL_params.cmidsqrt3;
998 
999  //
1000  // PWM pulse width time calculation
1001  //
1002  svgen2.Tb = (svgen2.Ubeta - svgen2.Ualpha) / 2.0;
1003  svgen2.Tc = svgen2.Tb - svgen2.Ubeta;
1004 
1005  svgen2.tmp2 = __fmax(__fmax(svgen2.Ualpha, svgen2.Tc), svgen2.Tb);
1006  svgen2.tmp2 += __fmin(__fmin(svgen2.Ualpha, svgen2.Tc), svgen2.Tb);
1007  svgen2.tmp1 = pMotor->FCL_params.carrierMid - (svgen2.tmp2 / 2.0);
1008 
1009  //
1010  // PWM updates
1011  //
1012  *(pMotor->pwmCompA) = (uint32_t)(svgen2.Tc + svgen2.tmp1);
1013  *(pMotor->pwmCompB) = (uint32_t)(svgen2.Ualpha + svgen2.tmp1);
1014  *(pMotor->pwmCompC) = (uint32_t)(svgen2.Tb + svgen2.tmp1);
1015 
1016  FCL_readCount(pMotor);
1017 
1018  return;
1019 }
1020 
1021 //
1022 // Wrap up function to be called by the user application at the completion of
1023 // Fast Current Loop (FCL) in Complex Control Mode
1024 //
1025 static inline void FCL_runComplexCtrlWrap(MOTOR_Vars_t *pMotor)
1026 {
1027  float32_t Vbase = pMotor->FCL_params.Vdcbus * 1.15f / 2.0f;
1028  float32_t invZbase = pMotor->FCL_params.Ibase / Vbase;
1029 
1030  float32_t WTs = pMotor->speedWe *
1031  pMotor->FCL_params.Wbase * pMotor->FCL_params.tSamp;
1032 
1033  pMotor->cmplx_Id.cosWTs = pMotor->cmplx_Iq.cosWTs = __cos(WTs);
1034  pMotor->cmplx_Id.sinWTs = pMotor->cmplx_Iq.sinWTs = __sin(WTs);
1035 
1036  pMotor->cmplx_Id.expVal = expf( -(pMotor->FCL_params.Rd /
1037  pMotor->FCL_params.Ld) * pMotor->FCL_params.tSamp);
1038  pMotor->cmplx_Iq.expVal = expf( -(pMotor->FCL_params.Rq /
1039  pMotor->FCL_params.Lq) * pMotor->FCL_params.tSamp);
1040 
1041  pMotor->cmplx_Id.kDirect = pMotor->FCL_params.Rd * invZbase *
1042  __sqrt(2.0F - 2.0F * __cos(pMotor->FCL_params.wccD *
1043  pMotor->FCL_params.tSamp)) /
1044  (1.0F - pMotor->cmplx_Id.expVal);
1045  pMotor->cmplx_Iq.kDirect = pMotor->FCL_params.Rq * invZbase *
1046  __sqrt(2.0F - 2.0F * __cos(pMotor->FCL_params.wccQ *
1047  pMotor->FCL_params.tSamp)) /
1048  (1.0F - pMotor->cmplx_Iq.expVal);
1049 
1050  //
1051  // To save CPU cycles and speed up calcn, carry over math is done within
1052  // this wrap function and 'carryOver' carries it to the next iteration
1053  // Bemf calc is rolled in to the Q calcs as the speed and flux does not
1054  // change much between iterations - equation tweaked to fit here
1055  //
1056  pMotor->cmplx_Id.carryOver = ( -pMotor->cmplx_Id.kDirect *
1057  pMotor->cmplx_Id.err * pMotor->cmplx_Id.expVal);
1058 
1059  pMotor->cmplx_Iq.carryOver = ( -pMotor->cmplx_Iq.kDirect *
1060  pMotor->cmplx_Iq.err * pMotor->cmplx_Iq.expVal) +
1061  (pMotor->FCL_params.BemfK * (pMotor->speedWe - pMotor->speedWePrev));
1062 
1063  pMotor->speedWePrev = pMotor->speedWe;
1064 
1065  //
1066  // to pass on the id and iq current feedback back to user,
1067  // update them in the wrap function
1068  //
1069  pMotor->cmplx_Id.fbk = pMotor->cmplx_Id.ref - pMotor->cmplx_Id.err;
1070  pMotor->cmplx_Iq.fbk = pMotor->cmplx_Iq.ref - pMotor->cmplx_Iq.err;
1071 
1072  return;
1073 }
1074 
1075 //------------------------------------------------------------------------------
1076 // QEP INTERFACE ROUTINES
1077 //------------------------------------------------------------------------------
1078 
1079 #if(DRIVER_MODULE == BITFIELD_MODE)
1080 //
1081 // QEP position Estimation Module
1082 //
1083 static inline void FCL_runQEPPosEst(MOTOR_Vars_t *pMotor)
1084 {
1085  if(pMotor->lsw == ENC_CALIBRATION_DONE)
1086  {
1087  //
1088  // QEP UTO and ADCSOC are carefully pre aligned
1089  // QEP POSLAT = QEP POSCNT at QEP UTO event that is in sync with ADCSOC
1090  // Therefore, read mech angle from QEP POSLAT
1091  //
1092  pMotor->posMechTheta = pMotor->posMechScaler *
1093  pMotor->pQEPRegs->QPOSLAT;
1094  pMotor->posElecTheta = pMotor->polePairs * pMotor->posMechTheta;
1095  pMotor->posElecTheta -= ((int32)(pMotor->posElecTheta));
1096 
1097  pMotor->pangle = pMotor->posElecTheta;
1098  }
1099  else if(pMotor->lsw == ENC_WAIT_FOR_INDEX)
1100  {
1101  //
1102  // If QEP index pulse is found :-
1103  // POSILAT captures POSCNT at the first INDEX pulse.
1104  // Load POSINIT with POSILAT, so that at every future INDEX event,
1105  // POSCNT is loaded (reset) with POSINIT
1106  //
1107  if (pMotor->pQEPRegs->QFLG.all & QEP_FLAG_IEL_EVENT)
1108  {
1109  //QPOSILAT updates on every Index edge(IEL)
1110  pMotor->pQEPRegs->QPOSINIT = pMotor->pQEPRegs->QPOSILAT;
1111 
1112  //make QPOSCNT=QPOSINIT on Index edge
1113  pMotor->pQEPRegs->QEPCTL.all |= IEI_RISING; //
1114 
1115  pMotor->lsw = ENC_CALIBRATION_DONE;
1116 
1117  } // Keep the latched pos. at the first index
1118 
1119  pMotor->pangle = pMotor->rg.Out;
1120  }
1121  else
1122  {
1123  //
1124  // Alignment Routine - Reset POSCNT to ZERO
1125  //
1126  // during alignment, reset the current shaft position to zero
1127  pMotor->pQEPRegs->QPOSCNT = 0;
1128 
1129  // write to the entire register - it is more efficient
1130  // Reset pos cnt for QEP
1131  // pMotor->QepRegs->QCLR.bit.IEL = 1;
1132  pMotor->pQEPRegs->QCLR.all = QEP_FLAG_IEL_EVENT;
1133 
1134  // reset poscnt init on index
1135  //pMotor->QepRegs->QEPCTL.all &= ~IEI_RISING;
1136  pMotor->pQEPRegs->QEPCTL.bit.IEI = 0;
1137 
1138  pMotor->pangle = 0.0;
1139  }
1140 
1141  return;
1142 }
1143 
1144 //
1145 // QEP peripheral - clearing flags after previous read
1146 //
1147 static inline void FCL_runQEPPosEstWrap(MOTOR_Vars_t *pMotor)
1148 {
1149  if(pMotor->lsw != ENC_ALIGNMENT)
1150  {
1151  //
1152  // Check an index occurrence
1153  //
1154  if (pMotor->pQEPRegs->QFLG.all & QEP_FLAG_IEL_EVENT)
1155  {
1156  //
1157  // Clear interrupt flag
1158  // pMotor->QepRegs->QCLR.bit.IEL = 1;
1159  //
1160  pMotor->pQEPRegs->QCLR.all = QEP_FLAG_IEL_EVENT;
1161  }
1162 
1163  //
1164  // Check unit Time out-event for speed calculation:
1165  // Unit Timer is sync'ed with motor PWM during INIT function
1166  //
1167  if(pMotor->pQEPRegs->QFLG.all & QEP_FLAG_UTO_EVENT)
1168  {
1169  pMotor->pQEPRegs->QCLR.all = QEP_FLAG_UTO_EVENT;
1170 
1171  //
1172  // Low Speed Calculation
1173  //
1174  if(pMotor->pQEPRegs->QEPSTS.all & 0x000C) //QEPSTS.(COEF || CDEF)
1175  {
1176  //
1177  // Capture Counter overflowed, hence do no compute speed
1178  //
1179  pMotor->pQEPRegs->QEPSTS.all = 0x000C;
1180  }
1181  }
1182  }
1183 
1184  return;
1185 }
1186 #else
1187 
1188 #define EQEP_POSCNT_INIT_NOTHING 0U
1189 #define EQEP_POSCNT_INIT_RISING_EDGE 0x0200U
1190 #define EQEP_POSCNT_INIT_FALLING_EDGE 0x0300U
1191 
1192 static inline void EQEP_resetPoscnt(uint32_t base, uint16_t initMode)
1193 {
1194  //
1195  // Check the arguments.
1196  //
1197  ASSERT(EQEP_isBaseValid(base));
1198 
1199  //
1200  // Set the init mode in the QEP Control register.
1201  //
1202  HWREGH(base + EQEP_O_QEPCTL) = (HWREGH(base + EQEP_O_QEPCTL) &
1203  ~(EQEP_QEPCTL_IEI_M)) | initMode;
1204 }
1205 
1206 //
1207 // QEP position Estimation Module
1208 //
1209 static inline void FCL_runQEPPosEst(MOTOR_Vars_t *pMotor)
1210 {
1211  uint32_t qepBase = (uint32_t)pMotor->pQEPRegs;
1212 
1213  if(pMotor->lsw == ENC_CALIBRATION_DONE)
1214  {
1215  //
1216  // QEP UTO and ADCSOC are carefully pre aligned
1217  // QEP POSLAT = QEP POSCNT at QEP UTO event that is in sync with ADCSOC
1218  // Therefore, read mech angle from QEP POSLAT
1219  //
1220  pMotor->posMechTheta = pMotor->posMechScaler *
1221  EQEP_getPositionLatch(qepBase);
1222  pMotor->posElecTheta = pMotor->polePairs * pMotor->posMechTheta;
1223  pMotor->posElecTheta -= ((int32)(pMotor->posElecTheta));
1224 
1225  pMotor->pangle = pMotor->posElecTheta;
1226  }
1227  else if(pMotor->lsw == ENC_WAIT_FOR_INDEX)
1228  {
1229  //
1230  // If QEP index pulse is found :-
1231  // POSILAT captures POSCNT at the first INDEX pulse.
1232  // Load POSINIT with POSILAT, so that at every future INDEX event,
1233  // POSCNT is loaded (reset) with POSINIT
1234  //
1235  if (EQEP_getInterruptStatus(qepBase) & EQEP_INT_INDEX_EVNT_LATCH)
1236  {
1237  //QPOSINIT = QPOSILAT (QPOSILAT updates on Index edge(IEL))
1238  EQEP_setInitialPosition(qepBase,
1239  EQEP_getIndexPositionLatch(qepBase));
1240 
1241  //make QPOSCNT=QPOSINIT on Index edge
1242  EQEP_resetPoscnt(qepBase, EQEP_POSCNT_INIT_RISING_EDGE);
1243 
1244  pMotor->lsw = ENC_CALIBRATION_DONE;
1245  } // Keep the latched pos. at the first index
1246 
1247  pMotor->pangle = pMotor->rg.Out;
1248  }
1249  else
1250  {
1251  //
1252  // Alignment Routine - Reset POSCNT to ZERO
1253  // during alignment, reset the current shaft position to zero
1254  //
1255  EQEP_setPosition(qepBase, 0);
1256  EQEP_clearInterruptStatus(qepBase, EQEP_INT_INDEX_EVNT_LATCH);
1257  EQEP_resetPoscnt(qepBase, EQEP_POSCNT_INIT_NOTHING);
1258 
1259  pMotor->pangle = 0;
1260  }
1261 
1262  return;
1263 }
1264 
1265 //
1266 // QEP peripheral - clearing flags after previous read
1267 //
1268 static inline void FCL_runQEPPosEstWrap(MOTOR_Vars_t *pMotor)
1269 {
1270  uint32_t qepBase = (uint32_t)pMotor->pQEPRegs;
1271 
1272  if(pMotor->lsw != ENC_ALIGNMENT)
1273  {
1274  // Check an index occurrence
1275  if (EQEP_getInterruptStatus(qepBase) & EQEP_INT_INDEX_EVNT_LATCH)
1276  {
1277  // Clear index event INT flag
1278  EQEP_clearInterruptStatus(qepBase, EQEP_INT_INDEX_EVNT_LATCH);
1279  }
1280 
1281  // Check unit Time out-event for speed calculation
1282  // Unit Timer is sync'ed with motor PWM during INIT function
1283  if (EQEP_getInterruptStatus(qepBase) & EQEP_INT_UNIT_TIME_OUT)
1284  {
1285  // Clear UTO event INT flag
1286  EQEP_clearInterruptStatus(qepBase, EQEP_INT_UNIT_TIME_OUT);
1287 
1288  //
1289  // Low Speed Calculation
1290  //
1291  if(EQEP_getStatus(qepBase) &
1292  (EQEP_STS_CAP_OVRFLW_ERROR | EQEP_STS_CAP_DIR_ERROR))
1293  {
1294  //
1295  // Capture Counter overflowed, hence do no compute speed
1296  //
1297  EQEP_clearStatus(qepBase,
1298  (EQEP_STS_CAP_OVRFLW_ERROR | EQEP_STS_CAP_DIR_ERROR));
1299  }
1300  }
1301  }
1302 
1303  return;
1304 }
1305 #endif // BF
1306 
1307 #endif /* _FAST_CURRENT_LOOP_H_ */
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